TPCP8407
MOSFETs
Silicon P-/N-Channel MOS (U-MOS /U-MOS )
TPCP8407
1. Applications
•
Motor Drivers
•
Mobile Equipment
2. Features
(1)
AEC-Q101 qualified
(2)
Small, thin package
(3)
Low gate charge
N-channel MOSFET: QSW = 4.7 nC (typ.)
P-channel MOSFET: QSW = 5.5 nC (typ.)
(4)
Low drain-source on-resistance
N-channel MOSFET: RDS(ON) = 29.1 mΩ (typ.) (VGS = 10 V)
P-channel MOSFET: RDS(ON) = 43.7 mΩ (typ.) (VGS = -10V)
(5)
Low leakage current
N-channel MOSFET: IDSS = 10 µA (max) (VDS = 40 V)
P-channel MOSFET: IDSS = -10 µA (max) (VDS = -40 V)
(6)
Enhancement mode
N-channel MOSFET: Vth = 2 to 3 V (VDS = 10 V, ID = 1 mA)
P-channel MOSFET: Vth = -2 to -3 V (VDS = -10 V, ID = -1 mA)
3. Packaging and Internal Circuit
1: Source (N-channel)
2: Gate (N-channel)
3: Source (P-channel)
4: Gate (P-channel)
5, 6: Drain (P-channel)
7, 8: Drain (N-channel)
PS-8
Start of commercial production
©2016 Toshiba Corporation
1
2013-05
2016-02-24
Rev.4.0
TPCP8407
4. Absolute Maximum Ratings (Note) (Ta = 25 unless otherwise specified)
4.1. N-Channel MOSFET
Characteristics
Drain-source voltage
Gate-source voltage
Drain current (DC)
(Note 1)
Drain current (pulsed)
Symbol
Rating
Unit
VDSS
40
V
VGSS
±20
ID
5
A
(Note 1)
IDP
20
Power dissipation (single operation)
(t = 5 s)
(Note 2), (Note 4)
PD(1)
1.77
Power dissipation (per device for dual operation)
(t = 5 s)
(Note 2), (Note 5)
PD(2)
1.47
Power dissipation (single operation)
(t = 5 s)
(Note 3), (Note 4)
PD(1)
0.69
Power dissipation (per device for dual operation)
(t = 5 s)
(Note 3), (Note 5)
PD(2)
0.43
(Note 6)
EAS
33.2
IAR
5
A
Channel temperature
(Note 7)
Tch
175
Storage temperature
(Note 7)
Tstg
-55 to 175
Symbol
Rating
Unit
V
Single-pulse avalanche energy
Avalanche current
W
mJ
4.2. P-Channel MOSFET
Characteristics
Drain-source voltage
VDSS
-40
Gate-source voltage
VGSS
-20/+10
Drain current (DC)
(Note 1)
ID
-4
Drain current (pulsed)
(Note 1)
IDP
-16
A
Power dissipation (single operation)
(t = 5 s)
(Note 2), (Note 4)
PD(1)
1.77
Power dissipation (per device for dual operation)
(t = 5 s)
(Note 2), (Note 5)
PD(2)
1.47
Power dissipation (single operation)
(t = 5 s)
(Note 3), (Note 4)
PD(1)
0.69
Power dissipation (per device for dual operation)
(t = 5 s)
(Note 3), (Note 5)
PD(2)
0.43
(Note 6)
EAS
46.2
mJ
IAR
-4
A
Single-pulse avalanche energy
Avalanche current
Channel temperature
(Note 7)
Tch
175
Storage temperature
(Note 7)
Tstg
-55 to 175
W
Note : Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum
ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
("Handling Precautions"/"Derating Concept and Methods") and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
©2016 Toshiba Corporation
2
2016-02-24
Rev.4.0
TPCP8407
5. Thermal Characteristics
Characteristics
Symbol
Max
Unit
/W
Channel-to-ambient thermal resistance (single operation)
(t = 5 s)
(Note 2), (Note 4)
Rth(ch-a)(1)
84.7
Channel-to-ambient thermal resistance (per device for dual
operation)
(t = 5 s)
(Note 2), (Note 5)
Rth(ch-a)(2)
102
Channel-to-ambient thermal resistance (single operation)
(t = 5 s)
(Note 3), (Note 4)
Rth(ch-a)(1)
217.3
Channel-to-ambient thermal resistance (per device for dual
operation)
(t = 5 s)
(Note 3), (Note 5)
Rth(ch-a)(2)
348.8
Note 1: Ensure that the channel temperature does not exceed 175 .
Note 2: Device mounted on a glass-epoxy board (a), Figure 5.1
Note 3: Device mounted on a glass-epoxy board (b), Figure 5.2
Note 4: Power dissipation and thermal resistance values per device with the other device being off (During single
operation, power is supplied to only one of the two devices.)
Note 5: Power dissipation and thermal resistance values per device for dual operation (During dual operation, power
is evenly supplied to both devices.)
Note 6: N channel: VDD = 25 V, Tch = 25 (initial), L = 1.379 mH, RG = 1 Ω, IAR = 5 A
P channel: VDD = -25 V, Tch = 25 (initial), L = 2.999 mH, RG = 25 Ω, IAR = -4 A
Note 7: The definitions of the absolute maximum channel and storage temperatures are qualified per AEC-Q101.
Fig. 5.1 Device Mounted on a
Glass-Epoxy Board (a)
Note:
Fig. 5.2 Device Mounted on a
Glass-Epoxy Board (b)
This transistor is sensitive to electrostatic discharge and should be handled with care.
©2016 Toshiba Corporation
3
2016-02-24
Rev.4.0
TPCP8407
6. Electrical Characteristics
6.1. Static Characteristics (Ta = 25 unless otherwise specified)
6.1.1. N-Channel MOSFET
Characteristics
Symbol
Gate leakage current
Drain cut-off current
Drain-source breakdown voltage
Drain-source breakdown voltage
(Note 8)
Gate threshold voltage
Drain-source on-resistance
Test Condition
IGSS
VGS = ±16 V, VDS = 0 V
Min
Typ.
Max
Unit
±10
µA
IDSS
VDS = 40 V, VGS = 0 V
10
V(BR)DSS
ID = 10 mA, VGS = 0 V
40
V(BR)DSX
V
ID = 10 mA, VGS = -20 V
20
Vth
VDS = 10 V, ID = 1 mA
2
2.5
3
RDS(ON)
VGS = 6 V, ID = 2.5 A
39.3
62.8
VGS = 10 V, ID = 2.5 A
29.1
36.3
Min
Typ.
Max
Unit
±10
µA
mΩ
6.1.2. P-Channel MOSFET
Characteristics
Symbol
Gate leakage current
Drain cut-off current
Drain-source breakdown voltage
Drain-source breakdown voltage
Gate threshold voltage
Drain-source on-resistance
(Note 8)
Test Condition
IGSS
VGS = -16/+10 V, VDS = 0 V
IDSS
VDS = -40 V, VGS = 0 V
-10
V(BR)DSS
ID = -10 mA, VGS = 0 V
-40
V(BR)DSX
ID = -10 mA, VGS = 10 V
-30
Vth
VDS = -10 V, ID = -1 mA
-2
-2.5
-3
VGS = -6 V, ID = -2 A
51.4
82.2
VGS = -10 V, ID = -2 A
43.7
56.8
RDS(ON)
V
mΩ
Note 8: If a reverse bias is applied between gate and source, this device enters V(BR)DSX mode. Note that the drainsource breakdown voltage is lowered in this mode.
©2016 Toshiba Corporation
4
2016-02-24
Rev.4.0
TPCP8407
6.2. Dynamic Characteristics (Ta = 25 unless otherwise specified)
6.2.1. N-Channel MOSFET
Characteristics
Input capacitance
Symbol
Ciss
Test Condition
VDS = 10 V, VGS = 0 V, f = 1 MHz
Min
Typ.
Max
Unit
505
pF
Reverse transfer capacitance
Crss
66
Output capacitance
Coss
115
Switching time (rise time)
tr
5
Switching time (turn-on time)
ton
12
tf
4
toff
17
Min
Typ.
Max
Unit
810
pF
85
130
8
Switching time (fall time)
Switching time (turn-off time)
See Fig. 6.2.1.1.
ns
Fig. 6.2.1.1 Switching Time Test Circuit
6.2.2. P-Channel MOSFET
Characteristics
Symbol
Input capacitance
Ciss
Reverse transfer capacitance
Crss
Output capacitance
Coss
Test Condition
VDS = -10 V, VGS = 0 V, f = 1 MHz
Switching time (rise time)
tr
Switching time (turn-on time)
ton
25
tf
33
toff
126
Switching time (fall time)
Switching time (turn-off time)
See Fig. 6.2.2.1.
ns
Fig. 6.2.2.1 Switching Time Test Circuit
©2016 Toshiba Corporation
5
2016-02-24
Rev.4.0
TPCP8407
6.3. Gate Charge Characteristics (Ta = 25 unless otherwise specified)
6.3.1. N-Channel MOSFET
Characteristics
Symbol
Total gate charge (gate-source plus gate-drain)
Qg
Test Condition
VDD ≈ 32 V, VGS = 10 V, ID = 5 A
Min
Typ.
Max
Unit
11.8
nC
Gate-source charge 1
Qgs1
2.1
Gate-drain charge
Qgd
3.9
Gate switch charge
QSW
4.7
Min
Typ.
Max
Unit
nC
6.3.2. P-Channel MOSFET
Characteristics
Symbol
Total gate charge (gate-source plus gate-drain)
VDD ≈ -32 V, VGS = -10 V, ID = -4 A
18
Qgs1
2.6
Gate-drain charge
Qgd
4.6
Gate switch charge
QSW
5.5
Gate-source charge 1
Qg
Test Condition
6.4. Source-Drain Characteristics (Ta = 25 unless otherwise specified)
6.4.1. N-Channel MOSFET
Characteristics
Reverse drain current (pulsed)
Symbol
(Note 9)
Diode forward voltage
Test Condition
Min
Typ.
Max
Unit
IDRP
20
A
VDSF
IDR = 5 A, VGS = 0 V
-1.2
V
Min
Typ.
Max
Unit
6.4.2. P-Channel MOSFET
Characteristics
Reverse drain current (pulsed)
Diode forward voltage
Symbol
(Note 9)
Test Condition
IDRP
-16
A
VDSF
IDR = -4 A, VGS = 0 V
1.2
V
Note 9: Ensure that the channel temperature does not exceed 175 .
7. Marking
Fig. 7.1 Marking
©2016 Toshiba Corporation
6
2016-02-24
Rev.4.0
TPCP8407
8. Characteristics Curves (Note)
8.1. N-Channel MOSFET
Fig. 8.1.1 ID - VDS
Fig. 8.1.2 ID - VDS
Fig. 8.1.3 ID - VGS
Fig. 8.1.4 VDS - VGS
Fig. 8.1.5 RDS(ON) - ID
Fig. 8.1.6 RDS(ON) - Ta (Note 10)
©2016 Toshiba Corporation
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2016-02-24
Rev.4.0
TPCP8407
Fig. 8.1.7 IDR - VDS
Fig. 8.1.8 Capacitance - VDS
Fig. 8.1.9 Vth - Ta (Note 10)
Fig. 8.1.10
Dynamic Input/Output Characteristics
Fig. 8.1.11 PD - Ta
(Guaranteed Maximum) (Note 10)
©2016 Toshiba Corporation
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2016-02-24
Rev.4.0
TPCP8407
Fig. 8.1.12 rth - tw
(Guaranteed Maximum)
Fig. 8.1.13 Safe Operating Area
(Guaranteed Maximum)
©2016 Toshiba Corporation
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2016-02-24
Rev.4.0
TPCP8407
8.2. P-Channel MOSFET
Fig. 8.2.1 ID - VDS
Fig. 8.2.2 ID - VDS
Fig. 8.2.3 ID - VGS
Fig. 8.2.4 VDS - VGS
Fig. 8.2.5 RDS(ON) - ID
Fig. 8.2.6 RDS(ON) - Ta (Note 10)
©2016 Toshiba Corporation
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2016-02-24
Rev.4.0
TPCP8407
Fig. 8.2.7 IDR - VDS
Fig. 8.2.8 Capacitance - VDS
Fig. 8.2.9 Vth - Ta (Note 10)
Fig. 8.2.10 Dynamic Input/Output Characteristics
Fig. 8.2.11 PD - Ta
(Guaranteed Maximum) (Note 10)
©2016 Toshiba Corporation
11
2016-02-24
Rev.4.0
TPCP8407
Fig. 8.2.12 rth - tw
(Guaranteed Maximum)
Fig. 8.2.13 Safe Operating Area
(Guaranteed Maximum)
Note:
The above characteristics curves are presented for reference only and not guaranteed by production test,
unless otherwise noted.
Note 10:The definitions of the absolute maximum channel and storage temperatures are qualified per AEC-Q101.
©2016 Toshiba Corporation
12
2016-02-24
Rev.4.0
TPCP8407
Package Dimensions
Unit: mm
Weight: 0.017 g (typ.)
Package Name(s)
TOSHIBA: 2-3V1S
Nickname: PS-8
©2016 Toshiba Corporation
13
2016-02-24
Rev.4.0
TPCP8407
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the Product into their own applications, customers must also refer to and comply with (a) the latest versions of all relevant TOSHIBA
information, including without limitation, this document, the specifications, the data sheets and application notes for Product and the
precautions and conditions set forth in the "TOSHIBA Semiconductor Reliability Handbook" and (b) the instructions for the application
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©2016 Toshiba Corporation
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2016-02-24
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