0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
SDHC

SDHC

  • 厂商:

    TRANSCEND

  • 封装:

  • 描述:

    SDHC - 4~32GB High Capacity Secure Digital Card - Transcend Information. Inc.

  • 数据手册
  • 价格&库存
SDHC 数据手册
SDHC Card seriies SDHC Card ser es Description Transcend High Capacity SD Card series are specifically designed to meet the High Capacity, High Definition Audio and Video requirement for the latest Digital Cameras, DV Recorders, Mobile Phones, etc,. The new defined Speed Class enables the host to support AV applications to perform real time recording to the SD memory card. 4~32GB High Capacity Secure Digital Card Features • RoHS compliant product. • Card Lid material: PC (comply with UL94,Flame Class:HB) • Operating Voltage: 2.7 ~ 3.6V • Operating Temperature: -25 ~ 85°C • Durability: 10,000 insertion/removal cycles • Compatible with SD Specification Ver. 2.0 • Comply with SD File System Specification Ver. 2.0 • Mechanical Write Protection Switch • Supports Speed Class Specification up to Class 6 • Supports Copy Protection for Recorded Media (CPRM) for SD-Audio • Seamless compatibility with SDMI-compliant digital audio devices • Form Factor: 24mm x 32mm x 2.1mm Placement Front Back Pin Definition Pin No. 1 2 3 4 5 6 7 8 9 Name CMD VSS1 VDD CLK VSS2 DAT0 DAT1 DAT2 Type 3 SD Mode Description Command/Response Supply voltage ground Supply voltage Clock Supply voltage ground Name CS DI VSS VDD SCLK VSS2 DO RSV RSV SPI Mode Type Description I I S S I S O/PP Chip Select (neg true) Data In Supply voltage ground Supply voltage Clock Supply voltage ground Data Out CD/DAT I/O/PP Card Detect/Data Line [Bit3] PP S S I S I/O/PP Data Line [Bit0] I/O/PP Data Line [Bit1] I/O/PP Data Line [Bit2] Transcend Information Inc. 1 SDHC Card seriies SDHC Card ser es Architecture 4~32GB High Capacity Secure Digital Card Transcend Information Inc. 2 SDHC Card seriies SDHC Card ser es Bus Operating Conditions • General Parameter Peak voltage on all lines All Inputs Input Leakage Current All Outputs Output Leakage Current -10 -10 4~32GB High Capacity Secure Digital Card Symbol Min. -0.3 Max. VDD+0.3 10 10 Unit V µA µA Remark • Power Supply Voltage Parameter Supply voltage Output High Voltage Output Low Voltage Input High Voltage Input Low Voltage Power up time Symbol VDD VOH VOL VIH VIL Min. 2.7 0.75* VDD Max. 3.6 0.125* VDD Unit V V V V V ms Remark IOH=-100uA@VDD Min. IOL=100uA@VDD Min. 0.625* VDD VDD+0.3 VSS-0.3 0.25* VDD 250 From 0v to VDD Min. • Current Consumption The current consumption is measured by averaging over 1 second. ‧ Before first command: Maximum 15 mA ‧ During initialization: Maximum 100 mA ‧ Operation in Default Mode: Maximum 100 mA ‧ Operation in High Speed Mode: Maximum 200 mA ‧ Operation with other functions: Maximum 500 mA. • Bus Signal Line Load The total capacitance CL the CLK line of the SD Memory Card bus is the sum of the bus master capacitance CHOST, the bus capacitance CBUS itself and the capacitance CCARD of each card connected to this line: CL = CHOST + CBUS + Ν*CCARD Where N is the number of connected cards. Parameter Pull-up resistance Bus signal line capacitance Symbol RCMD RDAT CL Min. 10 Max. 100 40 Unit kΩ pF Remark To prevent bus floating 1 card CHOST+CBUS shall not exceed 30 pF Transcend Information Inc. 3 SDHC Card seriies SDHC Card ser es Single card capacitance Maximum signal line inductance Pull-up resistance inside card (pin1) RDAT3 10 CCARD 4~32GB High Capacity Secure Digital Card 10 16 90 pF nH kΩ fPP ≤ 20 MHz May be used for card detection Note that the total capacitance of CMD and DAT lines will be consist of CHOST, CBUS and one CCARD only because they are connected separately to the SD Memory Card host. Host should consider total bus capacitance for each signal as the sum of CHOST, CBUS, and CCARD, these parameters are defined by per signal. The host can determine CHOST and CBUS so that total bus capacitance is less than the card estimated capacitance load (CL=40 pF). The SD Memory Card guarantees its bus timing when total bus capacitance is less than maximum value of CL (40 pF). Transcend Information Inc. 4 SDHC Card seriies SDHC Card ser es • Bus Signal Levels 4~32GB High Capacity Secure Digital Card As the bus can be supplied with a variable supply voltage, all signal levels are related to the supply voltage. To meet the requirements of the JEDEC specification JESD8-1A and JESD8-7, the card input and output voltages shall be within the following specified ranges for any VDD of the allowed voltage range: Parameter Output HIGH voltage Output LOW voltage Input HIGH voltage Input LOW voltage Symbol VOH VOL VIH VIL Min. 0.75* VDD Max. 0.125* VDD Unit V V V V Remark IOH = -100 μA @VDD min IOL = -100 μA @VDD min 0.625* VDD VSS – 0.3 VDD + 0.3 0.25* VDD Transcend Information Inc. 5 SDHC Card seriies SDHC Card ser es • Bus Timing 4~32GB High Capacity Secure Digital Card Parameter Clock frequency Data Transfer Mode Clock frequency Identification Mode Clock low time Clock high time Clock rise time Clock fall time Inputs CMD, DAT (referenced to CLK) Input set-up time Input hold time Outputs CMD, DAT (referenced to CLK) Symbol fPP fOD tWL tWH tTLH tTHL tISU tIH 6 Min 0 0(1)/100 10 10 Max. 25 400 Unit MHz KHz ns ns Remark CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) Clock CLK (All values are referred to min (VIH) and max (VIL) 10 10 5 5 ns ns ns ns Transcend Information Inc. SDHC Card seriies SDHC Card ser es Output Delay time during Data Transfer Mode tODLY 0 4~32GB High Capacity Secure Digital Card 14 ns CL ≤ 40 pF, (1 card) Output Delay time during Identification Mode tODLY 0 50 ns CL ≤ 40 pF, (1 card) (1) 0 Hz means to stop the clock. The given minimum frequency range is for cases were continues clock is required Transcend Information Inc. 7 SDHC Card seriies SDHC Card ser es • Bus Timing (High Speed Mode) 4~32GB High Capacity Secure Digital Card Parameter Clock frequency Data Transfer Mode Clock low time Clock high time Clock rise time Clock fall time Inputs CMD, DAT (referenced to CLK) Input set-up time Input hold time Outputs CMD, DAT (referenced to CLK) Symbol fPP tWL tWH tTLH tTHL tISU tIH Min 0 7 7 Max. 50 Unit MHz ns ns Remark CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) CCARD ≤ 10 pF, (1 card) Clock CLK (All values are referred to min (VIH) and max (VIL) 3 3 6 2 ns ns ns ns Transcend Information Inc. 8 SDHC Card seriies SDHC Card ser es Output Delay time during Data Transfer Mode Output Hold time 1 4~32GB High Capacity Secure Digital Card tODLY tOH 2.5 40 14 ns ns pF CL ≤ 40 pF, (1 card) CL ≤ 40 pF, (1 card) (1 card) Total System capacitance for each line CL 1) In order to satisfy severe timing, host shall drive only one card. Transcend Information Inc. 9 SDHC Card seriies SDHC Card ser es Reliability and Durability Temperature 4~32GB High Capacity Secure Digital Card Operation: -25°C / 85°C Storage: -40°C (168h) / 85°C (500h) Junction temperature: max. 95°C Operation: 25°C / 95% rel. humidity Storage: 40°C / 93% rel. hum./500h Salt Water Spray: 3% NaCl/35C; 24h acc. MIL STD Method 1009 10.000 mating cycles; test procedure: tbd. 10N 0.15N.m or +/-2.5 deg 1.5m free fall UV: 254nm, 15Ws/cm² according to ISO 7816-1 0.1 Gy of medium-energy radiation (70 keV to 140 keV, cumulative dose per year) to both sides of the card, according to ISO7816-1. No warp page; no mold skin; complete form; no cavities surface smoothness

很抱歉,暂时无法提供与“SDHC”相匹配的价格&库存,您可以联系我们找货

免费人工找货
PESDHC5D7VU
    •  国内价格
    • 1+0.13501
    • 100+0.12601
    • 300+0.11701
    • 500+0.10801
    • 2000+0.10351
    • 5000+0.10081

    库存:956

    PESDHC3D3V3U
    •  国内价格
    • 5+0.23799
    • 20+0.21699
    • 100+0.19599
    • 500+0.175
    • 1000+0.1652
    • 2000+0.1582

    库存:0

    PESDHC2FD4V5BH
    •  国内价格
    • 5+0.11761
    • 20+0.1071
    • 100+0.0966
    • 500+0.0861
    • 1000+0.0812
    • 2000+0.0777

    库存:28430