TMC248-LA-T

POWER DRIVER FOR STEPPER MOTORS INTEGRATED CIRCUITS TMC248 DATASHEET Low-cost stepper driver for two-phase bipolar motors with low noise PWM chopper and stallGuard™. External MOSFETs fit different motor sizes. With SPI, classic analog interface, protection & diagnostics. APPLICATIONS Textile, Sewing Machines Office Automation Printer and Scanner Heliostat Controller ATM, Cash recycler POS CCTV, Security Antenna Positioning Pumps and Valves Lab Automation Liquid Handling Medical FEATURES AND BENEFITS High Current up to 7 A motor current using 4 external dualMOS transistors. Voltage Range 7 V… 36 V DC 3.3 V or 5 V DC for digital part SPI & External Analogue / Digital Signals Microstep Resolution up to 64 microsteps per full step Low Power Dissipation via low RDS-ON power stage Protection: overvoltage, overtemperature & short circuit Diagnostics: overcurrent, open load, temperature prewarning, and undervoltage overtemperature, stallGuard™ sensorless stall detection and load measurement Mixed Decay for smooth motor operation Slope Control for reduced electromagnetic emissions Current Control for cool motor and driver DESCRIPTION The TMC248 driver for two-phase stepper motors offers a competitive feature set, including 64x micro-stepping, sensorless mechanical load measurement with stall detection, and smart current control. Standard SPI™ and communication via external analog / digital signals are available. The TMC248 drives eight external Low-RDS-ON high efficiency MOSFETs for motor currents up to 7A and up to 36V. Integrated protection and diagnostic features support robust and reliable operation. High integration and small form factor enable miniaturized designs with low external component count for costeffective and highly competitive solutions. Standby and Shutdown Mode Smallest Size 5x5mm QFN28 package BLOCK DIAGRAM IN A C/CLK TMC248 OSC DAC Driver Coil A 4 bit SPI SPI Control, Configuration, Diagnostics PWM Control Current Monitoring stallGuard™ ERROR Power Supply Protection: Temperature Voltage Short Circuit DAC 4 bit IN B TRINAMIC Motion Control GmbH & Co. KG Hamburg, Germany Driver Coil B MOSFET Driver Stage 8 x Mosfet M TMC248 DATASHEET (Rev. 1.01 / 2013-MAR-26) 2 APPLICATION EXAMPLES: HIGH POWER – SMALL SIZE The TMC248 scores with its high power density and a versatility that covers a wide spectrum of applications and motor sizes, all while keeping costs down. APPLICATION EXAMPLES COMPACT DESIGN FOR OFFLOAD UP TO 3 MOTORS USING SPI INTERFACE THE MOTION CONTROL FUNCTION TO TRINAMICS TMC429. GET A COMPETITIVE DESIGN FOR MULTIPLE MOTORS! By offloading the motion-control function to the TMC429, up to three motors can be operated reliably with very little demand for service from the microcontroller. Motor 1 High level interface SPI µC TMC429 Motion Controller SPI TMC248 MOSFET Driver Stage M Motor 2 TMC248 MOSFET Driver Stage M Motor 3 TMC248 MINIATURIZED DESIGN BENEFIT WITH MOSFET Driver Stage M SIMPLE DIGITAL DRIVER CONTROL FROM A LARGE CURRENT CONTROL RANGE VIA ANALOG INPUTS! The TMC248 is controlled via SPI bus. The microcontroller initializes the chip and writes control parameters, mode bits, and values for coil currents in the driver chip. Analog A/B inputs allow for a large current control range. High level interface TMC248 Driver Stage Analog Inputs A/B MINIATURIZED DESIGN REPLACE MOSFET SPI µC FOR STANDALONE MODE BIPOLAR DRIVER BY A MODERN CMOS DRIVER. USE M NEW HARDWARE AND KEEP YOUR SOFTWARE INVEST! The TMC248 is controlled by analog current control signals and digital phase signals. Especially for lower speeds inimitable smoothness will be achieved with TRINAMICs low noise chopper. High level interface Analog Inputs A/B µC TMC248 Polarity A/B MOSFET Driver Stage M Error TMC429+24X-EVAL EVALUATION & DEVELOPMENT PLATFORM This evaluation board is a development platform for applications based on the TMC248. The board features USB interface for communication with control software running on a PC. External power MOSFETs support drive currents up to 3.5A at 24 V. The control software provides a userfriendly GUI for setting control parameters and visualizing the dynamic response of the motor. ORDER CODES Order code TMC248-LA TMC429+24x-EVAL V2.0 www.trinamic.com Description 7 A stepper driver for external MOSFETs, QFN28 Chipset evaluation board for TMC429, TMC246, TMC248, TMC249. Size 5 x 5 mm2 10 x 16 cm2 TMC248 DATASHEET (Rev. 1.01 / 2013-MAR-26) 3 TABLE OF CONTENTS 1 1.1 1.2 2 2.1 2.2 3 4 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10 5 5.1 5.2 6 ADVANCED FEATURES CONTROL INTERFACES 5 5 10 MICROSTEP RESOLUTION 27 PIN ASSIGNMENTS 6 11 MOSFET EXAMPLES 28 PACKAGE OUTLINE SIGNAL DESCRIPTIONS 6 6 12 LAYOUT CONSIDERATIONS 30 GROUNDING FILTERING CAPACITORS PULL-UP RESISTORS ON UNUSED INPUTS POWER SUPPLY SEQUENCING CONSIDERATIONS LAYOUT EXAMPLE 30 30 31 13 ABSOLUTE MAXIMUM RATINGS 33 14 ELECTRICAL CHARACTERISTICS 34 OPERATIONAL RANGE DC SPECIFICATIONS AC SPECIFICATIONS THERMAL PROTECTION 34 34 36 36 PACKAGE MECHANICAL DATA 37 DIMENSIONAL DRAWINGS PACKAGE CODE 37 37 STALLGUARD MEASUREMENT 7 IMPLEMENTING SENSORLESS STALL DETECTION 9 SPI INTERFACE 10 BUS SIGNALS MOTOR COIL CURRENT SETTING VIA SPI BASE CURRENT CONTROL MODE VIA INA / INB IN SPI MODE CONTROLLING POWER DOWN VIA THE SPI INTERFACE OPEN LOAD DETECTION STANDBY AND SHUTDOWN MODE POWER SAVING BUS TIMING USING THE SPI INTERFACE WITH ONE OR MULTIPLE DEVICES SPI FILTER 10 11 7 11 DISCLAIMER 38 14 14 17 ESD SENSITIVE DEVICE 38 18 TABLE OF FIGURES 39 CLASSICAL NON-SPI CONTROL MODE (STANDALONE MODE) 15 19 REVISION HISTORY 40 20 REFERENCES 40 PIN FUNCTIONS IN STANDALONE MODE 15 INPUT SIGNALS FOR MICROSTEP CONTROL IN STANDALONE MODE 15 16 SENSE RESISTOR FOR CURRENT SETTING 16 RESISTOR RSH FOR HIGH SIDE OVERCURRENT DETECTION 16 MIXED DECAY MODE CHOPPER FREQUENCY VOLTAGE PWM MODE FOR LOW NOISE CHOPPER ADAPTING THE SINE WAVE FOR SMOOTH MOTOR OPERATION BLANK TIME 18 19 8 SLOPE CONTROL 24 9 PROTECTION FUNCTIONS 25 7.5 9.1 9.2 14.1 14.2 14.3 14.4 31 32 16 18 7.4 12.5 15 CHOPPER OPERATION 7.1 7.2 7.3 12.1 12.2 12.3 12.4 13 13 13 13 14 CURRENT SETTING 6.1 6.2 OVERVOLTAGE PROTECTION AND ENN PIN BEHAVIOR 26 4 STALLGUARD - STALL DETECTION AND REFERENCE SEARCH 7 3.1 3.2 9.3 KEY CONCEPTS 20 22 23 OVERCURRENT PROTECTION AND DIAGNOSTIC 25 OVER TEMPERATURE PROTECTION AND DIAGNOSTIC 25 www.trinamic.com 15.1 15.2 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 1 4 Key Concepts +VM BL1 BL2 220nF VS TMC248 OSC OSC HA1 Current Controlled Gate Drivers Undervoltage PWM-CTRL +VCC RSH VT 680p VCC 100µF 100nF Temperature HA2 P P Coil A LA2 N N LA1 SRA SDI [PHB] SDO Parallel Control [ERR] CSN Load mesurement [PHA] RS 0 Control & Diagnosis SCK SPIInterface [MDBN] DAC 4 1 INA REFSEL VREF DAC INB 4 1 0 SRB RS PWM-CTRL Current Controlled Gate Drivers LB1 ENN VCC/2 REFSEL LB2 N N Coil B HB2 P P HB1 SPE ANN AGND GND SLP [MDAN] stand alone mode RSLP [...]: function in stand alone mode Figure 1.1 TMC248 block diagram The TMC248 is a dual full bridge driver IC for bipolar stepper motor control applications. The chip is realized in a HVCMOS technology and directly drives eight external Low-RDS-ON high efficiency MOSFETs. A 4A driver can be realized in the size of a stamp. The TMC248 motor driver implements advanced features which are characteristic to TRINAMIC products. These features contribute toward precision, energy efficiency, reliability, smooth motion, and cooler operation in stepper motor applications. In addition to these performance enhancements, TRINAMIC motor drivers also offer safeguards to detect and protect against short circuit, overtemperature, overvoltage, and undervoltage conditions for enhancing safety and recovery from equipment malfunctions. www.trinamic.com TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 1.1 Advanced Features stallGuard™ Current Control Microstepping via SPI Mixed Decay Low Noise Chopper Slope Control Oscillator and Clock Selector The TMC248 offers sensorless load measurement and stall detection. Its ability to predict an overload makes the TMC248 an optimum choice for drives, where a high reliability is desired. Further, the integrated stallGuard™ feature makes the TMC248 a good choice for applications, where a reference point is needed, but where a switch is not desired. Current control serves a cool driver and motor. Internal DACs allow microstepping as well as smart current control. Its low power dissipation makes the TMC248 an optimum choice for drives, where a high reliability is desired. Easy to use digital control of microstepping. After choosing the desired microstep resolution the microcontroller sends digital values for each microstep current via SPI. DACs and comparators convert these digital values to analog signals for coil currents. This way, every microstep is initialized and controlled by the microcontroller. The TMC248 serves for the execution. Mixed decay can be used for smoother operation. The TMC248 allows implementing a low noise voltage PWM chopper by two microcontroller PWM outputs using its simple standalone mode. This way, a motor can be moved very smoothly at high microstep resolution without any noise. Slope control reduces electromagnetic emissions. Oscillator and clock selector provide the system clock from the onchip oscillator or an external source. 1.2 Control Interfaces There are two control interfaces from the motion controller to the motor driver: the SPI serial interface and the classical analog interface. 1.2.1 SPI Interface The SPI interface is used to write control information to the chip and read back status information. This interface must be used to initialize parameters and modes necessary to enable driving the motor. This interface may also be used for directly setting the currents flowing through the motor coils. The motor can be controlled through the SPI interface alone. The SPI interface is a bit-serial interface synchronous to a bus clock. For every bit sent from the bus master to the bus slave, another bit is sent simultaneously from the slave to the master. Communication between an SPI master and the TMC248 slave always consists of sending one 12-bit command word and receiving one 12-bit status word. The SPI command rate typically corresponds to the microstep rate at low velocities. At high velocities, the rate may be limited by CPU bandwidth to 10,000 to 100,000 commands per second, so the application may need to change to fullstep resolution. 1.2.2 Classical Non-SPI Control Mode (Standalone Mode) The driver can be controlled by analog current control signals and digital phase signals. www.trinamic.com 5 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 2 6 Pin Assignments SLP INA INB VCC GND VS VT 2.1 Package Outline 26 25 24 23 22 3 19 2 20 1 7 15 6 16 5 17 18 TMC248-LA 4 AGND ANN HA1 HA2 LA1 LA2 SRA 27 21 28 9 10 11 12 13 Note: The exposed die attach pad should be connected to a GND plane or can be left open. 14 OSC SDO SDI SCK CSN ENN SPE 8 BL2 HB1 HB2 LB1 LB2 SRB BL1 Top view Figure 2.1 TMC248 pin assignments 2.2 Signal Descriptions Pin AGND INA INB GND OSC HA1 HA2 HB1 HB2 LA1 LA2 LB1 LB2 SRA SRB SDO SDI SCK CSN SPE SLP ENN ANN BL1 BL2 VS VCC VT Number 1 27 26 24 8 3 4 20 19 5 6 18 17 7 16 9 10 11 12 14 28 13 2 15 21 23 25 22 www.trinamic.com Function Analog ground (reference for SRA, SRB, OSC, SLP, INA, INB, SLP) Analog current control phase A Analog current control phase B Digital and power GND Oscillator capacitor or external clock input for chopper Outputs for high side P-channel transistors. Outputs for low side N-channel transistors Bridge A / B current sense resistor input Data output of SPI interface (tri-state) Data input of SPI interface Serial clock input of SPI interface Chip select input of SPI interface Enable SPI mode (high active). Tie to GND for non-SPI applications Slope control resistor. Tie to GND for fastest slope Device enable (low active) and overvoltage shutdown input Enable analog current control via INA and INB (low active) Digital blank time select Motor supply voltage 3.0… 5.5V supply voltage for analog and logic circuits Short to GND detection comparator – connect to VS if not used TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 3 7 stallGuard - Stall Detection and Reference Search stallGuard provides a sensorless measurement of the load on the motor. The load detection is based on the motors back EMF of the coils. Thus, the stallGuard feature allows a digital read out of the mechanical load on the motor via the serial interface. stallGuard is important for: finding a reference point stall detection predicting an overload and assuring high reliability stallGuard is typically used for the noiseless reference search with a mechanical reference position. The quality of the result depends on three constraints from the stepper motor and its application: efficiency of a stepper motor in terms of mechanical power vs. power dissipation difference in mechanical load between free running and stall on barrier velocity of the stepper motor 3.1 stallGuard Measurement The stallGuard measurement value changes linearly over a wide range of load, velocity, and current settings. At maximum motor load, the value goes to zero or near to zero. This corresponds to a load angle of 90° between the magnetic field of the coils and magnets in the rotor. This also is the most energy-efficient point of operation for the motor. The load detection level depends on several factors: Motor velocity A higher velocity leads to a higher readout value. Motor resonance Motor resonances cause a high dynamic load on the motor, and thus measurement may give unsatisfactory results. Motor acceleration Acceleration phases also produce dynamic load on the motor. Mixed decay setting For load measurement mixed decay has to be off for some time before the zero crossing of the coil current. If mixed decay is used, and the mixed decay period is extended towards the zero crossing, the load indicator value decreases. Attention: To get a readout value, drive the motor using sine commutation and mixed decay switched off. The load measurement is available as a three bit load indicator during normal motion of the motor. A higher mechanical load on the motor results in a lower readout value. The value is updated once per fullstep. STALLGUARD VALUES Bits LD2 LD1 LD0 (unsigned 3 bit) Description 0 Highest mechanical load on motor, stall may occur. 1, 2 High mechanical load on motor. 3… 7 Less load on motor. A value in this range should be achieved in a suitable velocity range under no-load conditions, in order to get stable stall detection. 7: 100% stallGuard signal – lowest motor load. www.trinamic.com Value Range 0… 7 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 8 The stallGuard signal sensitivity curves show the reaction of the TMC248 to the stallGuard signal taken from measuring the motor. A certain stray occurs within the TMC248, but the resulting curve is monotonously. Typically, the curve for a certain device has a certain offset. For high values above 2, the percentage of the stray is relatively low, so that a motor reaching these values allows safe stall detection. Load-Measurement sensing Transfer Curve (typical and stray) LD2,1,0 code (bit 9, bit 10, bit 11) 111 110 61 101 40 100 28 011 19 010 12 001 89 111 80 56 43 33 25 5 18 000 0 19 35 95 48 70 100 stallGuard signal [% maximum] Load-Measurement sensing Transfer Curve (minimum values) 111 LD2,1,0 code (bit 9, bit 10, bit 11) 11 110 101 100 011 010 001 000 0 12 19 28 40 61 89 stallGuard signal [% maximum] Load-Measurement sensing Transfer Curve (maximum values) 111 LD2,1,0 code (bit 9, bit 10, bit 11) 5 110 101 100 011 010 001 000 0 18 25 33 43 56 Figure 3.1 stallGuard signal sensitivity curves www.trinamic.com 80 111 stallGuard signal [% maximum] TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 9 3.2 Implementing Sensorless Stall Detection The sensorless stall detection typically is used, to detect the reference point without the usage of a switch or photo interrupter. Therefore the actuator is driven to a mechanical stop, e.g. one end point in a spindle type actuator. As soon as the stop is hit, the motor stalls. Without stall detection, this would give an audible humming noise and vibrations, which could damage mechanics. TO GET RELIABLE STALL DETECTION, PROCEED AS FOLLOWS: 1. 2. 3. 4. 5. 6. Choose a motor velocity for reference movement. Use a medium velocity which is far enough from mechanical resonance frequencies. In some applications even the start and/or stop frequency may be used. So, the motor can stop within one fullstep if a stall is detected. Use a sine stepping pattern and switch off mixed decay (at least 1… 3 microsteps before zero crossing of the sine wave current in the related coil). Monitor the load indicator during movement. It should show a stable readout value in the range 3… 7 (LMOVE). If the readout is high (>5), the mixed decay portion may be increased. Choose a threshold value LSTALL between 0 and LMOVE - 1. Monitor the load indicator during the reference search movement (homing) as the desired velocity is reached. Readout is required at least once per fullstep. If the readout value at one fullstep is below or equal to LSTALL, stop the motor. If the motor stops during normal movement without hitting the mechanical stop, decrease LSTALL. If the stall condition is not detected at once, when the motor stalls, increase LSTALL. Attention: At maximum motor load, the value goes to zero or near to zero. Do not read out the value within one chopper period plus 8 microseconds after toggling one of the phase polarities! v(t) a_ m ax v_max t load indicator acceleration constant velocity max LMOVE LSTALL stall threshold min t acceleration jerk Figure 3.2 Implementing stallGuard www.trinamic.com stall stall detected! vibration TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 4 10 SPI Interface The TMC248 requires setting current absolute values and polarity for each microstep through the SPI interface to drive the motor in SPI mode. The SPI interface also allows reading back status values and bits. 4.1 Bus Signals The SPI bus on the TMC248 has five signals: SCK SDI SDO CSN ENN bus clock input serial data input serial data output chip select input (active low) enable input has to be active (low) in order to use SPI The slave is enabled for an SPI transaction by a low on the chip select input CSN. Bit transfer is synchronous to the bus clock SCK, with the slave latching the data from SDI on the rising edge of SCK and driving data to SDO following the falling edge. The most significant bit is sent first. A minimum of 12 SCK clock cycles is required for a bus transaction with the TMC248. If more than 12 clocks are driven, the additional bits shifted into SDI are shifted out on SDO after a 12-clock delay through an internal shift register. This can be used for daisy chaining multiple chips. CSN must be low during the whole bus transaction. When CSN goes high, the contents of the internal shift register are latched into the internal control register and recognized as a command from the master to the slave. If more than 12 bits are sent, only the last 12 bits received before the rising edge of CSN are recognized as the command. The SPI data word sets the current and polarity for both coils. By applying consecutive values, describing a sine and a cosine wave, the motor can be driven in microsteps. Every microstep is initiated by its own telegram. Please refer to the description of the analog mode for details on the waveforms required. The SPI interface timing is described in the timing section. We recommend the TMC429 to automatically generate the microstepping sequence and motor ramps for up to three motors. SERIAL DATA WORD TRANSMITTED TO TMC248 MSB TRANSMITTED FIRST Bit 11 10 9 8 7 6 5 4 3 2 1 0 Name MDA CA3 CA2 CA1 CA0 PHA MDB CB3 CB2 CB1 CB0 PHB Function Mixed decay enable phase A Current bridge A.3 Current bridge A.2 Current bridge A.1 Current bridge A.0 Polarity bridge A Mixed decay enable phase B Current bridge B.3 Current bridge B.2 Current bridge B.1 Current bridge B.0 Polarity bridge B www.trinamic.com Remark 1 = mixed decay MSB LSB 0 = current flow from OA1 to OA2 1 = mixed decay MSB LSB 0 = current flow from OB1 to OB2 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 11 SERIAL DATA WORD TRANSMITTED FROM TMC248 MSB TRANSMITTED FIRST Bit 11 10 9 8 7 6 5 4 Name LD2 LD1 LD0 1 OT OTPW UV OCHS Function Load indicator bit 2 Load indicator bit 1 Load indicator bit 0 Always 1 Overtemperature Temperature prewarning Driver undervoltage Overcurrent high side 3 2 1 OLB OLA OCB Open load bridge B Open load bridge A Overcurrent bridge B 0 OCA Overcurrent bridge A Note: - Remark MSB LSB 1 = Chip off due to overtemperature 1 = Prewarning temperature exceeded 1 = Undervoltage on VS 3 PWM cycles with overcurrent within 63 PWM cycles No PWM switch off for 14 oscillator cycles No PWM switch off for 14 oscillator cycles low side 3 PWM cycles with overcurrent within 63 PWM cycles low side 3 PWM cycles with overcurrent within 63 PWM cycles The current values correspond to a standard 4 Bit DAC, where 100% = 15/16. The content of all registers is cleared to 0 on power-on reset or disable via the ENN pin, bringing the IC to a low power standby mode. All SPI inputs have Schmitt-Trigger function. 4.2 Motor Coil Current Setting via SPI Current Setting CA3..0 / CB3..0 Percentage of Current TYPICAL TRIP VOLTAGE OF THE CURRENT SENSE COMPARATOR 0000 0001 0010 ... 1110 1111 0% 6.7% 13.3% ... 93.3% 100% 0 V (bridge continuously in slow decay condition) 23 mV 45 mV - INTERNAL REFERENCE OR ANALOG INPUT VOLTAGE OF 2V IS USED - 317 mV 340 mV 4.3 Base Current Control Mode via INA / INB in SPI Mode In SPI mode the IC can use an external reference voltage for each DAC. This allows the adaptation to different motors. Note: - This Base Current Control Mode is enabled by tying pin ANN to GND. A 2.0 V input voltage VIN gives full scale current of 100%. The range for VIN is 0… 3V. Min. 1 V recommended for best microstepping. The typical trip voltage of the current sense comparator is determined by the input voltage VIN and the DAC current setting (see table above). www.trinamic.com TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 12 Voltage VIN for reference 3V 2V 2V 1V Typical trip voltage of the current sense comparator 1.5x340mV 340mV 0.5x340mV t -0.5x340mV -340mV -1.5x340mV Figure 4.1 Relation between VIN and trip voltage of current sense comparator IN CASE A VARIABLE INPUT VOLTAGE VIN IS USED THE TYPICAL TRIP VOLTAGE IS CALCULATED: VTRIP,A = 0.17 VINA  percentage SPI current setting A VTRIP,B = 0.17 VINB  percentage SPI current setting B GENERATING INPUT VOLTAGE VIN A maximum of 3.0V VIN is possible. Multiply the percentage of base current setting and the DAC table to get the overall coil current. It is advised to operate at a high base current setting, to reduce the effects of noise voltages. This feature allows a high resolution setting of the required motor current using an external DAC or PWM-DAC (see schematic for examples). using PWM signal 8 level via R2R-DAC 2 level control INA 100K 100nF 10nF 100K R1 µC-Port .1 51K AGND µC-Port .2 R2 47K 51K INB 100K 51K ANN Figure 4.2 External DAC and PWM-DAC www.trinamic.com µC-Port .0 µC-Port +VCC µCPWM TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 13 4.4 Controlling Power Down via the SPI Interface Bit Standard function Control word function 11 10 9 8 7 6 5 4 3 2 1 0 MxA CA3 CA2 CA1 CA0 PhA MxB CB3 CB2 CB1 CB0 PhB - 0 0 0 0 - - 0 0 0 0 - Enable standby mode and clear error flags Programming current value 0000 for both coils at a time clears the overcurrent flags and switches the TMC248 into a low current standby mode with coils switched off. 4.5 Open Load Detection Open load is signaled if there are more than 14 oscillator cycles without PWM switch off. During overcurrent, undervoltage, or overtemperature conditions, the open load flags become active. Open load detection is not possible while the coil current is set to 0000. In this condition the chopper is off and the open load flag is read as inactive (0). The open load flags not only signal an open load condition, but also a torque loss of the motor, especially at high motor velocities. To detect only an interruption of the connection to the motor, it is advised to evaluate the flags during stand still or during low velocities only (e.g. for the first or last steps of a movement). 4.6 Standby and Shutdown Mode The TMC248 offers two possibilities for reducing power consumption under special conditions: the standby mode and the shutdown mode. STANDBY MODE - The circuit can be put into a low power standby mode by the user. The circuit automatically goes to standby on Vcc undervoltage conditions. The standby mode is available via the interface in SPI-mode and via the ENN pin in non-SPI mode. Before entering standby mode, the TMC248 switches off all power transistors and holds their gates in a disable condition using high ohmic resistors. In standby mode the oscillator becomes disabled and the oscillator pin is held at a low state. SHUTDOWN MODE - The shutdown mode is used for a further reduction of the supply current. The shutdown mode can be entered in SPI-mode by pulling the ENN pin high. In shutdown mode additionally all internal reference voltages become switched off and the SPI circuit is held in reset. 4.7 Power Saving The possibility to control the output current can dramatically save energy, reduce heat generation and increase precision by reducing thermal stress on the motor and attached mechanical components. Just reduce motor current during stand still: A slight reduction of the coil currents to 70% of the current of the last step halves power consumption! In typical applications a 50% current reduction during stand still is reasonable. www.trinamic.com TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 14 4.8 Bus Timing The SPI interface operates completely asynchronous. It is clocked by SCK and CSN, only. Figure 4.3 shows the timing parameters of an SPI bus transaction, and the table below specifies their values. CSN tCC tCL tCH tCC tCH SCK tDU SDI bit11 tDH bit10 bit0 tDO SDO tZC bit11 bit10 bit0 Figure 4.3 SPI Timing PROPAGATION TIMES (3.0 V  VCC  5.5 V, -40°C  Tj  150°C; VIH = 2.8V, VIL = 0.5V; tr, tf = 10ns; CL = 50pF, unless otherwise specified) SPI Interface Timing Parameter SCK frequency SCK stable before and after CSN change Width of SCK high pulse Width of SCK low pulse SDI setup time SDI hold time SDO delay time CSN high to SDO high impedance ENN to SCK setup time CSN high to LA / HA / LB / HB output polarity change delay Load indicator valid after LA / HA / LB / HB output polarity change AC-Characteristics clock period is tCLK Symbol fSCK t1 tCH tCL tDU tDH tD tZC tES tPD tLD Conditions ENN = 0 CL = 50pF *) **) Min DC 50 100 100 40 50 Typ Max 8 40 100 3 tOSC + 4 Unit MHz ns ns ns ns ns ns ns µs µs 5 7 µs 50 30 *) SDO is tri-stated whenever ENN is inactive (high) or CSN is inactive (high). **) Whenever the PHA / PHB polarity is changed, the chopper is restarted for that phase. Tthe chopper does not switch on, when the SRA resp. SRB comparator threshold is exceeded upon the start of a chopper period. 4.9 Using the SPI Interface with One or Multiple Devices The SPI interface allows either cascading of multiple devices, giving a longer shift register, or working with a separate chip select signal for each device, paralleling all other lines. Even when there is only one device attached to a CPU, the CPU can communicate with it using a 16 bit transmission. In this case, the upper 4 bits are dummy bits. 4.10 SPI Filter To prevent spikes from changing the SPI settings, SPI data words are only accepted, if their length is at least 12 bit. www.trinamic.com TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 5 Classical Non-SPI Control Mode (Standalone Mode) The driver can be controlled by analog current control signals and digital phase signals. Proceed as follows: Tie pin SPE to GND for enabling non-SPI mode. In non-SPI mode the SPI interface is disabled and the SPI input pins have alternate functions. The internal DACs are forced to 1111. 5.1 Pin Functions in Standalone Mode Pin SPE ANN SCK SDI CSN SDO Standalone mode name (GND) MDAN MDBN PHA PHB ERR ENN ENN INA, INB INA, INB Function in standalone mode Tie to GND to enable standalone mode Enable mixed decay for bridge A (low = enable) Enable mixed decay for bridge B (low = enable) Polarity bridge A (low = current flow from output OA1 to OA2) Polarity bridge B (low = current flow from output OB1 to OB2) Error output (high = overcurrent on any bridge, or over temperature). In this mode, the pin is never tri-stated. Standby mode (high active), high causes a low power mode of the device. Setting this pin high also resets all error conditions. Current control for bridge A, resp. bridge B. Refer to AGND. The sense resistor trip voltage is 0.34V when the input voltage is 2.0V. Maximum input voltage is 3.0V. 5.2 Input Signals for Microstep Control in Standalone Mode Attention: When transferring these waves to SPI operation, note that the mixed decay bits are inverted when compared to standalone mode. INA INB 90° 180° 270° 360° PHA (SDI) PHB (CSN) MDAN (ANN) MDBN (SCK) Use dotted line to improve performance at medium velocities Figure 5.1 Analog control for standalone mode www.trinamic.com 15 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 6 Current Setting 6.1 Sense Resistor for Current Setting Choose an appropriate sense resistor RS for setting the desired motor current. Basic information: The maximum motor current is reached, when the coil current setting is programmed to 1111. This results in a current sense trip voltage of 0.34V if the internal reference or a reference voltage of 2V is used. (Refer to chapter 4.3 for more information about current setting in SPI mode.) The current sense resistor of bridge A, B is calculated as: RSENSE = VTRIP / Imax RSENSE VTRIP Imax Current sense resistor of bridge A, B Programmed trip voltage of the current sense comparators Desired maximum coil current Mode of operation Operation in fullstep mode Operation in microstep mode Maximum motor current The maximum motor current is specified by the manufacturer. Multiply the value for fullstep mode by 1.41 for the maximum current Imax. EXAMPLE FOR TYPICAL APPLICATION RSENSE = 0.34V / Imax POSSIBLE SENSE RESISTOR SETTINGS RS Imax 723mA 0.47 1030mA 0.33 1545mA 0.22 2267mA 0.15 3400mA 0.10 6.2 Resistor RSH for High Side Overcurrent Detection The TMC248 detects an overcurrent to ground, when the voltage between VS (supply voltage) and VT (threshold voltage) exceeds 150mV. The high side overcurrent detection resistor should be chosen in a way that 100mV voltage drop are not exceeded between VS and VT, when both coils draw the maximum current. In a microstep application, this is the case when sine and cosine wave have their highest sum, i.e. at 45 degrees. This corresponds to 1.41 times the maximum current setting for one coil. In a fullstep application this is adequate to the double coil current. IN A MICROSTEP APPLICATION: RSH = 0.1V / (1.41  Imax) IN A FULLSTEP APPLICATION: RSH = 0.1V / (2  Imax) RSH: Imax: High side overcurrent detection resistor Maximum coil current If higher resistance values should be used, a voltage divider in the range of 10 to 100 can be used for VT. This might also be desired to limit the peak short to GND current, as described in the following chapter. A careful PCB layout is required for the sense resistor traces and for the RSH traces. www.trinamic.com 16 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 17 6.2.1 Making the Circuit Short Circuit Proof In most applications, a short circuit does not describe only one special condition. It typically involves inductive, resistive and capacitive components. Worst events are unclamped switching events, because huge voltages can build up in inductive components and result in a high energy spark going into the driver, which can destroy the power transistors. Note: Never disconnect the motor during operation as this can destroy the power transistors! An absolute protection against random short circuit conditions is not given, but pre-cautions can be taken to improve robustness of the circuit: In a short condition, the current can become very high before it is interrupted by the short detection, due to the blanking during switching and internal delays. The high-side transistors allow a high current flowing for the selected blank time. The lower the external inductivity, the faster the current climbs. If inductive components are involved in the short, the same current will shoot through the low-side resistor and cause a high negative voltage spike at the sense resistor. Both, the high current and the voltage spikes are dangerous for the driver. PROCEED AS FOLLOWS, IF SHORT CIRCUITS ARE EXPECTED: 1. 2. 3. Protect SRA/SRB inputs using a series resistance. Increase RSH (high side overcurrent detection resistor) to limit the maximum transistor current. Use the same value as for the sense resistors. Set the blank time as short as possible. The second point effectively limits the short circuit current, because the upper driver transistor with fixed ON gate voltage of 6V forms a constant current source together with its internal resistance and the high side overcurrent detection resistor RSH. A positive side effect is that only one type of low resistive resistor is required. The drawback is that power dissipation increases. VS 100nF RDIV VT 100R +VM RSH GND RSH=RSA=RSB internal reference 27R 18R RDIV values for Microstep: Fullstep: INA/INB up to3V 18R 12R CVM Example: A 0.33 Ohms sense resistor allows for roughly 1 A motor coil current. A high side short detection resistor of 0.33 Ohms limits maximum high side transistor current to typically 4A during a short circuit condition. The schematic shows the modifications to be done. SRA 100R SRB 100R RSA RSB GND Figure 6.1 Schematic with RSH=RSA=RSB www.trinamic.com The effectiveness of the steps described above should be tested in the given application! TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 7 18 Chopper Operation The currents through both motor coils are controlled using a chopper. The TMC248 uses a quiet fixed frequency chopper. Both coils are chopped with a phase shift of 180 degrees. The Chopper cycles through three phases: on, fast decay, and slow decay. +VM +VM +VM ICOIL ICOIL ICOIL RSENSE On Phase: current flows in direction of target current RSENSE Fast Decay Phase: current flows in opposite direction of target current RSENSE Slow Decay Phase: current re-circulation Figure 7.1 Chopper phases Fast decay switches off both upper transistors, while enabling the lower transistor opposite to the selected polarity. Slow decay always enables both lower side transistors. When the polarity is changed on one bridge, the PWM cycle on that bridge becomes restarted at once. 7.1 Mixed Decay Mode The mixed decay option is realized as a self stabilizing system, by shortening the fast decay phase, if the ON phase becomes longer. It is advised to enable the mixed decay for each phase during the second half of each microstepping half-wave, when the current is meant to decrease. This leads to less motor resonance, especially at medium velocities. MIXED DECAY IN APPLICATIONS WITH HIGH RESOLUTION OR LOW INDUCTIVITY MOTORS In applications requiring high resolution, or using low inductivity motors, the mixed decay mode can also be enabled continuously to reduce the minimum motor current which can be achieved. USING MIXED DECAY CONTINUOUSLY OR WITH HIGH INDUCTIVITY MOTORS AT LOW SUPPLY VOLTAGE If mixed decay mode is continuously on or high inductivity motors are used at low supply voltage, it is advised to raise the chopper frequency to minimum 36 kHz, because the half chopper frequency could become audible. With low velocities or during standstill mixed decay should be switched off. www.trinamic.com TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 19 target current phase A actual current phase A on slow decay on fast decay slow decay oscillator clock resp. external clock mixed decay disabled mixed decay enabled Figure 7.2 Chopper cycle 7.2 Chopper Frequency The PWM oscillator frequency can be set by an external capacitor. The internal oscillator uses a 28k resistor to charge / discharge the external capacitor to a trip voltage of 2/3 Vcc respectively 1/3 Vcc. It can be overdriven using an external CMOS level square wave signal. Do not set the frequency higher than 100 kHz and do not leave the OSC terminal open! The two bridges are chopped with a phase shift of 180 degrees at the positive and at the negative edge of the clock signal. The PWM oscillator frequency is calculated as: fOSC: COSC: PWM oscillator frequency Oscillator capacitor in nF OSCILLATOR FREQUENCIES fOSC typ. 16.7kHz 20.8kHz 25.0kHz 30.5kHz 36.8kHz 44.6kHz COSC 1.5nF 1.2nF 1.0nF 820pF 680pF 560pF An unnecessary high frequency leads to high switching losses in the power transistors and in the motor. For most applications a chopper frequency slightly above audible range is sufficient. When audible noise occurs in an application, especially with mixed decay continuously enabled, the chopper frequency should be two times the audible range. www.trinamic.com TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 20 7.3 Voltage PWM Mode for Low Noise Chopper The TMC248 uses a cycle-by-cycle based chopper system, because it brings the best performance over a wide range of velocities. It regulates the current by terminating each chopper cycle as soon as the target current has been reached. This direct current regulation provides good dampening of motor resonance, low motor power loss and automatic adaptation to the specific motor. On the other hand, chopper stability requires good decoupling between both motor coils and it needs a precise layout of the high current paths. Instabilities caused by magnetic coupling in the motor or by coupling of the coil current regulators due to electric coupling can lead to chopper noise and fine vibrations. Under normal conditions, these will not do any harm. In applications, where the motor moves very slowly or where precise standstill with low mass on the motor axis is required, a voltage PWM chopper is a good choice. The low noise feed forward chopper principle uses a voltage PWM controlled driving rather than current controlled driving. This is possible, because the stepper motor has a certain coil resistance. This resistance converts an externally applied voltage to current. As long as the motor velocity is low, back EMF caused by the motor rotation does not need to be taken into account. At increasing velocities, the motors back EMF has an increasing influence and influences coil current. This can be compensated by increasing the driver voltage with increasing velocity. Effects like motor temperature dependency of the coil resistance should be taken into account, in case the motor operates in an increased temperature range. The described compensation principle can be realized in a completely feed-forward way, based on the motor data, or by measuring the effective current and adding a regulation loop. The chopper principle described generates a certain motor voltage by toggling each motor phase with a certain PWM frequency. Therefore the motor full bridges either switch on the motor current in one direction or in the opposite direction. This way, the duty cycle of toggling the coil polarity produces a certain effective voltage on the coils: A 50 percent duty cycle gives a mean current of zero. A higher or lower duty cycle gives a positive or negative current. A high PWM resolution will bring a high microstep resolution. I +VM effective coil current -VM coil voltage PWM t +VM -VM +VM coil voltage PWM -VM coil voltage PWM 50% dutycylce Figure 7.3 Voltage PWM generates motor current 7.3.1 Calculating the PWM for Low Noise Chopper A microcontroller or an FPGA can be used for generating the two PWMs required to drive the motor. For a 256 microstep resolution a PWM resolution of 9 to 10 bit is required. Assuming a target chopper www.trinamic.com TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) frequency of roughly 20 kHz, a base clock frequency of 20 MHz (=210 x 20 kHz) is required to yield a 10 bit PWM. A 16 MHz clock frequency will allow realizing a 9 bit PWM with 31 kHz, or a resolution of 800 PWM steps with 20 kHz. This is a feasible value for most standard 8 bit or better microcontrollers. Basically, one motor coil is driven with a PWM, which duty cycle is modulated using a sine wave. The other coil with a cosine modulated PWM. Assuming, that the system supply voltage would exactly match the motor voltage required for nominal current, the PWM duty cycle will be altered between 100% for maximum positive current and 0% for maximum negative current. As this is not a typical constellation, the PWM modulation required to match the motor needs to be calculated. The PWM modulation is calculated as: PWMAmpl ICOILpeak RCOIL VM VBEMF PWM amplitude required to reach the nominal motor current. Half of this amplitude is applied in positive direction (additional to 50% duty cycle), and half of it is applied in negative direction (subtracted from 50% duty cycle) Nominal peak coil current of the motor, i.e. ICOILRMS * 1.41 Resistance of the motor coil Motor driver supply voltage (may be measured in the application) Velocity dependent back EMF voltage of the motor. It is measured in V/rad/s. At standstill VBEMF is zero and can be ignored for low RPM. For higher velocities, multiply it by the angular velocity of the motor. EXAMPLE A 1A RMS motor with 6.5Ohm coil resistance is to be operated from a 12V supply at low velocity. Therefore, the duty cycle needs to be modulated between 0.5 + 0.76/2 = 88% for the positive sine wave peak and 0.5 - 0.76/2 = 12% for the negative sine wave peak. 7.3.2 Hardware Setup for Low Noise Chopper The TMC248 provides a standalone mode, which allows direct control of coil polarity using a digital signal. Further, the coil current can be controlled using an analog voltage in the range 0 V… 3 V. As current control is done by PWM duty cycle, the integrated PWM based analog current control of the IC is not used. Therefore, in principle it would be possible to work without sense resistors. We recommend using the analog current limit as a safety feature. Further it can be used for allowing a fallback to classical fullstepping at higher velocity (in order to also allow faster movements): During voltage PWM mode the analog current control can be used to limit the motor current in case of an error. Therefore, the current limit must be set at least 20% to 30% higher than the desired maximum motor current for PWM operation (peak current value plus additional ripple). The mixed decay mode must be switched off (MDAN=MDBN=VCC), because it would interfere with voltage PWM operation. Both motor coil limits can be set to the same analog current limiting value: for a safety limit and for a change to fullstepping. In fullstepping switching to a lower value may be desired in order to match motor RMS current. The processor controlled PWM uses the polarity inputs (PHA, PHB) for both coils to control motor PWM. www.trinamic.com 21 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) PHA µC-PWM (sine modulated) PHB µC-PWM (cosine modulated) INA TMC248 µC port pin (switch current limit for fullstepping) R3 INB +VCC R2 R1 SPE 22 Figure 7.4 Controlling the driver with two PWMs in standalone mode 7.4 Adapting the Sine Wave for Smooth Motor Operation The optimization of the sine wave is possible for the mixed decay mode and for the voltage PWM mode. After reaching the target current in each chopper cycle, both, the slow decay and the fast decay cycle reduce the current by some amount. Especially the fast decay cycle has a larger impact. Thus, the medium coil current always is a bit lower than the target current. This leads to a flat line in the current shape flowing through the motor. It can be corrected, by applying an offset to the sine shape. In mixed decay operation via SPI, an offset of 1 does the job for most motors. Target current I Target current I Coil current Coil current t Coil current does not have optimum shape t Target current corrected for optimum shape of coil current Figure 7.5 Adapting sine wave for smooth motor operation www.trinamic.com TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 7.5 Blank Time The TMC248 uses a digital blanking pulse for the current chopper comparators. This prevents current spikes, which can occur during switching action due to capacitive loading, from terminating the chopper cycle. The lowest possible blanking time gives the best results for microstepping. A long blank time leads to a long minimum turn-on time, thus giving an increased lower limit for the current. Please remark, that the blank time should cover both, switch-off time of the lower side transistors and turn-on time of the upper side transistors plus some time for the current to settle. Thus the complete switching duration should never exceed 1.5µs. With slow external power stages it will become necessary to add additional RC-filtering for the sense resistor inputs. The TMC248 allows adapting the blank time to the load conditions and to the selected slope in four steps: BLANK TIME SETTINGS BL2 GND GND VCC VCC BL1 GND VCC GND VCC Typical blank time 0.6 µs 0.9 µs 1.2 µs 1.5 µs www.trinamic.com Remarks Very short. Will require good filtering on SRA and SRB. Works well in good low inductivity layouts. Default for most applications. May be used with slow bridges or high sense resistor trace inductivity. 23 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 8 24 Slope Control The output-voltage slope of the full bridge is controlled by a constant current gate charge / discharge of the MOSFETs. The charge / discharge current for the MOSFETs can be controlled by an external resistor: a reference current is generated by internally pulling the SLP-Pin to 1.25V via an integrated 4.7K resistor. This current is used to generate the current for switching on and off the power transistors. The gate-driver output current can be set in a range of 2… 25 mA by an external resistor: RSLP: IOUT: Slope control resistor Controlled output current of the low-side MOSFET driver The SLP-pin can directly be connected to AGND for the fastest output-voltage slope (respectively maximum output current). Please note, that there is a tradeoff between reduced electromagnetic emissions (slow slope) and high efficiency because of low dynamic losses (fast slope). Typical slope times range between 100ns and 500ns. Slope times below 100ns are not recommended, because they superimpose additional stress on the power transistors while bringing only very slight improvement in power dissipation. For applications where electromagnetic emission is very critical, it might be necessary to add additional LC (or capacitor only) filtering on the motor connections. For these applications emission is lower, if only slow decay operation is used. 25 IHDON 20 -IHDOFF / +/-ILD 15 10 5 0 0 2 5 10 RSLP [KOhm] Figure 8.1 RSLP versus IDH www.trinamic.com 20 50 100 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 9 Protection Functions 9.1 Overcurrent Protection and Diagnostic 9.1.1 Low Side Overcurrent The TMC248 uses the current sense resistors on the low side to detect an overcurrent. If a voltage above 0.61 V is detected, the PWM cycle is terminated at once and all transistors of the bridge are switched off for the rest of the PWM cycle. The error counter is increased by one. If the error counter reaches 3, the bridge remains switched off for 63 PWM cycles and the error flag is read as active. CLEARING ERROR FLAG AND COUNTER The user can clear the error condition in advance by clearing the error flag. The error counter is cleared, whenever there are more than 63 PWM cycles without overcurrent. There is one error counter for each of the low side bridges, and one for the high side. Note: The overcurrent detection is inactive during the blank pulse time for each bridge, to suppress spikes which can occur during switching. 9.1.2 Short to Ground and Overcurrent Detection The high side comparator detects a short to GND or an overcurrent, whenever the voltage between VS and VT becomes higher than 0.15 V at any time (except for the blank time period which is logically ORed for both bridges). If the voltage between VS and VT becomes higher than 0.15 V all transistors become switched off for the rest of the PWM cycle, because the bridge with the failure is unknown. In high side overcurrent conditions the user can determine which bridge sees the overcurrent, by selectively switching on only one of the bridges with each polarity (therefore the other bridge should remain programmed to 0000). CLEARING ERROR FLAGS The overcurrent flags can be cleared by disabling and re-enabling the chip either via the ENN pin or by sending a telegram with both current control words set to 0000. 9.2 Over Temperature Protection and Diagnostic The circuit switches off all output power transistors during an over temperature condition. The over temperature flag should be monitored to detect this condition. The circuit resumes operation after cool down below the temperature threshold. However, operation near the over temperature threshold should be avoided, if a high lifetime is desired. www.trinamic.com 25 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 9.3 Overvoltage Protection and ENN Pin Behavior Many suitable power MOSFETs are 30 V types. The TMC248 allows protecting the MOSFETs up to 40 V supply voltage while they are switched off. During disable conditions the circuit switches off all output power transistors and goes into a low current shutdown mode. All register contents are cleared to 0, and all status flags are cleared. The circuit in this condition can stand a higher voltage. The voltage is not limited by the maximum power MOSFET voltage any more. The enable pin ENN provides a fixed threshold of ½ VCC to allow a simple overvoltage protection up to 40V using an external voltage divider (see schematic). +VM R1 For switch off at 26 - 29V: at VCC=5V: R1=100K; R2=10K at VCC=3.3V: R1=160K; R2=10K ENN R2 µC-Port (opt.) low=Enable, high=Disable Figure 9.1 Overvoltage protection www.trinamic.com 26 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 10 Microstep Resolution After choosing the desired microstep resolution the microcontroller sends digital values for each microstep current via SPI. The following example shows how to initialize microsteps via SPI. SINE WAVE TABLE - The sine wave table below is used for 4-bit microstepping. The absolute values are left-shifted by one bit. Bit 0 is the sign bit (phase direction bit). Bit 5 is the mixed decay bit. It is set when the absolute value is falling. FUNCTION The function in the example below generates the microsteps. The values are read from the sine wave table and output to the TMC248 (via SPI interface.) Call this function with the ccw parameter set to 1 (to step in negative direction) or with ccw set to 0 (to step in positive direction). The function can be called in a timer interrupt, too. SENDING VALUES VIA SPI Set the CS line of the TMC248 low and send out the value of io by SPI (MSB first). Thereafter, set the CS line high again. EXAMPLE FOR GENERATING MICROSTEPS USING THE TMC248 UCHAR sinus_tab[64]={0x00, 0x02, 0x06, 0x08, 0x0c, 0x0e, 0x10, 0x14, 0x16, 0x18, 0x18, 0x1a, 0x1c, 0x1c, 0x1e, 0x1e, 0x3e, 0x3e, 0x3e, 0x3c, 0x3c, 0x3a, 0x38, 0x38, 0x36, 0x34, 0x30, 0x2e, 0x2c, 0x28, 0x26, 0x22, 0x01, 0x03, 0x07, 0x09, 0x0d, 0x0f, 0x11, 0x15, 0x17, 0x19, 0x19, 0x1b, 0x1d, 0x1d, 0x1f, 0x1f, 0x3f, 0x3f, 0x3f, 0x3d, 0x3d, 0x3b, 0x39, 0x39, 0x37, 0x35, 0x31, 0x2f, 0x2d, 0x29, 0x27, 0x23}; volatile UCHAR PhaseCount=0; void step(char ccw) { UINT MixedDecayXOR=0, io; if(!ccw) { PhaseCount++; } else { //The "Mixed Decay" bits must be reversed when running in CCW direction PhaseCount--; MixedDecayXOR=0x820; } io=((sinus_tab[PhaseCount & 63]100ns). To ensure reliability, connect a 500mA or 1A Schottky diode to both HA and HB outputs against VS to protect them. Types like MSS1P3, ZHCS1000, SS14 or BAR43 can be used. (2) These N-channel transistors have a high drain to gate charge, which may introduce destructive current impulses into the LA/LB outputs by forcing them below the ground level, especially when the miller capacitance (QGD) of the high side MOSFET is lower and thus it switches more quickly. As a thumb rule, the criteria is QGDLS / QGSLS * QGDLS / QGDHS > 2 (assuming slopes >100ns). To ensure reliability, connect a 500mA or 1A Schottky diode to both LA and LB outputs against GND to protect them against negative spikes. Types like MSS1P3, ZHCS1000, SS14 or BAR43 can be used. www.trinamic.com 29 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 30 12 Layout Considerations For optimal operation of the circuit a careful board layout is important, because of the combination of high current chopper operation coupled with high accuracy threshold comparators. 12.1 Grounding Please pay special attention to massive grounding. Depending on the required motor current, a single massive ground plane provides the best solution. The schematic highlights the high current paths which shall be routed separately, in case a GND plane cannot be realized, so that the chopper current does not flow through the system’s GND interconnections. Tie the pins AGND and GND and the die attach pad to the GND plane. 12.2 Filtering Capacitors Use enough filtering capacitors located near to the boards power supply input and small ceramic capacitors near to the power supply connections of the TMC248. Use low inductance sense resistors, or add a ceramic capacitor in parallel to each resistor to avoid high voltage spikes. In many applications it is beneficial to introduce additional RC-filtering into the SRA / SRB line (see Figure 12.1) to prevent spikes from triggering the short circuit protection or the chopper comparator. Alternatively, a 470nF ceramic capacitor can be placed across the sense resistors. If you want to take advantage of the thermal protection and diagnostics, ensure, that the power transistors are very close to the package and that there is a good thermal contact between the TMC248 and the external transistors. Note: Long or thin traces to the sense resistors may add substantial resistance and thus reduce the output current. Further, resulting inductivity will lead to poor chopper behavior. This is valid for the high side shunt resistor, too. Place the optional shunt resistor voltage divider near the TMC248. This avoids voltage drop in the VCC plane and adds up to the measured voltage. optional voltage divider VS 100nF RDIV RSH VT +VM 100R GND TMC248 SRA optional filter Bridge A Bridge B CVM 100R SRB 100R 2.2 4.7nF AGND Figure 12.1 Grounding TMC248 www.trinamic.com RSA RSB GND GNDPlane TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 12.3 Pull-up Resistors on Unused Inputs The digital inputs all have integrated pull-up resistors, except for the ENN input, which is in fact an analog input. Thus, there are no external pull-up resistors required for unused digital inputs which are meant to be positive. 12.4 Power Supply Sequencing Considerations Upon power up, the driver initializes and switches off the bridge power transistors. The Vcc supply voltage has to be at least 1.0 V and the Vs supply voltage has to be at least 5.0 V. This is a precondition for the internal startup logic to work properly. When Vs goes up with Vcc at 0 V, a medium current temporary cross conduction of the power stage can result at supply voltages between 2.4 V and 4.8 V. In this voltage range, the upper transistors conduct, while the gates of the lower transistors are floating. While this typically does no harm to the driver, it may hinder the power supply from coming up properly, depending on the power supply start up behavior. THERE ARE TWO POSSIBILITIES TO PREVENT THIS: - Add resistors from the LA and LB outputs to GND in the range of 1M keeping the low side N-channel MOSFETs gates at GND. Alternatively, either use a dual voltage power supply, or use a local regulator, generating the 5 V or 3.3 V Vcc voltages. Attention Some switching regulators do not start before the input voltage has reached 5V. Therefore it is recommended to use a standard linear regulator like 7805 or LM317 series or a low drop regulator or a switching regulator like the LM2595, starting at relatively low input voltages. www.trinamic.com 31 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 32 12.5 Layout Example Schematic 1- Top Layer (assembly side) 2- Inner Layer (GND) The layout example is based on a schematic using the TMC34NP or SI7501 MOSFETs. The short to GND detection uses a voltage divider to allow simple adaptation of the triggering current. RC filtering is included for SRA and SRB for best performance. 3- Inner Layer (supply VS) Figure 12.2 Layout example www.trinamic.com 4- Bottom Layer Assembly TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 33 13 Absolute Maximum Ratings The maximum ratings may not be exceeded under any circumstances. Operating the circuit at or near more than one maximum rating at a time for extended periods shall be avoided by application design. Parameter Supply voltage Supply max. 20000s Logic supply voltage Gate driver peak current (1) Gate driver continuous current Logic input voltage Analog input voltage Maximum current to / from digital pins and analog inputs Short-to-ground detector input voltage Junction temperature Storage temperature *1 Internally limited www.trinamic.com Symbol Min Max Unit VS VSM VCC IOP IOC VI VIA IIO -0.5 36 40 6.0 50 5 VCC+0.3V VCC+0.3V +/-10 V V V mA mA V V mA VVT TJ TSTG VS-1V -40 -55 VS+0.3V 150*1 150 V °C °C -0.5 -0.3 -0.3 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 34 14 Electrical Characteristics 14.1 Operational Range Parameter Symbol Min Max Unit TAI TAA TJ VS -25 -40 -40 7 125 125 140 34 °C °C °C V VCC fCLK RSLP 3.0 5.5 100 470 V kHz 1 Ambient temperature industrial* Ambient temperature automotive Junction temperature Bridge supply voltage (taking into account an increase of up to 2V due to energy fed back from motor) Logic supply voltage Chopper clock frequency Slope control resistor 0 K *1 The circuit can be operated up to 140°C, but output power derates. 14.2 DC Specifications DC characteristics contain the spread of values guaranteed within the specified supply voltage and temperature range unless otherwise specified. Typical values represent the average value of all parts. Logic supply voltage: VCC = 3.0 V… 5.5 V, Bridge supply voltage: VS = 7 V… 34 V Parameter Symbol Junction temperature: TJ = -40 °C … 140 °C, (unless otherwise specified) Conditions Min Typ Max Unit Gate drive current low side switch ON ILDON VLD < 4V 10 15 25 mA Gate drive current low side switch OFF ILDOFF5 -15 -25 -35 mA Gate drive current low side switch OFF ILDOFF3 -10 -15 -20 mA Gate drive current low side switch ON ILDON 15 25 40 mA Gate drive current low side switch OFF ILDOFF -15 -25 -40 mA Gate drive current high side switch ON IHDON -15 -25 -40 mA Gate drive current high side switch OFF IHDOFF 15 30 40 mA Deviation of Current Setting with Respect to Characterization Curve ISET 70 100 130 % Gate drive voltage high side ON VGH1 -5.1 -6.0 -8.0 V Gate drive voltage low side ON Gate drive voltage high side OFF Gate drive voltage low side OFF Gate driver clamping voltage Gate driver inverse clamping voltage VGL1 VGH0 VGL0 VGCL VGCLI VLD > 3V VCC = 5V VLD > 3V VCC = 3.3V VS > 8V, RSLP= 0K VLD < 4V VS > 8V, RSLP= 0K VLD > 4V VS > 8V, RSLP= 0K VS - VHD < 4V VS > 8V, RSLP= 0K VS - VHD > 4V Deviation from standard value, 10k 8V relative to VS 5.1 6.0 0 0 16 -0.8 8.0 -0.5 0.5 20 V V V V V www.trinamic.com -IH / IL = 20mA -IH / IL = -20mA 12 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) Parameter Symbol VCC undervoltage VCC voltage o.k. VCC supply current VCC supply current standby VCC supply current shutdown VS undervoltage VS voltage o.k. VS supply current with maximum current setting (static state) VS supply current shutdown or standby High input voltage (SDI, SCK, CSN, BL1, BL2, SPE, ANN) Low input voltage (SDI, SCK, CSN, BL1, BL2, SPE, ANN) Input voltage hysteresis (SDI, SCK, CSN, BL1, BL2, SPE, ANN) High output voltage (output SDO) Low output voltage (output SDO) Low input current (SDI, SCK, CSN, BL1, BL2, SPE, ANN) VCCUV VCCOK ICC ICCSTB ICCSD VSUV VCCOK ISSM High input voltage threshold (input ENN) Input voltage hysteresis (input ENN) High input voltage threshold (input OSC) Low input voltage threshold (input OSC) VT threshold voltage (referenced to VS) SRA / SRB voltage at DAC = 1111 VENNH SRA / SRB overcurrent detection threshold SRA / SRB comparator offset voltage (Standard device) SRA / SRB comparator offset voltage (Selected device) INA / INB input resistance www.trinamic.com 35 Conditions Min Typ Max 2.5 2.7 2.7 2.9 0.85 0.45 37 5.9 6.4 6 2.9 3.0 1.35 0.75 70 6.2 6.7 V V mA mA µA V V mA 28 50 µA VCC + 0.3 V 0.7 V fosc = 25 kHz ENN = 1 5.5 6.1 VS = 14V, Unit RSLP= 0K ISSD VS = 14V VIH 2.2 VIL -0.3 VIHYS 100 300 500 mV VCC – 0.6 0 VCC – 0.2 0.1 VCC V 0.4 V 70 µA µA µA tbd V VOH -IOH = 1mA VOL IOL = 1mA -IISL VI = 0 VCC = 3.3V VCC = 5.0V 2 10 25 1/2 VCC V VOSCH tbd 0.1 VENNH 2/3 VCC VOSCL tbd 1/3 VCC tbd V VVTD -130 -155 -180 mV 315 350 385 mV VSRS 570 615 660 mV VSROFFS1 -10 0 10 mV VSROFFS2 -6 0 6 mV 175 264 360 k VEHYS VTRIP RINAB internal ref. or 2V at INA / INB Vin  3 V TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 36 14.3 AC Specifications AC characteristics contain the spread of values guaranteed within the specified supply voltage and temperature range unless otherwise specified. Typical characteristics represent the average value of all parts. Logic supply voltage: VCC = 3.3 V, Bridge supply voltage: VS = 14.0 V, Ambient temperature: TA = 27 °C, External MOSFET gate charge = 3.2 nC Parameter Symbol Oscillator frequency using internal oscillator Effective Blank time Minimum PWM on-time Conditions Min Typ Max Unit fOSC COSC = 1nF 1% 20 25 31 kHz TBL BL1, BL2 = VCC BL1, BL2 = GND 1.35 1.5 0.7 1.65 µs µs Conditions Min Typ Max 145 155 15 145 15 165 TONMIN 14.4 Thermal Protection Parameter Thermal shutdown TJOT hysteresis Prewarning temperature TJWT hysteresis www.trinamic.com Symbol TJOT TJOTHYS TJWT TJWTHYS 135 155 Unit °C °C °C °C TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 37 15 Package Mechanical Data 15.1 Dimensional Drawings Attention: Drawings not to scale. All dimensions are in mm. Figure 15.1 Dimensional drawing Parameter Total thickness Stand off L/F thickness Lead width Body size X, Y Lead pitch EP size X, Y Lead length Package edge tolerance Mold flatness Coplanarity Lead offset Exposed pad offset Ref A A1 A3 b D, E e J, K L aaa bbb ccc ddd eee Min 0.80 0.00 0.2 3.6 0.35 Nom 0.85 0.035 0.203 0.25 5.0 0.5 3.7 0.4 0.1 0.1 0.08 0.1 0.1 Max 0.90 0.05 0.3 3.8 0.45 15.2 Package Code Device TMC248 www.trinamic.com Package QFN28 (RoHS) Temperature range -50… +125°C Code/ Marking TMC248-LA TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 16 Disclaimer TRINAMIC Motion Control GmbH & Co. KG does not authorize or warrant any of its products for use in life support systems, without the specific written consent of TRINAMIC Motion Control GmbH & Co. KG. Life support systems are equipment intended to support or sustain life, and whose failure to perform, when properly used in accordance with instructions provided, can be reasonably expected to result in personal injury or death. Information given in this data sheet is believed to be accurate and reliable. However no responsibility is assumed for the consequences of its use nor for any infringement of patents or other rights of third parties which may result from its use. Specifications are subject to change without notice. All trademarks used are property of their respective owners. 17 ESD Sensitive Device The TMC248 is an ESD-sensitive CMOS device and sensitive to electrostatic discharge. Take special care to use adequate grounding of personnel and machines in manual handling. After soldering the devices to the board, ESD requirements are more relaxed. Failure to do so can result in defects or decreased reliability. Note: In a modern SMD manufacturing process, ESD voltages well below 100V are standard. A major source for ESD is hot-plugging the motor during operation. As the power MOSFETs are discrete devices, the device in fact is very rugged concerning any ESD event on the motor outputs. All other connections are typically protected due to external circuitry on the PCB. www.trinamic.com 38 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 18 Table of Figures Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure Figure 1.1 TMC248 block diagram .................................................................................................................................... 4 2.1 TMC248 pin assignments ................................................................................................................................ 6 3.1 stallGuard signal sensitivity curves ............................................................................................................. 8 3.2 Implementing stallGuard ............................................................................................................................... 9 4.1 Relation between VIN and trip voltage of current sense comparator ............................................. 12 4.2 External DAC and PWM-DAC ........................................................................................................................ 12 4.3 SPI Timing ........................................................................................................................................................ 14 5.1 Analog control for standalone mode ....................................................................................................... 15 6.1 Schematic with RSH=RSA=RSB........................................................................................................................... 17 7.1 Chopper phases .............................................................................................................................................. 18 7.2 Chopper cycle .................................................................................................................................................. 19 7.3 Voltage PWM generates motor current ................................................................................................... 20 7.4 Controlling the driver with two PWMs in standalone mode ............................................................ 22 7.5 Adapting sine wave for smooth motor operation ............................................................................... 22 8.1 RSLP versus IDH................................................................................................................................................... 24 9.1 Overvoltage protection ................................................................................................................................. 26 11.1 Grounding TMC248 ....................................................................................................................................... 30 14.1 Dimensional drawing .................................................................................................................................. 37 www.trinamic.com 39 TMC248-LA DATASHEET (Rev. 1.01 / 2013-MAR-26) 19 Revision History Version Date Author Description BD = Bernhard Dwersteg SD – Sonja Dwersteg 0.90 BD 1.0 2012-JUN-22 SD 1.01 2013-MAR-26 BD Datasheet based on TMC249 datasheet, removed higher voltage and 64 microstep application notes, increased SPI frequency limit to 8MHz New design. Further information about stallGuard and low noise chopper. Layout example added. MOSFET list updated, updated criteria for necessity of gate driver output protection diodes 20 References [TMC32NP-PSO] [TMC34NP-PSO] TMC32NP-PSO MOSFET Datasheet TMC34NP-PSO MOSFET Datasheet Please refer to our web page http://www.trinamic.com. www.trinamic.com 40