TS2901CD14

TS2901 Quad Voltage Comparator DIP-14 SOP-14 Preliminary Pin assignment: 1. Output 2 14. Output 3 2. Output 1 13. Output 4 3. Vcc 12. Input D (+) 4. Input 1(-) 11. Input 4(+) 5. Input 1(+) 10. Input 4(-) 6. Input 2 (-) 9. Input 3(+) 7. Input 2(+) 8. Input 3 (-) Supply Voltage Range 2V to 36V Quad Channel Comparator General Description The TS2901 is quad independent precision voltage comparators capable of single-supply or split-supply operation. The specifications as low as 2.0 mV make this device an excellent ground level with single-supply operation. Input offset-voltage selection for many applications in consumer automotive, and It is designed to permit a common mode range-to- industrial electronics. The TS2901 is offered in SOP-14 and DIP-14 package. Features Output voltage compatible with DTL, ECL, TTL, MOS and CMOS Logic Levels Low input bias current -25nA Low input offset current ±5nA Low input offset voltage ±5mV(max) Input common mode range to ground level Differential input voltage range equal to power supply voltage Pin Assignment Ordering Information Part No. TS2901CD14 TS2901CS14 Operating Temp. o -40 ~ +85 C Package DIP-14 SOP-14 Schematic (each comparator) TS2901 1-6 2005/04 rev. B Absolute Maximum Rating Supply Voltage Differential Input Voltage Input Common Mode Voltage Range Input Current (note 2) Output Short Circuit to Ground Output Sink Current (note 1) Power Dissipation @ Ta=25 oC Derate above 25 C Operating Junction Temperature Range Storage Temperature Range Lead Temperature 1.6mm(1/16”) from case for 10Sec. o Vcc VIDR VICR Iin Isc Isink +36 or ±18 36 -0.3 to 36 50 Continuous 20 1.0 V V V mA mA W mW/ oC o o o 1/Rθja TJ TSTG TLEAD 8 0 ~ +125 -65 ~ +150 260 C C C Electrical Characteristics (VCC = 5V, Ta =25 oC; unless otherwise specified.) Characteristics Input Offset Voltage (note 3) Input Offset Current (note 3) Input Bias Current (note 3, 4) (output in linear range) Input Common Mode Voltage Range (note 6) Voltage Gain Large Signal Response Time Response Time (note 6) Output Sink Current Output Saturation Voltage Output Leakage Current Input Offset Voltage (note 3) Input Offset Current (note 3) Input Bias Current (note 3, 4) (output in linear range) Input Common Mode Voltage Range (note 6) Output Saturation Voltage Output Leakage Current Input Differential Voltage Supply Current Symbol Vio Iio IIB VICR AVOL -tTLH ISINK VOL IOL Vio Iio IIB VICR VOL IOL VID Icc RL ≥15K, Vcc = 15Vdc. Vin = TTL Logic Swing. Vref = 1.4Vdc, VRL = 5Vdc. RL= 5.1KΩ VRL = 5Vdc, RK = 5.1KΩ Vin-≥1Vdc, Vin+=0Vdc, VO- ≤15 Vdc Vin- ≥1Vdc, Vin+=0, ISINK ≤4mA, Vin-=0V, Vin+≥1Vdc, Vo=5Vdc TLOW ≤ Ta ≤THIGH TLOW ≤ Ta ≤THIGH TLOW ≤ Ta ≤THIGH TLOW ≤ Ta ≤THIGH Vin- ≥1Vdc, Vin+=0, ISINK ≤4mA, TLOW ≤Ta ≤THIGH Vin-=0V, Vin+≥1Vdc, Vo=30V All Vin ≥ 0Vdc,TLOW ≤Ta≤THIGH RL = ∞ (for all comparators) -6.0 -----0 ----1.3 16 250 0.1 9.0 50 200 -400 --0.8 --400 -15 200 500 VCC-2.0 700 1.0 VCC 2.0 uS mA mV nA mV nA nA V mV nA V mA -300 -nS Test condition Min ---0 25 Typ 2.0 5.0 25 -100 Max 7.0 50 250 VCC-1.5 -Unit mV nA nA V V/mV TS2901 2-6 2005/04 rev. B Electrical Characteristics (Continues) Note 1. The maximum output current may be as high as 20mA, independent of the magnitude of VCC Output short circuits to VCC can cause excessive heating and eventual destruction. Note 2. This magnitude of input current will only occur if the leads are driven more negative than ground or the negative supply voltage. This is due to the input PNP collector base junction become forward biased, acting as an input clamp diode. There is also a lateral PNP parasitic transistor action which can cause the output voltage of the comparators to go to the VCC voltage level (or ground if overdrive is large) during the time that an input is driven negative. This will not destroy the device when limited to the max rating and normal output states will recover when the inputs become ≥ground or negative supply. Note 3. At the output switch point, VO=1.4Vdc, RS ≤100Ω, 5.0Vdc≤ VCC ≤30Vdc, with the inputs over the full common-mode range (0Vdc to VCC -1.5Vdc). Note 4. The bias current flows out of the inputs due to the PNP input stage. This current is virtually constant, independent of the output state. Note 5. The response time specified is for a 100mV input step with 5mV overdrive For larger signals, 300ns is typical. Note 6. Positive excursions of input voltage may exceed the power supply level. As long as one of the inputs remain within the common-mode range, the comparator will provide the proper output state. Note 7. The comparator will inhibit proper output state if one of the inputs is become greater than VCC, the other input must remain within the common mode range. The low input state must not be less than -0.3volts of ground of minus supply. TS2901 3-6 2005/04 rev. B Applications Information This quad comparator feature high gain, wide bandwidth characteristics. This gives the device oscillation tendencies if the outputs are capacitive coupled to the inputs via stray capacitance. This oscillation manifests itself during output transitions (VOL to VOH). To alleviate this situation input resistors