TS34063ACD

TS34063AA Dc to Dc Converter Controller Pin assignment: 1. SC 2. SE 3. CT 4. Gnd 5. Comp. 6. Vcc 7. Ipk 8. Vdriver Supply Voltage Range 3 V to 40V Output Driving Current 1.5A Oscillator Frequency up to 100KHz General Description The TS34063A is a monolithic switching regulator and subsystem intended for use as DC to DC converter. It contains an internal temperature compensated reference, comparator, controlled duty cycle oscillator with an active peak current limit circuit, drive and a high current output switch. The TS34063A is specifically designed to be incorporated in step-up, step-down and voltage inverting converter applications. The TS34063A is offered in SOP-8 and DIP-8 package. Features Power forward control circuit Operating voltage form 3V to 40V Low standby current Current limit adjustable Output switch current up to 1.5A Variable oscillator frequency up to 100KHz (max) Output voltage adjustable Pin Descriptions Name SC SE CT Gnd Comp. Vcc Ipk Vdriver Description Switch Collector Switch Emitter Timing Capacitor Ground Comparator Inverting Input Vcc Collector Ipk Sense Driver Applications Charger xD-ROM, xDSL product DC to DC converter s Ordering Information Part No. TS34063ACD TS34063ACS Operating Temp. (Ambient) o -20 ~ +85 C Package DIP-8 SOP-8 Block Diagram TS34063A 1-8 2005/02 rev. A Absolute Maximum Rating Supply Voltage Comparator Input Voltage Range Switch Collector Output Voltage Switch Emitter Voltage Switch Collector to Emitter Voltage Driver Collector Voltage Driver Collector Current (note 1) Output Switching Current Power Dissipation DIP-8 SOP-8 Operating Junction Temperature Range Storage Temperature Range VCC VFB VC(SW) VE(SW) VCE(SW) Vc(driver) Ic(driver) ISW Pd TJ TSTG 40 - 0.3 ~ 40 40 40 40 40 100 1.5 1.0 0.5 -0 ~ +125 -65 ~ +150 V V V V V V mA A W o o C C Note: Maximum package power dissipation limits must be observed Electrical Characteristics (VCC =5V, Ta =25 oC; unless otherwise specified.) Parameter Oscillator (OSC) Frequency Charge Current Discharge Current Discharge to Charge current ratio Current Limit Sense Voltage Output switch (note1) Saturation Voltage Saturation Voltage DC current gain Collector off-state current Comparator Threshold Voltae Line regulation Total device VCC = 5V ~ 40V, CT = 1nF, Supply Current ICC pin7=Vcc, pin5>Vth, pin2=Gnd, remaining pins -1.6 3 mA VREF RegLine VCC = 3V ~ 40V 1.225 -1.25 -1.275 6 V mV VCE(SAT) VCE(SAT) HFE IC(OFF) ISW = 1A, pin1,8 connected) ISW = 1A, Id=50mA ISW = 1A, Vce= 0.5V Vce= 40V ----1.0 0.45 75 0.01 1.3 0.7 -100 V V -uA FOSC ICHARGE IDISCHARGE IDISCHARGE / ICHARGE VIPK(SENSE) CT = 1nF, Vpin5= 0V VCC = 5V ~ 40V VCC = 5V ~ 40V Pin7 to Vcc IDISCHARGE = ICHARGE 24 ---250 33 30 200 6.5 -42 ---350 KHz uA uA -mV Symbol Test Conditions Min Typ Max Unit open Note: 1. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient temperature as possible 2. If the output switch is driven into hard saturation (non-Darlington configuration) at low switch currents (=30mA), it may take up to 2uS for it to come out of saturation. This condition will shorten the off time at frequencies >= 30KHz, and is magnified at high temperature. This condition does not occur with a Darlington configuration, since the output switch cannot saturate. If a non-Darlington configuration is used, the following output drive condition is recommended: Forced Bata of output switch: Ic output / (Ic driver – 7mA*) >= 10 * The 100ohm resistor in the emitter of the driver divide requires about 7mA before the output switch conducts. TS34063A 2-8 2005/02 rev. A Circuit Description TS34063A 3-8 2005/02 rev. A Typical Application Circuit Figure 7. Step Up Converter Test LINE REGULATION Load Regulation Output Ripple Efficiency Output Ripple with Optional Filter Conditions Vin= 8V~16V, Io= 175mA Vin= 12V, Io= 75mA to 175mA Vin=12V, Io= 175mA Vin=12V, Io= 175mA Vin=12V, Io= 175mA Results 30mV +/- 0.05% 10mV +/- 0.017% 400mVpp 87.7% 40mVpp TS34063A 4-8 2005/02 rev. A Typical Application Circuit (continues) Figure 9. Step Down Converter Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency Output Ripple with Optional Filter Conditions Vin= 15V~25V, Io= 500mA Vin= 25V, Io= 50mA to 500mA Vin= 25V, Io= 500mA Vin= 25V, RL= 0.1ohm Vin= 25V, Io= 500mA Vin= 25V, Io= 500mA Results 12mV +/- 0.12% 3mV +/- 0.03% 120mVpp 1.1A 83.7% 40mVpp TS34063A 5-8 2005/02 rev. A Typical Application Circuit (continues) Figure 11. Voltage Inverting Converter Test Line Regulation Load Regulation Output Ripple Short Circuit Current Efficiency Output Ripple with Optional Filter Conditions Vin= 4.5V~6.0V, Io= 100mA Vin= 5V, Io= 10mA to 100mA Vin= 5V, Io= 100mA Vin= 5V, RL= 0.1ohm Vin= 5V, Io= 100mA Vin= 5V, Io= 100mA Results 3mV +/- 0.012% 22mV +/- 0.09% 500mVpp 900mA 62.2% 70mVpp TS34063A 6-8 2005/02 rev. A Design Formula Table Test Step Up Step Down Voltage Inverting ton toff ( ton+ toff ) CT Ipk(switch) Vout + Vf − Vin (min) Vcc (min) − Vsat 1 f min 4.0 x 10 –5 ton 2Iout(max) ⎜ ⎜ Vout + Vf Vcc − Vsat − Vout 1 f min 4.0 x 10 –5 ton 2Iout(max) | Vout | +Vf Vcc − Vsat 1 f min 4.0 x 10 –5 ton 2Iout(max) ⎜ ⎜ ⎞ ⎛ ton + 1⎟ ⎟ ⎠ ⎝ toff ⎞ ⎛ ton + 1⎟ ⎟ ⎠ ⎝ toff Rsc ⎞ ⎛ 0.3 ⎜ ⎟ ⎜ Ipk ( switch) ⎟ ⎠ ⎝ ⎛ Vin( min ) − Vsat ⎞ ⎜ ⎜ Ipk(switch) ⎟ * ton( max ) ⎟ ⎝ ⎠ ⎞ ⎛ 0.3 ⎜ ⎟ ⎜ Ipk ( switch) ⎟ ⎠ ⎝ ⎛ Vin (min) − Vsat − Vout ⎞ ⎜ ⎟ * ton (max) ⎜ ⎟ Ipk ( switch ) ⎝ ⎠ ⎞ ⎛ 0.3 ⎜ ⎟ ⎜ Ipk ( switch) ⎟ ⎠ ⎝ ⎛ Vin(min) − Vsat ⎞ ⎜ ⎜ Ipk ( switch) ⎟ * ton(max) ⎟ ⎝ ⎠ L(min) Co ⎛ Iout * ton ⎞ ⎜9 ⎟ ⎜ Vripple( pp ) ⎟ ⎠ ⎝ ⎛ Ipk ( switch)(ton + toff ) ⎞ ⎟ ⎜ ⎟ ⎜ 8Vripple( pp ) ⎠ ⎝ ⎛ Iout * ton ⎞ ⎜9 ⎟ ⎜ Vripple( pp ) ⎟ ⎠ ⎝ Terms and Definitions Vsat = Saturation Voltage of the output switch. Vf = Forward Voltage drop of the rectifier. The following power supply characteristics must be chosen: Vin= Normal input voltage Vout: Desied Output voltage, |Vout| =1.25 (1+R2 / R1) Iout : Desired output current. fmin : Minimum desired output switching frequency at the selected values for Vin and Io. Vripple(p-p): Desired peak-to-peak output ripple voltage. in practice, the calculated capacitor value will need to be increased due to its equivalent series resistance and board layout. The ripple voltage should be kept to a low value since it will directly affect the line and load regulation. TS34063A 7-8 2005/02 rev. A SOP-8 Mechanical Drawing A DIM SOP-8 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 4.80 5.00 0.189 0.196 3.80 4.00 0.150 0.157 1.35 1.75 0.054 0.068 0.35 0.49 0.014 0.019 0.40 1.25 0.016 0.049 1.27 (typ) 0.05 (typ) 0.10 0.25 0.004 0.009 0o 7o 0o 7o 5.80 6.20 0.229 0.244 0.25 0.50 0.010 0.019 16 9 B P 1 8 G C D K M R F A B C D F G K M P R DIP-8 Mechanical Drawing A DIP-8 DIMENSION MILLIMETERS INCHES MIN MAX MIN MAX 9.07 9.32 0.357 0.367 6.22 6.48 0.245 0.255 3.18 4.45 0.125 0.135 0.35 0.55 0.019 0.020 2.54 (typ) 0.10 (typ) 0.29 0.31 0.011 0.012 3.25 3.35 0.128 0.132 7.75 8.00 0.305 0.315 10o 10o 8 5 DIM B 1 4 L C K G D M J A B C D G J K L M TS34063A 8-8 2005/02 rev. A