TS39105

TS39105 1A Ultra Low LDO with Enable TO-252-4L (PPAK) TO-252-5L Pin Definition: 1. Input 2. Enable 3. Output (tab) 4. N/C 5. Ground General Description The TS39105 are 1A ultra low dropout linear voltage regulators that provide low voltage, high current output from an extremely small package. These regulators offers extremely low dropout (typically 400mV at 1A) and very low ground current (typically 12mA at 1A). The TS39105 are fully protected against over current faults, reversed input polarity, reversed lead insertion, over temperature operation, positive and negative transient voltage spikes, logic level enable control and error flag which signals whenever the output falls out of regulation. On the TS39105, the enable pin may be tied to Vin if it is not required for enable control. Features ● ● ● ● ● ● Dropout voltage typically 0.4V @Io=1.0A Output Current up to 1A Low Ground Current Extremely Fast Transient Response Reversed Leakage & Reverse Battery Protection Current Limit & Thermal Shutdown Protection Ordering Information Part No. Package Packing TS39105CP4xx RO TO-252-4L 2.5Kpcs / 13” Reel TS39105CP5xx RO TO-252-5L 2.5Kpcs / 13” Reel Note: Where xx denotes voltage option, available are 18=1.8V, 25=2.5V, 33=3.3V, 50=5.0V Application ● ● ● ● ● ● ● ● ● ULDO Linear Regulator for PC add-in Cards TM PowerPC Power Supplies Battery Powered Equipment Consumer and Personal Electronics High Efficiency Linear Power Supplies SMPS Post Regulator and DC to DC Modules High-efficiency Post Regulator for Switching Supply Portable Application Low-Voltage microcontrollers and Digital Logic Typical Application Circuit Absolute Maximum Rating (Note 1) Parameter Supply Voltage Enable Voltage Operation Input Voltage Operation Enable Voltage Power Dissipation (Note 4) Operating Junction Temperature Range Storage Temperature Range Lead Soldering Temperature (260 C) ESD 1 /7 o Symbol VIN VEN VIN (operate) VEN (operate) PD TJ TSTG Value -20V ~ +20 +20 +2.25 ~ +16 +2.25 ~ +16 Internally Limited -40 ~ +125 -65 ~ +150 5 (Note 3) Units V V V V W o o C C S Version: A08 TS39105 1A Ultra Low LDO with Enable Electrical Characteristics Parameter Conditions 10mA ≤ IL ≤ 1.0A, Vo+1V ≤ VIN ≤ 8V 10mA ≤ IL ≤ 1.0A, 2.5V ≤ VIN ≤ 16V IL=10mA, Vo+1V ≤ VIN ≤ 16V VIN =Vout+1V, 8mA≤IL≤300mA VIN =Vout+1V, 10mA≤IL≤1A IL=100mA IL=500mA IL=1.0A IL=100mA IL=500mA IL=1.0A VIN = VOUT + 1V, VIN =2.5V for fixed reference output voltage, Venable= 2.25V, Ta = 25 C, unless otherwise specified. o Min 0.980|Vo| Typ Max 1.020|Vo| Unit V V % % ppm/ C mV o Output Voltage VOUT 0.970|Vo| ------------2.25 --0.05 0.05 0 .2 40 100 275 400 0.7 4.0 12.0 1.8 ----1.030|Vo| 0 .5 0.1 1.0 100 250 350 630 2 6 20 -0.8 -75 4 Line Regulation Load Regulation Output Voltage Temp. Coefficient Dropout Voltage (Note 5) ΔVOUT = -1% Quiescent Current (Note 6) Current Limited VIN= VOUT +1V mA A VOUT =0, VIN = VOUT +1V Low (OFF) High (ON) VEN =2.25V VEN =0.8V Enable Input Input Logic Voltage Enable Pin Input Current V uA Thermal Performance Condition Thermal Resistance Junction to Case Package type TO-252-4L TO-252-5L Typ 10 10 Unit o C/W Note 1: Absolute Maximum Rating is limits beyond which damage to the device may occur. For guaranteed specifications and test conditions see the Electrical Characteristics. Note 2: The device is not guaranteed to operate outside its operating rating. Note 3: Devices are ESD sensitive. Handling precautions recommended. Note 4: The maximum allowable power dissipation is a function of the maximum junction temperature, TJ, the junction to ambient thermal resistance, ӨJA, and the ambient temperature, Ta. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. The effective value of ӨJA can be reduced by using a heat sink, Pd(max) = (TJ(max) – Ta) / ӨJA. Note 5: Dropout voltage is defined as the input to output differential at which the output voltage drops -1% below its nominal value measured at 1V differential. Note 6: Ground pin current is the regulator quiescent current. The total current drawn from the source is the sum of the ground pin current and output load current, IGND = IIN - IOUT for fix output voltage, , IGND = IIN - IOUT +10mA for fix reference output voltage in full load regulation. o Note 8: Output voltage temperature coefficient is ΔVOUT (worse cast) / (TJ(max) – TJ(MIN)) where is TJ(max) +125 C and o TJ(MIN) is 0 C. 2 /7 Version: A08 TS39105 1A Ultra Low LDO with Enable Functional Diagram Application Information The TS39105 are high performance with low dropout voltage regulator suitable for moderate to high current and voltage regulator application. Its 630mV dropout voltage at full load and over temperature makes it especially valuable in battery power systems and as high efficiency noise filters in post regulator applications. Unlike normal NPN transistor design, where the base to emitter voltage drop and collector to emitter saturation voltage limit the minimum dropout voltage, dropout performance of the PNP output of these devices is limited only by low VCE saturation voltage. The TS39105 is fully protected from damage due to fault conditions. Linear current limiting is provided. Output current during overload conditions is constant. Thermal shutdown the device when the die temperature exceeds the maximum safe operating temperature. Transient protection allows device survival even when the input voltage spikes above and below nominal. The output structure of these regulators allows voltages in excess of the desired output voltage to be applied without reverse current flow. Output Capacitor Requirement The TS39105 requires an output capacitor to maintain stability and improve transient response is necessary. The value of this capacitor is dependent upon the output current, lower currents allow smaller capacitors. TS39105 output capacitor selection is dependent upon the ESR of the output capacitor to maintain stability. When the output capacitor is 10uF or greater, the output capacitor should have an ESR less than 2Ω. This will improve transient response as well as promote stability. Ultra low ESR capacitors (