TS393CS

TS393 Dual Voltage Comparator Pin assignment: 1. Output 2. Input A (-) 3. Input A (+) 4. Gnd 5. Input B (+) 6. Input B (-) 7. Output B 8. Vcc Supply Voltage Range -18 V to 18V Dual Channel Comparator General Description The TS393 is dual independent precision voltage comparators capable of single-supply or split-supply operation. The specifications as low as 2.0 mV make this device an excellent ground level with single-supply operation. Input offset-voltage selection for many applications in consumer automotive, and It is designed to permit a common mode range-to- industrial electronics. The TS393 is offered in 8 pin SOP-8 and DIP-8 package. Features Output voltage compatible with DTL, ECL, TTL, MOS and CMOS Logic Levels Low input bias current -25nA Low input offset current -5.0nA Low input offset voltage --5.0mV(max) Input common mode range to ground level Differential lnput voltage range equal to power supply voltage Very low current drain independent of supply voltage - 0.4mA Wide single-supply range - 2.0Vdc to 36Vdc Split-supply range ±1.0Vdc to ±18Vdc Block Diagram Ordering Information Part No. TS393CD TS393CS Operating Temp. 0 ~ +70 oC Package DIP-8 SOP-8 Schematic (each comparator) TS393 1-6 2003/12 rev. A Absolute Maximum Rating Supply Voltage Differential Input Voltage Input Common Mode Voltage Range Input Current (note 2) Output Short Circuit to Ground Output Sink Current (note 1) Power Dissipation @ Ta=25 C Derate above 25 C Operating Junction Temperature Range Storage Temperature Range Lead Temperature 1.6mm(1/16”) from case for 10Sec. o o Vcc VIDR VICR Iin Isc Isink +36 or ±18 36 -0.3 to 36 50 Continuous 20 570 Vdc Vdc Vdc mA mA mW mW/ oC o o o 1/Rθja TJ TSTG TLEAD 5.7 0 ~ +125 -65 ~ +150 260 C C C Electrical Characteristics (VCC = 5V, TLOW ≤ Ta ≤THIGH; unless otherwise specified.) Characteristics Input Offset Voltage (note 3) Input Offset Current Input Offset Current (note 4) Input Common Mode Voltage Range (note 5) Voltage Gain Large Signal Response Time Response Time (note 6) Input Differential Voltage (note 7) Output Sink Current Output Saturation Voltage ISINK VOL tTLH VID AVOL -Symbol Vio Iio IIB VICR Test condition Ta =25 C TLOW ≤ Ta ≤THIGH Ta =25 oC TLOW ≤ Ta ≤THIGH Ta =25 C TLOW ≤ Ta ≤THIGH Ta =25 C TLOW ≤ Ta ≤THIGH RL ≥15K, Vcc = 15Vdc. Ta =25 C Vin = TTL Logic Swing. Vref = 1.4Vdc, VRL = 5Vdc. RL 5.1KΩ, Ta =25 oC VRL = 5Vdc, RK = 5.1KΩ Ta =25 oC All Vin ≥ Gnd or V-Supply (if used) Vin-≥1Vdc, Vin+=0Vdc, VO- ≤1 Vdc, Ta =25 C Vin- ≥1Vdc, Vin+=0, ISINK ≤4mA, Ta =25 oC TLOW ≤ Ta ≤THIGH Output Leakage Current IOL Vin-=0V, Vin+≥1Vdc, P=5Vdc. Ta =25 C Vin-=0V, Vin+≥1V, VO=30Vdc TLOW ≤ Ta ≤THIGH Supply Current Icc RL = ∞, Ta =25 C o o o o o o o Min ------0 0 50 -- Typ ±1.0 -±5.0 -25 ---200 300 Max ±5.0 9.0 ±50 ±150 250 400 VCC-1.5 VCC-2.0 --- Unit mV nA nA Volts V/mV nS --60 1.3 -16 -VCC -- uS V mA mV ------- 150 -0.1 -0.4 -- 400 700 nA -1000 1.0 2.5 mA RL = ∞, VCC =30 V TS393 2-6 2003/12 rev. A Electrical Characteristics (Continues) Note 1. The max. Output current may be as high as 20mA, independent of the magnitude of VCC, output short circuits to VCC can cause excessive heating and eventual destruction. Note 2. This magnitude of input current will only occur if the input leads are driven more negative than ground or the negative supply voltage. This is due to the input PNP collector base junction becoming forward biased acting as an input clamp diode. There is also a lateral PNP parasitic transistor action on the IC chip. This phenomena can cause the output voltage of the comparators to go to the VCC voltage level (or ground if overdrive is large) during the time the input is driven negative. This will not destroy the device and normal output states will recover when the inputs become -0.3V of ground or negative supply. Note 3. At output switch point, VO=1.4Vdc, RS=0Ω with VCC from 5Vdc to 30Vdc, and over the full input common-mode Note 4. Due to the PNP transistor inputs, bias current will flow out of the inputs, this current is essentially constant independent of the output state, therefore, no loading changes will exist on the input lines. Note 5. Input common mode of either input should not be permitted to go more than 0.3V negative of ground or minus supply. The upper limit of common mode range is VCC - 1.5V but either or both inputs can betaken to as high as 30volts without damage. Note 6. Response time is specified with a 100mV step and 5.0mV of overdrive. With larger magnitudes of overdrive faster response times are obtainable. Note 7. The comparator will inhibit proper output state if one of the inputs is become greater than VCC, the other input must remain within the common mode range. The low input state must not be less than -0.3volts of ground of minus supply. TS393 3-6 2003/12 rev. A Applications Information This dual comparator feature high gain, wide bandwidth characteristics. This gives the device oscillation tendencies if the outputs are capacitive coupled to the inputs via stray capacitance. This oscillation manifests itself during output transitions (VOL to VOH). To alleviate this situation input resistors