TSM2301
-20V P-Channel Enhancement Mode MOSFET
Pin assignment: 1. Gate 2. Source 3. Drain
VDS = -20V RDS (on), Vgs @ -4.5V, Ids @ -2.8A =130mΩ RDS (on), Vgs @ -2.5V, Ids @ -2.0A =190mΩ
Features
Advanced trench process technology High density cell design for ultra low on-resistance Excellent therma l and electrical capabilities Compact and low pro file SOT-23 package
Block Diagram
Ordering Information
Part No . T S M2 3 0 1 C X Packing T a p e & Re e l Pa c k a ge SOT-23
Absolute Maximum Rating (Ta = 25 oC unless otherwise noted)
Parameter
Drain-Source Voltage Gate-Source Voltage Continuous Drain Cu rrent Pulsed Drain Current Maximum Power Dissipation Ta = 25 C Ta = 75 C Operating Junction Tempera ture Operating Junction and S torage Temperatu re Range
o o
Symbol
VDS VGS ID IDM PD TJ TJ, TSTG
Limit
-20V ±8 -2.3 -10 1.25 0.8 +150 - 55 to +150
Unit
V V A A W
o o
C C
Thermal Performance
Parameter
Lead Temperature (1 /8” from case) Junction to Ambient Thermal Resistance (PCB mounted) Note: Surface mounted on FR4 board t
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