TSM4835CS

TSM4835 30V P-Channel Enhancement Mode MOSFET Pin assignment: 1. Source 8. Drain 2. Source 7. Drain 3. Source 6. Drain 4. Gate 5. Drain VDS = - 30V RDS (on), Vgs @ - 10V, Ids @ - 9.5A =18mΩ RDS (on), Vgs @ - 4.5V, Ids @ - 7.5A =30mΩ Features Advanced trench process technology High density cell design for ultra low on-resistance High gate voltage Block Diagram Ordering Information Part No. TSM4835CS Packing Tape & Reel Package SOP-8 Absolute Maximum Rating (Ta = 25 oC unless otherwise noted) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current, VGS @4.5V. Pulsed Drain Current, VGS @4.5V Maximum Power Dissipation Ta = 25 C Ta > 25 oC Operating Junction Temperature Operating Junction and Storage Temperature Range TJ TJ, TSTG o Symbol VDS VGS ID IDM PD Limit - 30 ± 25 - 9.5 - 50 2.5 1.6 +150 - 55 to +150 Unit V V A A W W o o C C Thermal Performance Parameter Junction to Ambient Thermal Resistance (PCB mounted) Note: Surface mounted on FR4 board t