CHA2294_07

CHA2294 RoHS COMPLIANT 35-40GHz Low Noise, Variable Gain Amplifier GaAs Monolithic Microwave IC Description The CHA2294 is a high gain four-stage monolithic low noise amplifier with variable gain. It is designed for a wide range of applications, from military to commercial communication systems.The backside of the chip is both RF and DC grounded. This helps to simplify the assembly process. The circuit is manufactured with a pHEMT process, 0.25µm gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is available in chip form. 26 24 22 20 18 16 14 12 10 8 6 4 2 0 35 36 Main Features Frequency range: 35-40GHz 4.0dB Noise Figure. 22dB gain Gain control range: 15dB Low DC power consumption, 120mA @ 5V Chip size: 2.32 X 1.235 X 0.10 mm Gain (dB) NF (dB) 37 38 Frequency (GHz) 39 40 Typical on wafer measurements :Gain & NF Main Characteristics Tamb. =25° C Symbol Fop G NF Gctrl Id Small signal gain Noise figure Gain control range with Vc variation Bias current 10 Parameter Operating frequency range Min 35 20 Typ 22 4 15 120 Max 40 Unit GHz dB 4.5 dB dB mA ESD Protection : Electrostatic discharge sensitive device. Observe handling precaution Ref. : DSCHA22947165 - 14 Jun 07 1/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 35-40GHz LNA VGA Electrical Characteristics for Broadband Operation Tamb = +25° V5=Vd2=Vd,3,4=5V C, Symbol Fop G ∆G Is NF Gctrl P1dB VSWRin CHA2294 Parameter Operating frequency range Small signal gain (1) Small signal gain flatness (1) Reverse isolation (1) Noise figure with Vc=1.2V Gain control range versus Vc Output power at 1dB compression with Vc=1.2V Input VSWR (1) Min 35 20 Typ Max 40 Unit GHz dB dB dB 22 ±1.0 50 4 4.5 dB dB dBm 10 15 11 2.0:1 1.5:1 VSWRout Output VSWR (1) Vd DC voltage V5= Vd2=Vd3,4 Vc 5 [-0.7, +1.2] 20 120 -1.5 +1.3 V V mA mA Id1 Id Bias current (2) with Vc=1.2V Bias current total (3) with Vc=1.2V (1) These values are representative of on-wafer measurements that are made without bonding wires at RF ports. (2) For optimum noise figure, the bias current Id1 should be adjust to 20mA with Vg1 voltage. (3) With Id1=20mA, adjust Vg2,3,4 voltage for a total drain current around 120mA. Absolute Maximum Ratings Tamb. =25° (1) C Symbol Vd Id Vg Vc Vdg Pin Tch Ta Tstg Parameter Values +5.2 200 -2.5 to +0.4 +1.5 +5.0 +15 +175 -40 to +85 -55 to +125 Unit V mA V V V dBm ° C ° C ° C Maximum Drain bias voltage Maximum drain bias current Gate bias voltage Maximum Control bias voltage Maximum drain to gate voltage (Vd - Vg) Maximum input power overdrive (2) Maximum channel temperature Operating temperature range Storage temperature range (1) Operation of this device above anyone of these parameters may cause permanent damage. (2) Duration < 1s. Ref. : DSCHA22947165 - 14 Jun 07 2/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 35-40GHz LNA VGA Typical on wafer Measurements CHA2294 Bias Conditions : V5=Vd2=Vd3,4=5V, Vg1 for Id1=20mA, Vg2=Vg3,4=-0.3V, Vc=+1.2V 26 24 22 20 18 16 14 12 10 8 6 4 2 0 35 36 Gain (dB) NF (dB) 37 38 Frequency (GHz) 39 40 Gain & Noise Figure versus frequency 25 20 15 10 5 0 -5 -10 -15 -20 -25 30 32 34 36 Frequency (GHz) Gain & Return Loss versus frequency Ref. : DSCHA22947165 - 14 Jun 07 3/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 S21 (dB) S11 (dB) S22 (dB) 38 40 35-40GHz LNA VGA In jig Measurements Bias Conditions : 28 27 26 25 Gain (dB) 24 23 22 21 20 19 18 CHA2294 V5=Vd2=Vd3,4=5V, Vg1=Vg2=Vg3,4 =-0.3V, Vc=+1.2V 36GHz 39GHz -2 0 2 37GHz 40GHz 4 6 8 Output Power (dBm) 38GHz 10 12 14 Gain versus Output power 28 26 24 22 20 18 16 14 12 10 36 37 38 Frequency (GHz) 39 40 P-1dB (dBm) Linear Gain (dB) Linear Gain & Output power @ 1dB compression versus frequency Ref. : DSCHA22947165 - 14 Jun 07 4/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 35-40GHz LNA VGA CHA2294 Gain versus frequency and Vc Chip Assembly and Mechanical Data To V5 DC Drain supply feed To Vd2,3,4 DC Drain supply feed 120pF 120pF RF In RF Out 120pF 120pF 120pF To Vg1 DC Gate supply feed To Vc DC supply feed To Vg2,3,4 DC Gate supply feed Note : Supply feed should be capacitively bypassed. 25µm diameter gold wire is recommended Bond Pad:100 x 100 µm Ref. : DSCHA22947165 - 14 Jun 07 5/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 35-40GHz LNA VGA CHA2294 Bonding pad positions (Chip thickness : 100µm. All dimensions are in micrometer) Ordering Information Chip form : CHA2294-99F/00 Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S. Ref. : DSCHA22947165 - 14 Jun 07 6/6 Specifications subject to change without notice Route Départementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09