UNISONIC TECHNOLOGIES CO., LTD UF730
5.5A, 400V, 1.0 OHM, N-CHANNEL POWER MOSFET
DESCRIPTION
The UF730 power MOSFET is designed for high voltage, high speed power switching applications such as switching power suppliess, switching adaptors.
MOSFET
1 TO-220
FEATURES
* 5.5A, 400V, Low RDS(ON)(1.0Ω) * Single Pulse Avalanche Energy Rated * Rugged - SOA is Power Dissipation Limited * Fast Switching
1
TO-220F
*Pb-free plating product number: UF730L
SYMBOL
2.Drain
1 .Gate
3.Source
ORDERING INFORMATION
Order Number Package Normal Lead Free Plating UF730-TA3-T UF730L-TA3-T TO-220 UF730-TF3-T UF730L-TF3-T TO-220F Note: Pin Assignment: G: GATE D: DRAIN S: SOURCE UF730L-TA3-T (1)Packing Type (2)Package Type (3)Lead Plating (1) T: Tube (2) TA3: TO-220, TF3: TO-220F (3) L: Lead Free Plating, Blank: Pb/Sn Pin Assignment 1 2 3 G D S G D S Packing Tube Tube
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QW-R502-077,A
UF730
ABSOLUTE MAXIMUM RATINGS (TC = 25℃, Unless Otherwise Specified)
PARAMETER Drain to Source Voltage (TJ =25℃~125℃) Drain to Gate Voltage (RGS = 20kΩ) (TJ =25℃~125℃) Gate to Source Voltage Continuous TC = 100℃ Drain Current Pulsed Maximum Power Dissipation Derating above 25℃ SYMBOL VDS VDGR VGS ID ID IDM PD RATINGS 400 400 ±20 6.5 3.5 22 93 0.6
MOSFET
UNIT V V V A A A W W/℃
Single Pulse Avalanche Energy Rating 300 mJ EAS (VDD=50V, starting TJ =25℃, L=17mH, RG=25Ω, peak IAS = 5.5A) Operating Temperature Range TOPR -55 ~ +150 ℃ Storage Temperature Range TSTG -55 ~ +150 ℃ Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied.
THERMAL DATA
PARAMETER Thermal Resistance Junction-Ambient Thermal Resistance Junction-Case SYMBOL θJA θJc RATINGS 80 1.67 UNIT ℃/W
ELECTRICAL CHARACTERISTICS (TC =25℃, Unless Otherwise Specified.)
PARAMETER Drain to Source Breakdown Voltage Gate to Threshold Voltage On-State Drain Current (Note 1) Zero Gate Voltage Drain Current Gate to Source Leakage Current Drain to Source On Resistance (Note 1) Forward Transconductance (Note 1) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain “Miller” Charge Input Capacitance Output Capacitance Reverse - Transfer Capacitance SYMBOL BVDSS VGS(THR) ID(ON) IDSS IGSS RDS(ON) gFS tDLY(ON) tR tDLY(OFF) tF QG(TOT) QGS QGD CISS COSS CRSS TEST CONDITIONS ID = 250µA, VGS = 0V VDS = VGS, ID = 250µA VDS > ID(ON) x RDS(ON)MAX, VGS = 10V VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125℃ VGS = ±20V ID = 3.0A, VGS = 10V VDS ≥ 10V, ID = 3.3A VDD = 200V, ID ≈ 5.5A, RGS = 12Ω, RL = 35Ω MOSFET Switching Times are Essentially Independent of Operating Temperature VGS = 10V, ID = 5.5A, VDS = 0.8 x Rated BVDSS IG(REF) = 1.5mA Gate Charge is Essentially Independent of Operating Temperature VDS = 25V, VGS = 0V,f = 1MHz 2.9 MIN TYP MAX UNIT 400 2.0 5.5 25 250 ±100 0.8 4.4 10 20 35 15 20 3.0 10 600 150 40 17 29 56 24 35 1.0 4.0 V V A µA µA nA Ω S ns ns ns ns nC nC nC pF pF pF
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QW-R502-077,A
UF730
ELECTRICAL CHARACTERISTICS(Cont.)
SOURCE TO DRAIN DIODE SPECIFICATIONS TJ = 25℃, ISD = 5.5A, VGS = 0V Source to Drain Diode Voltage VSD (Note 1) Continuous Source to Drain IS Current Pulse Source to Drain Current ISM (Note 2) TJ = 25℃, ISD = 5.5A, Reverse Recovery Time tRR dISD/dt = 100A/µs TJ = 25℃, ISD = 5.5A, Reverse Recovery Charge QRR dISD/dt = 100A/µs Notes: 1. Pulse Test: Pulse width≤≤300µs, Duty Cycle≤≤2%. 2. Repetitive rating: Pulse width limited by maximum junction temperature. 3. VDD = 50V, starting TJ = 25℃, L = 17mH, RG = 25Ω, peak IAS = 5.5A.
MOSFET
1.6 5.5 22 140 0.93 300 2.1 660 4.3
V A A ns µC
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UF730
TEST CIRCUITS AND WAVEFORMS
VDS L BVDSS
MOSFET
RG D.U.T.
VDD
IAS
VDS VDD
0.01Ω IAS Figure 1A. Unclamped Energy Test Circuit
0 tp tAV
Figure 1B. Unclamped Energy Waveforms
VDS RL
90% 10% 90%
RG VDD VGS D.U.T.
0
VGS 10% 0
50%
PULSE WIDTH
50%
tD(ON) tON Figure 2A. Switching Time Test Circuit
tR
t D(OFF) t F t OFF
Figure 2B. Resistive Switching Waveforms
CURRENT REGULATOR 12V BATTERY 50kΩ 0.2µF 0.3µF D
VDS (ISOLATED SUPPLY) SAME TYPE AS DUT
VDD Q G(TOT) QGS Q GD VGS
VDS G 0 IG(REF) IG CURRENT SAMPLING RESISTOR S I D CURRENT SAMPLING RESISTOR D UT 0 IG(REF) 0
Figure 3A. Gate Charge Test Circuit
Figure 3B. Gate Charge Waveforms
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QW-R502-077,A
UF730
TYPICAL PERFORMANCE CUVES (Unless Otherwise Specified)
Forward Bias Safe Operating Area 100
MOSFET
Maximum Contionuous Drain Current vs. Case Temperature 6
Drain Current, ID (A)
Operation in This Area is Limited by RDS(on) 10μs
Drain Current, I D (A)
10
100μs 1ms
4
1 TC=25℃ TJ=Max Rated Single Pulse 1 10 100 Drain to Source Voltage, VDS (V) 10ms DC 1000
2
0.1
0
25
50
75
100
125
150
Case Temperature, T C (℃)
Output Characteristics 10 8 6 4 VGS=5.0V 2 0 VGS=4.5V VGS=4.0V 0 40 80 120 160 200 Drain to Source Voltage, VDS (V) VGS=10 VGS=6.0V Pulse Duration=80 μs Duty Cycle = 0.5% Max
Drain Current, I D (A)
Sturation Characteristics 10 8 6 VGS =5.5V 4 2 0 VGS=5.0V VGS=4.5V VGS=4.0V 0 40 80 120 160 200 Pulse Duration=80μs VGS=10V Duty Cycle = 0.5% Max
Drain Current, I D (A)
VGS=6.0V
VGS=5.5V
Drain to Source Voltage, VDS (V)
Transfer Characteristics 10
Drain to Source on Resistance, RDS (DN) (Ω)
Drain to Source on Resistance vs. Gate Voltage and Drain Current 10 8 6 4 VGS =20V 2 0 Pulse Duration =80μs Duty Cycle = 0.5% Max VGS =10V
Drain Current, IDR (A)
1 T J=150℃ TJ=25 ℃
0.1
VDS ≥ 5 0V Pulse Duration=80μs Duty Cycle = 0.5% Max 0 2 4 6 8 10
0.01
0
3
6
9
12
15
Gate to Source Voltage, VGS (V)
Drain Current, ID (A)
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UF730
TYPICAL PERFORMANCE CUVES
Capacitance vs. Drain to Source Voltage 1500
Capacitance, C (pF)
MOSFET
Transconductancevs. Drain Current 10
Transconductance, gFS (S)
1200 900 600 300 0 CISS COSS
VGS=0V, f=1MHz CISS=C GS+C GD CRSS=CGD COSS∫≈CDS+CGD
8 6 4 2 0
Pulse Duration =80μs Duty Cycle = 0.5% Max TJ=25℃
CRSS
T J=150℃
1
10 Drain to Source Voltage, VDS (V)
100
0
2
4
6
8
10
Drain Current, ID (A)
Source to Drain Diode Voltage 100
Source to Drain Current, ISD (A)
Gate to Source Voltage vs. Gate Charge 20 I =5.5A D
Gate to Source Voltage, VGS (V)
Pulse Duration=80μs Duty Cycle = 0.5% Max
16 12 8 4 0 VDS=320V VDS=200V VDS=80V
10 T J=150℃ 1 TJ=25℃
0.1
0
0.4
0.8
1.2
1.6
2.0
0
8
16
24
32
40
Source to Drain Voltage, VSD (V)
Gate Charge, Q G (nC)
U TC assum es no responsibility for equipm ent failures that result from using products at values that exceed, ev en m om entarily, rated v alues (such as m axim um ratings, operating condition ranges, or other param eters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, dev ices or system s where m alfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The inform ation presented in this docum ent does not form part of any quotation or contract, is believ ed to be accurate and reliable and m ay be changed without notice.
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