UR5512L-SH2-T

UR5512L-SH2-T

  • 厂商:

    UTC(友顺)

  • 封装:

  • 描述:

    UR5512L-SH2-T - 2A DDR BUS TERMINATION REGULATOR - Unisonic Technologies

  • 详情介绍
  • 数据手册
  • 价格&库存
UR5512L-SH2-T 数据手册
UNISONIC TECHNOLOGIES CO., LTD UR5512 2A DDR BUS TERMINATION REGULATOR DESCRIPTION The UR5512 is a linear regulator which provides up to 2 Amp bi-directional driving and sinking capability for DDR SDRAM bus terminator application. The output termination voltage tracks the reference voltage applied at VREF pin. A resistor divider connected to VIN, GND and VREF pins is used to force a reference voltage to VREF pin. The UR5512 contains a high-speed operational amplifier to provide excellent response to line/load transient. An active-low shutdown (VREF) pin provides Suspend to RAM (STR) functionality. Additional features include current limiting protection, on-chip thermal shut-down protection. LINEAR INTEGRATED CIRCUIT HSOP-8 FEATURES * DDR-II Termination Voltage applications * Driving and sinking current up to 2A * Low output voltage offset (within 20mV@±2A) * Adjustable output voltage by external resistors * Suspend to RAM (STR) functionality * Current limiting protection * Thermal protection * Cost-effective and easy to use *Pb-free plating product number: UR5512L ORDERING INFORMATION Order Number Normal Lead Free Plating UR5512-SH2-R UR5512L-SH2-R UR5512-SH2-T UR5512L-SH2-T Package HSOP-8 HSOP-8 Packing Tape Reel Tube UR5512L-SH2-R (1)Packing Type (2)Package Type (3)Lead Plating (1) R: Tape Reel, T: Tube (2) SH2: HSOP-8 (3) L: Lead Free Plating Blank: Pb/Sn , www.unisonic.com.tw Copyright © 2005 Unisonic Technologies Co., Ltd 1 of 7 QW-R101-017,A UR5512 PIN CONFIGURATIONS VIN 1 GND 2 VREF 3 VOUT 4 GND LINEAR INTEGRATED CIRCUIT 8 NC 7 NC 6 VCNTL 5 NC PIN DESCRIPTION PIN NAME VIN GND VCNTL VREF VOUT PIN TYPE I O I I O PIN DESCRIPTION Power input pin Ground pin Power input pin for internal control circuit Reference voltage input and active-low shutdown control pin Output voltage pin UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 7 QW-R101-017,A UR5512 BLOCK DIAGRAM VCNTL LINEAR INTEGRATED CIRCUIT VIN VREF Voltage Regulation Thermal Limit Current Limit VOUT Shutdown GND UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 7 QW-R101-017,A UR5512 ABSOLUTE MAXIMUM RATINGS LINEAR INTEGRATED CIRCUIT PARAMETER SYMBOL RATING UNIT VCNTL Control Voltage VCNTL -0.2 ~ 7 V VIN Supply Voltage VIN -0.2 ~ 3.9 V Power Dissipation PD Internally Limited W Junction Temperature TJ +125 °C Storage Temperature TSTG -40 ~ +150 °C Note Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL RANGE VCNTL Control Voltage (Note 1) VCNTL 3.1 ~ 6 VIN Supply Voltage VIN 1.2 ~ 3.5 VREF Input Voltage VREF 0.85 ~ 1.75 VOUT Output Voltage (Note 2) VOUT VREF ± 0.02 VOUT Output Current IOUT -2 ~ +2 Junction Temperature TJ 0 ~ +125 Note: 1. Please always keep VCNTL-VOUT>1.9V for good regulation. 2. The VOUT tracks the VREF with additional voltage offset and load regulation. UNIT V V V V A °C ELECTRICAL CHARACTERISTICS (VIN = 1.8V, VCNTL = 5V, VREFEN = 0.5VIN), TA = 25°C, unless otherwise specified) PARAMETER SYMBOL TEST CONDITIONS Input Current IOUT = 0A Operation Current of VCNTL ICNTL VREF=GND (Shutdown) VREF =1.25V Current into VREF Pin IREF VREF = GND (Shutdown) Standby Current ISTB VREF < 0.2V, RLOAD = 180Ω Output Voltage Output Voltage Offset (VOUT - VREF) VOS IOUT = 0A Load Regulation ∆VLOAD IOUT = ±1.5A Protection Current limit ILIM Thermal Shutdown Temperature TSD VCNTL = 5V Thermal Shutdown Hysteresis ∆TSD VCNTL = 5V REFEN Shutdown VIH Enable Shutdown Threshold Shutdown VIL MIN TYP 2 1.9 200 20 50 −20 −20 2.0 125 6 MAX 4 500 40 90 +20 +20 UNIT mA nA µA µA mV mV A °C °C 0.65 0.15 V 180 40 0.35 0.2 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 7 QW-R101-017,A UR5512 FUNCTIONAL DESCRIPTION LINEAR INTEGRATED CIRCUIT General Information The UR5512 is a linear regulator designed for DDR SDRAM bus terminator application. The output, VOUT is capable of sourcing or sinking current up to 2A peak while regulating the output voltage to within 20mV offset. The UR5512 has excellent response to load regulation while preventing shoot through. Active-low shutdown mechanism and fault protections. The UR5512 is available in several packages to meet different power dissipation and surface mount applications. Output Voltage Regulation The output voltage tracks the reference voltage applied at VREF pin. Two internal NPN pass transistors act as the buffered output regulate the output voltage by sourcing current from VIN pin or sinking current to GND pin. An internal Kelvin sensing scheme is use at the VOUT pin to improve load regulation at various load current. Since the UR5512 exhibits excellent response to load transient, lesser amount of capacitors can be used. Current Limit An internal current limiting sensor is used to monitor the maximum output current to prevent damages from overload or short-circuit condition. Increasing the input voltage of VIN or VCNTL will get higher current-limit points. Shutdown and Soft-Start An additional function of the VREF pin is acting as a shutdown control input that can be used for suspend to RAM functionality. Applying and holding a voltage below 0.15V to VREF pin shuts down the output of the regulator. An external NPN transistor or N-channel MOSFET is used to pull down the VREF pin voltage; while applying a “high” signal to turn on the transistor. During shutdown condition, the two pass transistors are turned off and the output VOUT will tri-state; sourcing or sinking no current. When releasing the VREF pin, the current through the resistor divider charges the capacitor Css to initiate a soft-start cycle. Thermal Shutdown If the junction temperature exceeds the thermal shutdown (TJ= +150°C) then the part will enter a shutdown state. A thermal sensor turns off both pass transistors, allowing the device to cool down. After the junction temperature reduces by 40°C, the regulator starts to regulate again; resulting in a pulsed output during continuous thermal overload conditions. Power Inputs Input power up sequence are not required for VIN and VCNTL. Be careful; do not apply voltage to VOUT when there is no VCNTL voltage presented. This is due to the internal parasitic diodes between VOUT to VIN and VOUT to VCNTL which will be forward bias. Reference Voltage The reference voltage is programmed by a resistor divider between VIN and GND pins. The recommended resistor is < 5kΩ to maintain the accuracy of the output voltage. For improved the performance, an external bypass capacitor can be used, located close to VREF pin to help with noise. A ceramic capacitor can be use and is selected to be greater than 0.1µF. Do not place any additional loading on this reference input pin. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 7 QW-R101-017,A UR5512 TYPICAL APPLICATIONS CIRCUIT +1.8V LINEAR INTEGRATED CIRCUIT 1 VIN NC 8 +5V 7 C1 R1 1000µ 2 GND NC 3 VREF VCNTL 6 C R2 1.2V/-2 ~ +1.8A 4 VOUT NC 5 1µ CSS COUT VREF = VIN · VOUT R2 R1 +R2 (V) track VREF +1.8V 1 VIN NC 8 +5V 7 C1 R1 1000µ 2 GND NC 3 Enable R2 0.9V/-2A ~ +2A 4 VREF VCNTL 6 C VOUT NC 5 1µ COUT UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 7 QW-R101-017,A UR5512 TYPICAL CHARACTERISTICS VREF Bias Current VREF Supply Voltage LINEAR INTEGRATED CIRCUIT V s. VIN Dropout Voltage vs. Output Current 1.2 1.0 VREF=0.9V VCNTL=3.3V TJ = 25°C 22 VREF Bias Current, I VREF (μA) 20 18 16 14 12 10 8 6 4 2 TJ = 25°C Dropout Voltage (V) 0.8 0.6 0.4 0.2 0.0 0.0 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.5 1.0 1.5 2.0 2.5 3.0 VREF Supply Votage, VREF (V) Output Current (A) VIN Dropout Voltage vs. Output Current 1.2 1.0 VREF=0.9V VCNTL=5.0V TJ = 25°C Dropout Voltage (V) 0.8 0.6 0.4 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Output Current (A) U TC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 7 QW-R101-017,A
UR5512L-SH2-T
物料型号: - 型号:UR5512 - 封装:HSOP-8 - 有铅产品型号:UR5512-SH2-R(带卷装)和UR5512-SH2-T(管装) - 无铅产品型号:UR5512L-SH2-R(带卷装)和UR5512L-SH2-T(管装)

器件简介: - UR5512是一款线性稳压器,用于DDR SDRAM总线终止器应用,可提供高达2安培的双向驱动和吸收能力。输出终止电压跟踪VREF引脚上施加的参考电压。通过连接到VIN、GND和VREF引脚的电阻分压器来强制施加VREF引脚上的参考电压。

引脚分配: - VIN:电源输入引脚 - GND:地引脚 - VCNTL:内部控制电路的电源输入引脚 - VREF:参考电压输入和活动低关闭控制引脚 - VOUT:输出电压引脚

参数特性: - VCNTL控制电压:-0.2V至7V - VIN供电电压:-0.2V至3.9V - 功耗:内部限制 - 结温:最高125°C - 存储温度:-40°C至150°C

功能详解: - 输出电压跟踪VREF引脚上的参考电压,通过内部NPN通道晶体管调节输出电压,通过源电流来自VIN引脚或吸收到GND引脚。 - 内部电流限制传感器用于监控最大输出电流,以防止过载或短路损坏。 - VREF引脚还作为关闭控制输入,用于挂起到RAM功能。将VREF引脚电压拉低至0.15V以下可关闭调节器输出。 - 如果结温超过150°C,则进入热关闭状态,热传感器关闭两个通道晶体管,使设备冷却。结温降低40°C后,调节器重新开始调节。

应用信息: - UR5512适用于DDR-II终止电压应用,具有高达2A的驱动和吸收电流,低输出电压偏移(在±2A时20mV内),通过外部电阻调整输出电压,挂起到RAM(STR)功能,电流限制保护和热保护。
UR5512L-SH2-T 价格&库存

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