UR5512L-SO8-R

UNISONIC TECHNOLOGIES CO., LTD UR5512 LINEAR INTEGRATED CIRCUIT 2A DDR BUS TERMINATION REGULATOR SOP-8  DESCRIPTION The UTC UR5512 is a linear regulator which provides up to 2 Amp bi-directional driving and sinking capability for DDR SDRAM bus terminator application. The output termination voltage tracks the reference voltage applied at VREF pin. A resistor divider connected to VIN, GND and VREF pins is used to force a reference voltage to VREF pin. The UTC UR5512 contains a high-speed operational amplifier to provide excellent response to line/load transient. An active-low shutdown (VREF) pin provides Suspend to RAM (STR) functionality. Additional features include current limiting protection, on-chip thermal shut-down protection.  HSOP-8 1 TO-252-5 FEATURES * DDR-I and DDR-II termination voltage applications * Driving and sinking current up to 2A * Low output voltage offset (within 20mV@±2A) * Adjustable output voltage by external resistors * Suspend to RAM (STR) functionality * Current limiting protection * Thermal protection * Cost-effective and easy to use  ORDERING INFORMATION Ordering Number Lead Free Halogen Free UR5512G-S08-R UR5512G-SH2-R UR5512L-TN5-R UR5512G-TN5-R Package Packing SOP-8 HSOP-8 TO-252-5 Tape Reel Tape Reel Tape Reel UR5512G-S08-R (1)Packing Type (1) R: Tape Reel (2)Package Type (2) S08: SOP-8, SH2: HSOP-8, TN5: TO-252-5 (3)Green Package (3) G: Halogen Free and Lead Free, L: Lead Free www.unisonic.com.tw Copyright © 2014 Unisonic Technologies Co., Ltd 1 of 6 QW-R101-017.E UR5512  LINEAR INTEGRATED CIRCUIT MARKING TO-252-5  SOP-8 / HSOP-8 PIN CONFIGURATIONS NC: No Connection  PIN DESCRIPTION PIN NAME VIN GND VCNTL VREF VOUT  PIN TYPE I O I I O PIN DESCRIPTION Power input pin Ground pin Power input pin for internal control circuit Reference voltage input and active-low shutdown control pin Output voltage pin BLOCK DIAGRAM UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 6 QW-R101-017.E UR5512  LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL RATING UNIT VCNTL Control Voltage VCNTL -0.2 ~ 7 V VIN Supply Voltage VIN -0.2 ~ 6 V Power Dissipation PD Internally Limited W Junction Temperature TJ +125 C Storage Temperature TSTG -40 ~ +150 C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied.  RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL RANGE VCNTL Control Voltage (Note 1) VCNTL 3.1 ~ 6 VIN Supply Voltage VIN 1.6 ~ 5.5 VREF Input Voltage VREF 0.85 ~ 1.75 VOUT Output Voltage (Note 2) VOUT VREF ± 0.02 VOUT Output Current IOUT -2 ~ +2 Junction Temperature TJ 0 ~ +125 Note: The VOUT tracks the VREF with additional voltage offset and load regulation.  UNIT V V V V A C ELECTRICAL CHARACTERISTICS (VIN = 1.8V, VCNTL = 5V, VREFEN = 0.5VIN), Ta = 25°C, unless otherwise specified) PARAMETER SYMBOL TEST CONDITIONS INPUT CURRENT IOUT = 0A Operation Current of VCNTL ICNTL VREF=GND (Shutdown) VREF =1.25V Current into VREF Pin IREF VREF = GND (Shutdown) Standby Current ISTB VREF < 0.2V, RLOAD = 180Ω OUTPUT VOLTAGE Output Voltage Offset (VOUT - VREF) VO(OFF) IOUT = 0A Load Regulation ∆VLOAD IOUT = ±1.5A PROTECTION Current limit ILIMIT Thermal Shutdown Temperature TSD VCNTL = 5V Thermal Shutdown Hysteresis ∆TSD VCNTL = 5V REFEN Shutdown VIH Enable Shutdown Threshold VIL Shutdown UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw MIN -20 -20 2.0 125 TYP MAX UNIT 2 1.9 200 20 50 4 500 40 90 mA mA nA µA µA +20 +20 mV mV 6 A °C °C 180 40 0.6 0.15 V V 3 of 6 QW-R101-017.E UR5512  LINEAR INTEGRATED CIRCUIT FUNCTIONAL DESCRIPTION General Information The UTC UR5512 is a linear regulator designed for DDR SDRAM bus terminator application. The output, VOUT is capable of sourcing or sinking current up to 2A peak while regulating the output voltage to within 20mV offset. The UTC UR5512 has excellent response to load regulation while preventing shoot through. Active-low shutdown mechanism and fault protections. The UTC UR5512 is available in several packages to meet different power dissipation and surface mount applications. Output Voltage Regulation The output voltage tracks the reference voltage applied at VREF pin. Two internal NPN pass transistors act as the buffered output regulate the output voltage by sourcing current from VIN pin or sinking current to GND pin. An internal Kelvin sensing scheme is use at the VOUT pin to improve load regulation at various load current. Since the UTC UR5512 exhibits excellent response to load transient, lesser amount of capacitors can be used. Current Limit An internal current limiting sensor is used to monitor the maximum output current to prevent damages from overload or short-circuit condition. Increasing the input voltage of VIN or VCNTL will get higher current-limit points. Shutdown and Soft-Start An additional function of the VREF pin is acting as a shutdown control input that can be used for suspend to RAM functionality. Applying and holding a voltage below 0.15V to VREF pin shuts down the output of the regulator. An external NPN transistor or N-channel MOSFET is used to pull down the VREF pin voltage; while applying a “high” signal to turn on the transistor. During shutdown condition, the two pass transistors are turned off and the output VOUT will tri-state; sourcing or sinking no current. When releasing the VREF pin, the current through the resistor divider charges the capacitor Css to initiate a soft-start cycle. Thermal Shutdown If the junction temperature exceeds the thermal shutdown (TJ= +150°C) then the part will enter a shutdown state. A thermal sensor turns off both pass transistors, allowing the device to cool down. After the junction temperature reduces by 40°C, the regulator starts to regulate again; resulting in a pulsed output during continuous thermal overload conditions. Power Inputs Input powers up sequence are not required for VIN and VCNTL. Be careful; do not apply voltage to VOUT when there is no VCNTL voltage presented. This is due to the internal parasitic diodes between VOUT to VIN and VOUT to VCNTL which will be forward bias. Reference Voltage The reference voltage is programmed by a resistor divider between VIN and GND pins. The recommended resistor is < 5kΩ to maintain the accuracy of the output voltage. For improved the performance, an external bypass capacitor can be used, located close to VREF pin to help with noise. A ceramic capacitor can be use and is selected to be greater than 0.1μF. Do not place any additional loading on this reference input pin. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 6 QW-R101-017.E UR5512  LINEAR INTEGRATED CIRCUIT TYPICAL APPLICATIONS CIRCUIT +1.8V 1 2 C1 1000μ R1 3 VIN NC GND NC VREF VCNTL 8 +5V 7 6 C R2 1.2V/-2 ~ +1.8A 4 VOUT NC 5 1μ CSS COUT VREF = VIN · VOUT R2 R1+R2 (V) track VREF UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 6 QW-R101-017.E UR5512 TYPICAL CHARACTERISTICS Dropout Voltage (V) VREF Bias Current, IVREF (μA)  LINEAR INTEGRATED CIRCUIT VIN Dropout Voltage vs. Output Current 1.2 1.0 VREF=0.9V VCNTL=5.0V TJ = 25°C 0.8 0.6 0.4 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Output Current (A) UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 6 QW-R101-017.E