UR5516

UR5516

  • 厂商:

    UTC(友顺)

  • 封装:

  • 描述:

    UR5516 - 3A BUS TERMINATION REGULATOR - Unisonic Technologies

  • 详情介绍
  • 数据手册
  • 价格&库存
UR5516 数据手册
UNISONIC TECHNOLOGIES CO., LTD UR5516 3A BUS TERMINATION REGULATOR DESCRIPTION The UTC UR5516 is designed to provide a regulated voltage with bi-directional output current for DDR-SDRAM termination. Current-limit work to limit the short-circuit current, on-chip thermal shutdown provides protection against any combination of overload that would create excessive junction temperature. The output voltage tracks the voltage at VREF pin. A resistor divider connected to VIN, GND and VREF pins is used to provide a half voltage of VIN to VREF pin. In addition, an external ceramic capacitor and an open-drain transistor connected to VREF pin provides soft-start and shutdown control respectively. Pulling and holding the VREF to GND shuts off the output. The output of UTC UR5516 will be high impedance after being shut down by VREF or thermal shutdown function. HSOP-8 LINEAR INTEGRATED CIRCUIT SOP-8 1 TO-252-5 1 TO-263-5 *Pb-free plating product number: UR5516L FEATURES * Provide bi-direction current - Sourcing or sinking current up to 3A * 1.25V/0.9V output for DDR I/II applications * Fast transient response * High output accuracy - ±20mv over load, VOUT offset and temperature * Adjustable output voltage by external resistors * Current-limit protection * On-chip thermal shutdown * Shutdown for standby or suspend mode ORDERING INFORMATION Order Number Normal Lead Free Plating UR5516-S08-R UR5516L-S08-R UR5516-S08-R UR5516L-S08-R UR5516-SH2-R UR5516L-SH2-R UR5516-SH2-R UR5516L-SH2-R UR5516-TN5-R UR5516L-TN5-R UR5516-TN5-T UR5516L-TN5-T UR5516-TQ5-R UR5516L-TQ5-R UR5516-TQ5-T UR5516L-TQ5-T Package SOP-8 SOP-8 HSOP-8 HSOP-8 TO-252-5 TO-252-5 TO-263-5 TO-263-5 Packing Tape Reel Tube Tape Reel Tube Tape Reel Tube Tape Reel Tube U5516L-S08-R (1)Packing Type (2)Package Type (3)Lead Plating (1) R: Tape Reel, T: Tube (2) S08: SOP-8, SH2: HSOP-8, TN5: TO-252-5, TQ 5: TO-263-5 (3) L: Lead Free Plating Blank: Pb/Sn , www.unisonic.com.tw Copyright © 2005 Unisonic Technologies Co., Ltd 1 of 9 QW-R101-015,B UR5516 PIN CONFIGURATION VIN GND VREF VOUT 1 2 3 4 SOP-8 : Thermal Pad (Connected to GND plane for better heat dissipation) NC: No Connection 5 4 T AB is V CNTL 3 2 1 LINEAR INTEGRATED CIRCUIT 8 7 6 5 VCNTL VCNTL VCNTL VCNTL VIN GND VREF VOUT 1 2 3 4 HSOP-8 8 7 6 5 NC NC VCNTL NC VOUT VREF VCNTL GND VIN TO-252-5/TO-263-5 PIN DESCRIPTION PIN NAME VIN I/O I DESCRIPTION Main power input pin. Connect this pin to a voltage source and an input capacitor. The UTC UR5516 sources current to VOUT pin by controlling the upper NPN pass transistor, providing a current path from VIN pin. Power and signal ground. Connect this pin to system ground plane with shortest traces. The UTC UR5516 sinks current from VOUT pin by controlling the lower NPN pass transistor, providing a current path to GND pin. This pin is also the ground path for internal control circuitry. Power input pin for internal control circuitry. Connect this pin to a voltage source, providing a bias for the internal control circuitry. A bypass capacitor is usually connected near this pin. Reference voltage input and active-low shutdown control pin. Apply a voltage to this pin as a reference voltage for the UTC UR5516. Connect this pin to a resistor divider, between VIN and GND, and a capacitor for soft-start and filtering noise purposes. Applying and holding this pin low by an open-drain transistor to shut down the output. Output pin of the regulator. Connect this pin to load. Output capacitors connected this pin improves stability and transient response. The output voltage tracks the reference voltage and is capable of sourcing or sinking current up to 3A. GND O VCNTL I VREF I VOUT O THERMAL DATA PARAMETER Thermal Resistance SOP-8 HSOP-8 TO-252-5 TO-263-5 SYMBOL θJA RATINGS 160 80 80 50 UNIT °C/W UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 9 QW-R101-015,B UR5516 BLOCK DIAGRAM VCNTL LINEAR INTEGRATED CIRCUIT VIN VREF Voltage Regulation Thermal Limit Current Limit VOUT Shutdown GND UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 9 QW-R101-015,B UR5516 ABSOLUTE MAXIMUM RATINGS LINEAR INTEGRATED CIRCUIT PARAMETER SYMBOL RATINGS UNIT VCNTL Supply Voltage, VCNTL to GND VCNTL -0.2 ~ 7 V VIN Supply Voltage, VIN to GND VIN -0.2 ~ 3.9 V Power Dissipation PD Internally Limited W Junction Temperature TJ +150 °C Storage Temperature TSTG -40 ~ +150 °C Note Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL RANGES UNIT VCNTL Supply Voltage (Note 1) VCNTL 3.1 ~ 6 V VIN Supply Voltage (Note 2) VIN 1.2 ~ 3.5 V VREF Input Voltage VREF 0.85 ~ 1.75 V VOUT Output Voltage (Note 3) VOUT VREF ± 0.02 V VOUT Output Current (Note 4,5) IOUT -3 ~ +3 A Junction Temperature TJ 0 ~ +125 °C Note: 1. Please always keep VCNTL-VOUT>1.9V for good regulation. 2. Please supply enough voltage to VIN for sourcing desired maximum output current. Please refer to the VIN Dropout Voltage vs. Output Current in the Typical Characteristics. 3. The VOUT is regulated to the VREF with additional voltage offset and load regulation except over-load conditions. 4. The symbol “+” means the VOUT sources current to load; the symbol “-“ means the VOUT sinks current to GND. 5. The max. IOUT varies with the TJ and the voltages of VIN-VOUT and VOUT. Please refer to the Typical Characteristics. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 of 9 QW-R101-015,B UR5516 otherwise specified) PARAMETER Output Voltage System Accuracy Offset Voltage (VOUT–VREF) Load Regulation LINEAR INTEGRATED CIRCUIT ELECTRICAL CHARACTERISTICS(TJ=25°C,VCNTL=3.3V,VIN=2.5V/1.8V,VREF=0.5VIN,unless SYMBOL TEST CONDITIONS VOUT IOUT=0A Over temperature, VOUT offset, and load regulation IOUT=+10mA VO(OFF) IOUT=-10mA I =+10mA ~ +3A ΔVOUT OUT IOUT= -10mA ~ -3A TJ=25°C Sourcing Current (VIN=2.5V) TJ=125°C TJ=25°C Sinking Current (VIN=2.5V) TJ=125°C ILIMIT TJ=25°C Sourcing Current (VIN=1.8V) TJ=125°C TJ=25°C Sinking Current (VIN=1.8V) TJ=125°C TSHDN Rising TJ THYS IOUT=0A ICNTL IOUT=±3A (Normal Operation) VREF=GND (Shutdown) VREF=1.25V/0.9V (Normal Operation) IBIAS VREF=GND (Shutdown) VSHDN MIN -20 -15 -8 +3.3 -3.3 +2.9 -2.9 -8 6 -3 1 +3.6 +3.1 -3.6 -3.1 +3.2 +2.6 -3.2 -2.6 183 42 2 50 2.0 200 20 0.35 TYP VREF MAX UNIT V 20 14 6 mV mV mV Current Limit A Thermal Shutdown Temperature Thermal Shutdown Hysteresis VCNTL Supply Current VREF Bias Current (The current flows out of VREF) Shutdown Threshold Voltage °C °C 3 110 500 40 0.65 mA nA µA V 1 0.2 UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 of 9 QW-R101-015,B UR5516 APPLICATIONS CIRCUIT 1. General Application VCNTL +5V VIN +1.8V R1 1k VREF LINEAR INTEGRATED CIRCUIT VIN VCNTL VOUT 1.2V/-2 ~ +1.8A C OUT 100uF GND VREFIN +1.8V VREF GND VOUT CIN 22uF CCNTL 1uF R2 1k GND VOUT = VREFIN · R2 R1 +R2 CSS 0.1uF (V) 2. For VOUT=1.25V/0.9V VCNTL +3.3V VIN +2.5V/1.8V R1 1k CIN 470uF Shutdown Q1 GND COUT : 470μF, ESR=25mΩ R 1 , R2 : 1kΩ, 1% Q 1 : APM2300 AC Note : Since R1 and R2 are very small, the voltage offset caused by the bias current of V REF can be ignore. R2 1k VREF CSS 0.1uF C CNTL 47uF VIN VCNTL VOUT +1.25V/0.9V -3 ~ +3A C OUT 470uF GND VREF GND VOUT 3. For VOUT=1.4V VCNTL +5V VIN +2.8V R1 1k CIN 470uF R2 1k GND VREF CSS 0.1uF CCNTL 47uF VIN VCNTL VOUT +1.4V/ -3 ~ +3A COUT 470uF GND VREF GND VOUT UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 6 of 9 QW-R101-015,B UR5516 OPERATING WAVEFORMS 1. Load Transient Response: IOUT = +10mA -> +3A -> +10mA - VIN = 2.5V, VCNTL = 3.3V - VREF is 1.250V supplied by a regulator - COUT = 470µF/10V, ESR = 30mΩ - IOUT slew rate = ±3A/µS LINEAR INTEGRATED CIRCUIT IOUT = +10mA -> +3A -> +10mA Load Regulation = -3.0mV IC VOUT +3A AT +10mA IOUT Ch1 : VOUT, 20mV/Div, DC, Offset = 1.250V Ax1 : IOUT, 1A/Div Time : 20μS/Div 2. Load Transient Response: IOUT = -10mA -> -3A -> -10mA - VIN = 2.5V, VCNTL = 3.3V - VREF is 1.250V supplied by a regulator - COUT = 470µF/10V, ESR = 30mΩ - IOUT slew rate = ±3A/µS IOUT = -10mA -> -3A -> -10mA Load Regulation = +6.5mV VOUT IC IOUT AT +10mA -3A Ch1 : VOUT, 20mV/Div, DC, Offset = 1.250V Ax1 : IOUT, 1A/Div Time : 20μS/Div UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 7 of 9 QW-R101-015,B UR5516 OPERATNG WAVEFORMS(Cont.) 3. Load Transient Response: IOUT = +3A -> -3A -> +3A - VIN = 2.5V, VCNTL = 3.3V - VREF is 1.250V supplied by a regulator - COUT = 470µF/10V, ESR = 30mΩ - IOUT slew rate = ±3A/µS LINEAR INTEGRATED CIRCUIT IOUT = +3A -> -3A -> +3A IC VOUT IOUT +3A AT -3A Ch1 : VOUT, 50mV/Div, DC, Offset = 1.250V Ax1 : IOUT, 2A/Div Time : 20μS/Div 4. Short-Circuit Test - VIN = 2.5V, VCNTL = 3.3V VOUT is Shorted to GND IOUT VOUT is Shorted to VIN (2.5V) VOUT IOUT AT AT VOUT IOUT IC VOUT IC Ch1 : VOUT, 500mV/Div, DC, Offset = 1.250V Ax1 : IOUT, 2A/Div Time : 5mS/Div Ch1 : VOUT, 500mV/Div, DC, Offset = 1.250V Ax1 : IOUT, 2A/Div Time : 5mS/Div UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 8 of 9 QW-R101-015,B UR5516 TYPICAL CHARACTERISTICS VREF Bias Current Vs. VREF Supply Voltage 22 LINEAR INTEGRATED CIRCUIT VIN D ropout Voltage vs. Output Current 1.2 1.0 VREF=0.9V VCNTL=3.3V TJ = 25°C VREF Bias Current, I BIAS (μA) 20 18 16 14 12 10 8 6 4 2 TJ = 25°C Dropout Voltage (V) 0.8 0.6 0.4 0.2 0.0 0.0 0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.5 1.0 1.5 2.0 2.5 3.0 VREF Supply Voltage, VREF (V) Output Current (A) VIN Dropout Voltage vs. Output Current 1.2 1.0 VREF=0.9V VCNTL=5.0V TJ = 25°C Dropout Voltage (V) 0.8 0.6 0.4 0.2 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Output Current (A) UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 9 of 9 QW-R101-015,B
UR5516
物料型号: - 标准型号:UR5516-S08-R、UR5516-SH2-R、UR5516-TN5-R、UR5516-TQ5-R - 无铅镀层型号:UR5516L-S08-R、UR5516L-SH2-R、UR5516L-TN5-R、UR5516L-TQ5-R - 封装类型:SOP-8、HSOP-8、TO-252-5、TO-263-5

器件简介: UTC UR5516是一款线性集成电路,设计用于为DDR-SDRAM终止提供双向输出电流的稳定电压。具有电流限制功能以限制短路电流,片上热关断功能提供过载保护。

引脚分配: - VIN:主电源输入引脚,连接至电压源和输入电容器。 - VOUT:输出电压引脚,通过控制上级NPN通道晶体管,从VIN引脚提供电流路径。 - VREF:参考电压引脚,用于设置输出电压。 - GND:地引脚。 - 其他引脚根据封装类型不同而有所差异,具体可见数据手册中的引脚配置图。

参数特性: - 提供双向电流:3A源电流或汇电流。 - 输出电压:1.25V/0.9V,适用于DDR I/II应用。 - 快速瞬态响应。 - 高输出精度:在负载、Vout偏移和温度变化下±20mv。 - 通过外部电阻调整输出电压。 - 电流限制保护。 - 片上热关断。 - 待机或挂起模式下的关闭功能。

功能详解: UTC UR5516通过VREF引脚的电阻分压器设置输出电压,并可配合外部陶瓷电容器和开漏晶体管实现软启动和关闭控制。将VREF引脚拉至GND可关闭输出,关闭后输出呈高阻态。

应用信息: 适用于需要DDR-SDRAM终止电压的应用场合,如内存模块等。

封装信息: 提供SOP-8、HSOP-8、TO-252-5和TO-263-5等多种封装选项,以适应不同的应用需求。
UR5516 价格&库存

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