UR5517G-SM2-R

UR5517G-SM2-R

  • 厂商:

    UTC(友顺)

  • 封装:

  • 描述:

    UR5517G-SM2-R - 3A DDR BUS TERMINATION REGULATOR - Unisonic Technologies

  • 详情介绍
  • 数据手册
  • 价格&库存
UR5517G-SM2-R 数据手册
UNISONIC TECHNOLOGIES CO., LTD UR5517 Preliminary LINEAR INTEGRATED CIRCUIT 3A DDR BUS TERMINATION REGULATOR DESCRIPTION The UR5517 is a linear regulator which provides up to 3 Amp bi-directional sourcing and sinking capability for DDR1/2/3 SDRAM bus terminator applications. It only requires 20uF of ceramic output capacitance by a integrated operational amplifier which provides fast load transient response. The UR5517 also includes two control pins, S3 & S5. If S3 were set in low level, VTT will be turned off and left Hi-Z(sleep-state mode).If setting S5 were set in low level, both VTT and VTTREF will be turned off and discharged to ground(soft-off mode). FEATURES * Input Voltage Range::3~5.5V * VLDOIN Voltage Range:1.2V~3.6V * DDR1/2/3 Termination Voltage Applications * Sourcing and Sinking Current up to 3A * ±20mV Accuracy for VTT and VTTREF * 10mA Buffered Reference(VTTREF) * Supports High-Z in S3(STR) and Soft-off in S5(Shutdown) * Integrated Divider Tracks 1/2 VDDQSNS for Both VTT&VTTREF * Built-In Soft-Start * Current Limiting Protection * Thermal Shutdown Protection MSOP-10 ORDERING INFORMATION Ordering Number UR5517G-SM2-R Package MSOP-10 Packing Tape Reel UR5517G-SM2 -R (1)Packing Type (2)Package Type (3)Halogen Free (1) R: Tape Reel (2) SM2: MSOP-10 (3) G: Halogen Free www.unisonic.com.tw Copyright © 2010 Unisonic Technologies Co., Ltd 1 of 6 QW-R102-041.a UR5517 PIN CONFIGURATIONS Preliminary LINEAR INTEGRATED CIRCUIT PIN DESCRIPTION(Note) PIN NAME PIN TYPE PIN DESCRIPTION VDDQSNS I VDDQ sense input VLDOIN I Power supply for the VTT & VTTREF output stage VTT O Output voltage for connection to termination resistors, equal to VDDQSNS/2 PGND O Power ground output for the VTT output VTTSNS I Voltage sense input for the VTT. Connect to plus terminal of the output capacitor VTTREF O Buffered output that is a reference output, equal to VDDQSNS/2 S3 I Active low suspend to RAM mode control pin, VTT is turned off and left Hi-Z GND I Ground S5 I Active low shutdown control pin, both VTT&VTTREF are turned off and discharged to ground VIN I Analog input pin Note:Recommend connecting the Thermal Pad to the GND for the excellent power dissipation. UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 6 QW-R102-041.a UR5517 BLOCK DIAGRAM Preliminary LINEAR INTEGRATED CIRCUIT VDDQSNS VIN VLDOIN OTP S3 S5 STB SD VDDQSNS / 2 *1.05 VTTSNS + VTT VTTREF + VDDQSNS /2 VDDQSNS/ 2 *0.95 PGOOD Current Limit GND PGND UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 6 QW-R102-041.a UR5517 Preliminary LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATING (unless otherwise specified) PARAMETER SYMBOL RATINGS UNIT Supply Voltage(VIN,VLDOIN,VDDQSNS,S3,S5) -0.3~6 V Power Ground Output for the VTT Output PGND -0.3~0.3 V Output Voltage(VTT,VTTREF) VTT,VTTREF -0.3~VLDOIN+0.3 V Junction Temperature TJ 160 ℃ Storage Temperature TSTG -55 ~ +160 ℃ Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. RECOMMENDED OPERATING CONDITIONS (Note1, 2) PARAMETER Input Voltage STR and Shutdown Voltage VDDQ Sense Input Power Supply for the VTT and VTTREF Output Stage SYMBOL VIN S3,S5 VDDQSNS VLDOIN MIN 3 -0.1 1.3 1.2 TYP MAX 5.5 5.5 3.6 3.6 UNIT V V V V V ℃ Power Ground Output for the VTT Output PGND -0.1 0.1 Operating Temperature TA -40 85 Note: 1. All voltage values are with respect to the network ground terminal unless otherwise noted. 2. Please always keep VLDOIN,VTTSNS,VDDQSNS,S3,S5 lower than VIN on operation. ELECTRICAL CHARACTERISTICS (VIN=5V,VLDOIN=VDDQSNS=2.5V, TA=25℃.Unless otherwise specified) PARAMETER SYMBOL TEST CONDITIONS IVIN S5=Hi,S3=Hi, no load(Normal) Current of VIN IVINSTB S5=Hi,S3=Lo, no load(Standby) IVINSDN S5=Lo,S3=Lo, no load(Shutdown) IVLDOIN S5=Hi,S3=Hi, no load(Normal) Current of VLDOIN IVLDOINSTB S5=Hi,S3=Lo, no load(Standby) IVLDOINSDN S5=Lo,S3=Lo, no load(Shutdown) Input Impedance of VDDQSNS ZVDDQSNS S5=Hi,S3=Hi Input Current of VTTSNS IVTTSNS S5=Hi,S3=Hi DDR1(VLDOIN=VDDQSNS=2.5V) Output Voltage of VTT VTT DDR2(VLDOIN=VDDQSNS=1.8V) DDR3(VLDOIN=VDDQSNS=1.5V) IVTT =0 Load Regulation of VTT VosVTT ∣IVTT∣
UR5517G-SM2-R
### 物料型号 - 型号:UR5517 - 订购型号:UR5517G-SM2-R(MSOP-10封装,胶带卷装)

### 器件简介 UR5517是一款线性集成电路,提供高达3安培的双向源极和汇极能力,用于DDR1/2/3 SDRAM总线终结器应用。它只需要20微法的陶瓷输出电容,通过集成运算放大器提供快速负载瞬态响应。

### 引脚分配 | 引脚编号 | 引脚名称 | 引脚类型 | 引脚描述 | | --- | --- | --- | --- | | 1 | VDDQSNS | 输入 | VDDQ感测输入 | | 2 | VLDOIN | 输入 | VTT和VTTREF输出级的电源 | | 3 | VTT | 输出 | 连接到终结电阻的输出电压,等于VDDQSNS/2 | | 4 | PGND | 输出 | VTT输出的电源地 | | 5 | VTTSNS | 输入 | VTT的电压感测输入,连接到输出电容的正极 | | 6 | VTTREF | 输出 | 缓冲输出,参考输出,等于VDDQSNS/2 | | 7 | S3 | 输入 | 低电平挂起到RAM模式控制引脚,VTT关闭并置为高阻态 | | 8 | GND | 地 | 地 | | 9 | S5 | 输入 | 低电平关闭控制引脚,VTT和VTTREF关闭并放电到地 | | 10 | VIN | 输入 | 模拟输入引脚 |

### 参数特性 - 输入电压范围:3~5.5V - VLDOIN电压范围:1.2V~3.6V - DDR1/2/3终结电压应用 - 源极和汇极电流高达3A - VTT和VTTREF的±20mV精度 - 10mA缓冲参考(VTTREF) - 支持S3的高阻态和S5的软关闭 - 集成分压器跟踪1/2 VDDQSNS,用于VTT和VTTREF - 内置软启动 - 电流限制保护 - 热关断保护

### 功能详解 UR5517包括两个控制引脚S3和S5。S3为低电平时,VTT关闭并置为高阻态(睡眠模式)。S5为低电平时,VTT和VTTREF关闭并放电到地(软关闭模式)。

### 应用信息 适用于DDR1/2/3 SDRAM总线终结器应用,提供高效的电源管理和控制。

### 封装信息 - 封装类型:MSOP-10 - 封装代码:SM2
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