UR6515L-TQ5-R

UNISONIC TECHNOLOGIES CO., LTD UR6515A 3A DDR BUS TERMINATION REGULATOR DESCRIPTION The UR6515A is a linear regulator providing up to 3A transient peak current sourcing and sinking capability for DDR SDRAM bus terminator applications while regulating an output voltage to within 40mV. It contains a high speed operational amplifier which provides fast load transient response and only requires 10uF of ceramic output capacitance. The UR6515A output termination voltage tracks the reference voltage applied at VREF pin. A resistor divider connected to VIN, GND and VREF pins is used to force the reference voltage to VREF pin. Additional features include current limiting protection and thermal shutdown protection. 1 LINEAR INTEGRATED CIRCUIT TO-252-5 1 TO-263-5 FEATURES *DDR1/ DDR2 termination voltage applications *Low output voltage offset within 20mV *Source and sink 3A peak current *Adjustable output voltage by external resistors *Integrated power MOS devices *Suspend to RAM(STR) functionality *Current Limiting Protection *Thermal Shutdown Protection *Cost-effective and easy to use ORDERING INFORMATION Ordering Number Lead Free Halogen Free UR6515L-TN5-R UR6515G-TN5-R UR6515L-TQ5-R UR6515G-TQ5-R UR6515L-TQ5-T UR6515G-TQ5-T Package TO-252-5 TO-263-5 TO-263-5 Packing Tape Reel Tape Reel Tube www.unisonic.com.tw Copyright © 2011 Unisonic Technologies Co., Ltd 1 of 9 QW-R102-044.A UR6515A PIN CONFIGURATIONS LINEAR INTEGRATED CIRCUIT PIN DESCRIPTION PIN NAME VIN GND VCNTL VREF VOUT PIN TYPE I O I I O PIN DESCRIPTION Power supply pin for the VOUT output Ground pin Power supply pin for the internal control circuits Reference voltage input and active-low shutdown control pin Output voltage pin UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 of 9 QW-R102-044.A UR6515A BLOCK DIAGRAM LINEAR INTEGRATED CIRCUIT UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 of 9 QW-R102-044.A UR6515A LINEAR INTEGRATED CIRCUIT ABSOLUTE MAXIMUM RATING (unless otherwise specified) PARAMETER SYMBOL RATINGS UNIT VCNTL Control Voltage VCNTL 7 V VIN Supply Voltage VIN 7 V TO-252-5 1.471 Power Dissipation (Ta=25°C) PD W TO-263-5 1.923 Junction Temperature TJ 125 °C Storage Temperature TSTG -65 ~ +150 °C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. THERMAL DATA PARAMETER SYMBOL RATINGS UNIT TO-252-5 68 Junction to Ambient (Note 1) θJA °C/W TO-263-5 52 TO-252-5 8 Junction to Case θJC °C/W TO-263-5 7.7 Note: 1. θJA is measured in the natural convection at Ta = 25°C on a high effective thermal conductivity test board of JEDEC 51-7 thermal measurement standard RECOMMENDED OPERATING CONDITIONS (Note 1) PARAMETER SYMBOL RATINGS VCNTL Control Voltage VCNTL 5 or 3 ± 5% VIN Supply Voltage VIN 2.5~1.5 ± 3% VREF Input Voltage VREF 1.25~0.75 ± 3% Junction Temperature TJ -40~+125 Notes: 1. All voltage values are with respect to the network ground terminal unless otherwise noted. 2. The VOUT tracks the VREF with additional voltage offset and load regulation. UNIT V V V °C ELECTRICAL CHARACTERISTICS (Ta=25°C, unless otherwise specified) (VIN=2.5V/1.8V, VCNTL=3.3V, VREF=1.25V/0.9V, COUT = 10µF (Ceramic)) PARAMETER SYMBOL TEST CONDITIONS INPUT CURRENT Operation Current of VCNTL ICNTL IOUT =0A Standby Current ISTB VREF