UT912E-S16-T

UNISONIC TECHNOLOGIES CO., UT912E ENCODER FOR REMOTE CONTROLLER DESCRIPTION The UTC UT912E of CMOS LSIs for remote control system applications is capable of encoding information which consists of N address bits and 12-N data bits. Each address/data input can be set to one of the two logic states. The programmed addresses/data are transmitted together with the header bits by a RF or an infrared transmission medium upon receipt of a trigger signal. DIP-14 DIP-18 CMOS IC FEATURES * Operating voltage: 2.4V ~ 12V * Low power and high noise immunity CMOS technology * Low standby current (0.1μA (typ.) at VDD=5V) * Minimum transmission word (Four words) * Built-in oscillator needs only 5% resistor * Data code has positive polarity * Minimal external components SOP-16 SOP-20 *Pb-free plating product number: UT912EL ORDERING INFORMATION Ordering Number Normal Lead Free Plating UT912E-D14-T UT912EL-D14-T UT912E-D18-T UT912EL-D18-T UT912E-S16-T UT912EL-S16-T UT912E-S16-R UT912EL-S16-R UT912E-S20-T UT912EL-S20-T UT912E-S20-R UT912EL-S20-R Package DIP-14 DIP-18 SOP-16 SOP-16 SOP-20 SOP-20 Packing Tube Tube Tube Tape Reel Tube Tape Reel www.unisonic.com.tw Copyright © 2005 Unisonic Technologies Co., 1 QW-R502-022,B UT912E PIN CONFIGURATION 8-Address 2-Address /Data 8-Address A0 A0 A1 A2 A3 A4 A5 A6 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD DOUT OSC1 OSC2 TE VSS A7 A1 A2 A3 A4 A5 A6 A7 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 CMOS IC VDD DOUT OSC1 OSC2 TE AD11 AD10 VSS DIP-14 SOP-16 8-Address 4-Address /Data NC A0 A1 A2 A3 A4 A5 A6 A7 VSS 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 VDD DOUT OSC1 OSC2 TE AD11 AD10 AD9 AD8 A0 A1 A2 A3 A4 A5 A6 A7 VSS 8-Address 4-Address /Data 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 NC VDD DOUT OSC1 OSC2 TE AD11 AD10 AD9 AD8 DIP-18 SOP-20 PIN DESCRIPTION PIN NAME A0 ~ A7 AD8 ~ AD11 DOUT TE OSC1 OSC2 VSS VDD I/O Ⅰ Ⅰ O Ⅰ Ⅰ O Ⅰ Ⅰ INTERNAL CONNECTION NMOS TRANSMISSION GATE PROTECTION DIODE NMOS TRANSMISSION GATE PROTECTION DIODE CMOS OUT CMOS IN Pull-high OSCILLATOR 1 OSCILLATOR 1 DESCRIPTION Input pins for address A0 ~ A7 setting These pins can be externally set to VSS or left open Input pins for address/data AD8 ~ AD11 setting These pins can be externally set to VSS or left open Encoder data serial transmission output Transmission enable, active low Oscillator input pin Oscillator output pin Negative power supply (GND) Positive power supply UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 2 QW-R502-022,B UT912E BLOCK DIAGRAM CMOS IC TE trigger OSC2 OSC1 TE Osc Circuit Fosc/3 Divider Data Select and Driver DOUT A0 A7 12 bit Add/Data Input Circuit 12 bit Add/Data Decoder Binary Detector Sync. Circuit AD8 AD11 VDD Vss UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 3 QW-R502-022,B UT912E ABSOLUTE MAXIMUM RATINGS (Ta=25℃) PARAMETER Supply Voltage Input Voltage Operating Temperature Storage Temperature SYMBOL VDD VIN TOPR TSTG RATINGS -0.3 ~ +13 Vss-0.3 ~ VDD+0.3 0 ~ +70 -40 ~ +150 CMOS IC UNIT V V ℃ ℃ ELECTRICAL CHARACTERISTICS (Ta=25℃, unless otherwise specified.) PARAMETER Operating Voltage Standby Current Operating Current Output Driver Current Input Voltage Oscillator Frequency TE Pull-high Resistance High Low SYMBOL VDD ISTN-BY IOPR IDOUT VIH VIL fosc RTE TEST CONDITIONS VDD=3V VDD=12V VDD=3V VDD=12V VOH=0.9VDD(Source) VOL=0.1VDD (Sink) -1 1 0.8VDD 0 MIN 2.4 TYP 5 0.1 2 40 150 -1.6 1.6 VDD 0.2VDD 3 1.5 3 MAX 12 1 4 80 300 UNIT V μA μA mA V V kHz MΩ Oscillator stops No load, Fosc=3kHz VDD=5V Rosc=1.1MΩ, VDD=5V VTE=0V, VDD=5V UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 4 QW-R502-022,B UT912E OPERATION FLOWCHART CMOS IC Power on Standby mode No Transmission enabled? Yes 4 data words transmitted TE receied a low signal. No TE return high. Transmission still enabled Yes TE still is held low. 4 data words transmitted contiuously UNISONIC TECHNOLOGIES CO., LTD www.unisonic.com.tw 5 QW-R502-022,B UT912E ■ CMOS IC FUNCTIONAL DESCRIPTION Operation The UTC UT912E start a cycle of 4-words transmission upon receipt of a transmission enable (TE). A completed cycle is showed as below. This cycle will repeat itself as long as the transmission enable is held low. While the transmission enable returns high the encoder output completes its final cycle and then stops. TE