UTC571

UTC571 COMPANDER DESCRIPTION LI NEAR I NTEGRATED CI RCUI T The UTC571 is a versatile low cost dual gain control circuit in which either channel may be used as a dynamic range compressor or expandor. Each channel has a fullwave rectifier to detect the average value of the signal, a linerarized temperature-compensated variable gain cell, and an operational amplifier. The UTC571 is well suited for use in cellular radio and radio communications systems, modems, telephone, and satellite broadcast/receive audio systems. FEATURES • Complete compressor and expandor in one IChip •Temperature compensated •Greater than 110dB dynamic range • Operates down to 6VDC • System levels adjustable with external components • Distortion may be trimmed out • Dynamic noise reduction systems • Voltage-controlled amplifier DIP-16 APPLICATIONS •Cellular radio •High level limiter •Low level expandor—noise gate •Dynamic filters •CD Player PIN CONFIGURATION RECT CAP 1 RECT IN 1 AG CELL IN 1 GND INV.IN 1 RES.R3 1 OUTPUT 1 THD TRIM 1 1 2 3 16 15 14 RECT CAP 2 RECT IN 2 AG CELL IN 2 VCC INV.IN 2 RES.R 3 2 OUTPUT 2 THD TRIM 2 4 5 6 7 8 UTC571 13 12 11 10 9 YOUW ANG ELECTRONI CO. CS LTD 1 UTC571 BLOCK DIAGRAM THD TRIM LI NEAR I NTEGRATED CI RCUI T R3 INVERTER IN R3 20K G IN R2 20K VARIABLE GAIN R4 20K VREF 1.8V OUTPUT R1 10K RECT IN RECTIFIER RECT CAP ABSOLUTE MAXIMUM RATINGS(Ta=25°C ) Characteristic Maximum Operating Voltage Operating Temperature Power dissipation Symbol VCC TA PD Value 18 0~70 400 Unit V °C mW AC ELECTRICAL CHARACTERISTICS(Ta=25°C, Vcc=+6V,unless otherwise stated) Characteristic Supply Voltage Supply Current Output Current capability Output Slew Rate Gsin Cell Distortion Resister Tolerance Internal Reference Voltage Output DC Shift Expandor Output Noise Unity Gain Level Gain Change Reference Drift Resistor Drift Tracking Error(measured relative to value at unity gain) Equals [VOVO(unity gain)]dB-V2dBm Channel Separation Note: 1. Input to V 1 and V 2 grounded. 2. Measured at 0dBm, 1kHz. 3. Expandor AC input change from no signal to 0dBm. 4. Relative to value at T A = 2 C. 5. Electrical characteristics for the UTC571 only are specified over -40 to +8 °C temperature range. 6. 0dBm = 775mV RMS . Symbol VCC ICC IOUT SR Test Condition No signal Min 6 Typ. 3.2 Max 18 4.8 Unit v mA mA V/µs ±20 Untrimmed Trimmed 1.7 Untrimmed No signal, 15Hz-20kHz 1kHz -1.5 ±.5 0.5 2.0 % 0.1 ±5 ±15 % 1.85 2.0 V ±30 ±150 mV µV 20 60 0 +1.5 dBm ±0.1 dB +2,-25 +20,-50 mV +8,-0 % +0.2 +0.2 60 -1,+1.5 dB dB Rectifier input, V2=+6dBm,V1=0dB V2=-30dBm, V1=0dB YOUW ANG ELECTRONI CO. CS LTD 2 UTC571 FUNCTION DESCRIPTION CIRCUIT DESCRIPTION LI NEAR I NTEGRATED CI RCUI T The UTC571 compandor building blocks, as shown in the block diagram, are a full-wave rectifier, a variable gain cell, an operational amplifier and a bias system. The arrangement of these blocks in the IC result in a circuit which can perform well with few external components, yet can be adapted to many diverse applications. The full-wave rectifier rectifies the input current which flows from the rectifier input, to an internal summing node which is biased at V REF . The rectified current is averaged on an external filter capacitor tied to the CRECT terminal, and the average value of the input current controls the gain of the variable gain cell. The gain will thus be proportional to the average value of the input signal for capacitively-coupled voltage inputs as shown in the following equation. Note that for capacitively-coupled inputs there is no offset voltage capable of producing a gain error. The only error will come from the bias current of the rectifier (supplied internally) which is less than 0.1µA. G∝ | VIN − VREF | avg R1 or G∝ | VIN | avg R1 The speed with which gain changes to follow changes in input signal levels is determined by the rectifier filter capacitor. A small capacitor will yield rapid response but will not fully filter low frequency signals. Any ripple on the gain control signal will modulate the signal passing through the variable gain cell. In an expander or compressor application, this would lead to third harmonic distortion, so there is a trade-off to be made between fast attack and decay times and distortion. For step changes in amplitude, the change in gain with time is shown by this equation. G(t)=(Ginitial-Gfinal)e-t/τ+Gfinal; τ=10k × CRECT The variable gain cell is a current-in, current-out device with the ratio IOUT /IIN controlled by the rectifier. IIN is the current which flows from the DG input to an internal summing node biased at VREF . The following equation applies for capacitively-coupled inputs. The output current, IOUT , is fed to the summing node of the op amp. IIN = VIN − VREF R2 = VIN R2 A compensation scheme built into the DG cell compensates for temperature and cancels out odd harmonic distortion. The only distortion which remains is even harmonics, and they exist only because of internal offset voltages. The THD trim terminal provides a means for nulling the internal offsets for low distortion operation. The operational amplifier (which is internally compensated) has the non-inverting input tied to V REF , and the inverting input connected to the DG cell output as well as brought out externally. A resistor, R 3 , is brought out from the summing node and allows compressor or expander gain to be determined only by internal components. The output stage is capable of ±20mA output current. This allows a +13dBm (3.5V RMS ) output into a 300W load which, with a series resistor and proper transformer, can result in +13dBm with a 600Ω output impedance. A bandgap reference provides the reference voltage for all summing nodes, a regulated supply voltage for the YOUW ANG ELECTRONI CO. CS LTD 3 UTC571 stable biasing over a wide temperature range. LI NEAR I NTEGRATED CI RCUI T rectifier and DG cell, and a bias current for the DG cell. The low tempco of this type of reference provides very The typical performance characteristics illustration shows the basic input-output transfer curve for basic compressor or expander circuits. COMPRESSOR INPUT LEVEL OR EXPANDOR OUTPUT LEVEL(dBm) +20 +10 0 -10 -20 -30 -40 -50 -60 -70 -80 -40 -30 -20 -10 0 +10 COMPRESSOR OUTPUT LEVEL OR EXPANDOR INPUT LEVEL(dBm) Basic Input-Output Transfer Curve TYPICAL TEST CIRCUIT Vcc=15V 0.1­F 10­F 6.11 20k 20k 2.2­F V1 3.14 G 7.10 V0 VREF 2.2­F 10k 30k V2 2.15 4 1.16 2.2­F 5.12 8.2k 8.9 200pF Typical Test Circuit YOUW ANG ELECTRONI CO. CS LTD 4 UTC571 INTRODUCTION LI NEAR I NTEGRATED CI RCUI T Much interest has been expressed in high performance electronic gain control circuits. For non-critical applications, an integrated circuit operational transconductance amplifier can be used, but when high-performance is required, one has to resort to complex discrete circuitry with many expensive, well-matched components. This paper describes an inexpensive integrated circuit, the UTC571 Compandor, which offers a pair of high performance gain control circuits featuring low distortion (