MDLS-161612D-02

VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 2 OF 13 DOCUMENT REVISION HISTORY 1: DOCUMENT DATE DESCRIPTION REVISION FROM TO A 2002.07.31 First Release. CHANGED BY PHILIP CHENG CHECKED BY TOM LEE, Z.B.HE VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 3 OF 13 CONTENTS Page No. 1. GENERAL DESCRIPTION 4 2. MECHANICAL SPECIFICATIONS 4 3. INTERFACE SIGNALS 7 4. 4.1 4.2 ABSOLUTE MAXIMUM RATINGS ELECTRICAL MAXIMUM RATINGS (Ta=25°C) ENVIRONMENTAL CONDITION 8 8 8 5. 5.1 5.2 5.3 5.4 ELECTRICAL SPECIFICATIONS TYPICAL ELECTRICAL CHARACTERISTICS TIMING SPECIFICATIONS TIMING DIAGRAM OF VDD AGAINST V0 CORRESPONDENCE BETWEEN CHARACTER CODES AND CHARACTER PATTERNS (NOVATEK STANDARD NT3881D-01) 9 9 10 12 13 VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 4 OF 13 VARITRONIX LIMITED Specification of LCD Module Type Item No.: MDLS161612D-02 1. General Description • • • • • 2. 16 characters (5 x 8 dots) x 1 line STN Positive Yellow Transflective Dot Matrix LCD module. Viewing Angle: 6 O’clock direction. Driving duty: 1/16 Duty, 1/5 bias. ‘NOVATEK’ NT3881DH-01/AI (die form) LCD Controller and Driver or equivalent Yellow-green LED04 backlight. Mechanical Specifications The mechanical detail is shown in Fig. 1 and summarized in Table 1 below. Table 1 Parameter Outline dimensions Effective viewing area Display format Character size Character spacing Character pitch Dot size Dot spacing Dot pitch Weight Specifications 154.4(W) x 43.5(H) x 14.0 MAX.(D) 119.4(W) x 18.7(H) 16 characters x 1 line 5.90(W) x 12.70(H) (5 x 8 dots) 1.00(W) 6.90(W) 1.10(W) x 1.50(H) 0.10(W) x 0.10(H) 1.20(W) x 1.60(H) TBD Unit mm mm mm mm mm mm mm mm grams VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 5 OF 13 Figure 1: Outline Drawing VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 6 OF 13 Figure 2: Backlight Drawing VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 7 OF 13 3. Interface signals Table 2 Pin No. 1 2 3 4 Symbol VSS VDD V0 RS 5 R/W 6 E 7 8 9 10 11 12 13 14 15 or A 16 or K DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 LED(+) LED(-) Description Ground(0V). Power supply for logic (+5V). Power supply for LCD driver. Register Select Input: “High” for Data register (for read and write) ”Low” for Instruction register (for write), Busy flag, address counter (for read). Read/Write signal: ” High” for Read mode. “Low” for Write mode. Enable. Start signal for data read /write. Data input/output (LSB). Data input/output. Data input/output. Data input/output. Data input/output. Data input/output. Data input/output. Data input/output (MSB). Anode of LED backlight. Cathode of LED backlight. VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 8 OF 13 4. Absolute Maximum Ratings 4.1 Electrical Maximum Ratings(Ta = 25 ºC) Table 3 Parameter Symbol Min. Max. Unit Power Supply voltage (Logic) VDD – VSS -0.3 +7.0 V Power Supply voltage (LCD drive) VLCD=VDD – V0 -0.3 +13.5 V Input voltage Vin -0.3 VDD +0.3 V Note: The modules may be destroyed if they are used beyond the absolute maximum ratings. All voltage values are referenced to VSS = 0V. 4.2 Environmental Condition Table 4 Item Ambient Temperature Humidity Vibration (IEC 68-2-6) cells must be mounted on a suitable connector Shock (IEC 68-2-27) Half-sine pulse shape Operating Storage Temperature Temperature (Topr) (Tstg) Min. Max. Min. Max. 0°C +50°C -10°C +60°C 95% max. RH for Ta ≤ 40°C < 95% RH for Ta > 40°C Frequency: 10 ∼ 55 Hz Amplitude: 0.75 mm Duration: 20 cycles in each direction. Pulse duration : 11 ms 2 Peak acceleration: 981 m/s = 100g Number of shocks : 3 shocks in 3 mutually perpendicular axes. Remark Dry no condensation 3 directions 3 directions VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 9 OF 13 5. Electrical Specifications 5.1 Typical Electrical Characteristics At Ta = 25 °C, VDD = 5V± ±5%, VSS=0V. Table 5 Parameter Supply voltage (Logic) Supply voltage (LCD) Input signal voltage for E,DB0-DB7,R/W,RS. Supply Current (Logic & LCD) Supply Current (LCD) Supply Voltage of yellow-green LED04 backlight Symbol VDD-VSS VLCD =VDD-V0 VIH VIL IDD I0 VLED04 Conditions VDD =5.0V, Note1. ”H” level ” L” level Character mode, Note 1 Character mode, Note 1 Forward current =170 mA Min. 4.75 4.1 Typ. 5.00 4.5 Max. 5.25 4.9 Unit V V 2.2 -0.3 - 1.4 VDD 0.8 2.1 V V mA - 1.0 1.5 mA 3.9 4.1 4.3 V No. of LED chips =2x17 =34 Note (1) : There is tolerance in optimum LCD driving voltage during production and it will be within the specified range. VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 10 OF 13 5.2 Timing Specifications At Ta = 0 °C To +50 °C , VDD = +5V±5%, VSS = 0V. Refer to Fig. 3, the bus timing diagram for write mode. Table 6 Parameter Enable cycle time Enable ”High” level pulse width Enable rise time Enable fall time RS, R/W set-up time RS, R/W address hold time Data output delay Data hold time Symbol tCYCE tWHE tRE tFE tAS tAH tDS tDHR Min. 500 300 60 100 10 100 10 Max. 25 25 - Unit ns ns ns ns ns - ns ns ns Max. 25 25 - Unit ns ns ns ns ns 190 - ns ns ns Remarks 8-bit operation mode 4-bit operation mode Refer to Fig. 4, the bus timing diagram for read mode . Table 7 Parameter Enable cycle time Enable ”High” level pulse width Enable rise time Enable fall time RS, R/W set-up time RS, R/W address hold time Read data output delay Read data hold time Symbol tCYCE tWHE tRE tFE tAS tAH tRD tDHR Min. 500 300 60 100 10 20 Remarks 8-bit operation mode 4-bit operation mode VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 11 OF 13 Figure 3: Bus write operation sequence (Writing data from MPU to NT3881). Figure 4: Bus read operation sequence (Reading out data from NT3881 to MPU). VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 12 OF 13 5.3 Timing Diagram of VDD against V0. Power on sequence shall meet the requirement of Figure 5, the timing diagram of VDD against V0. VDD 95% LOGIC SUPPLY VOLTAGE V0 0V 50ms(typical) 0V LCD SUPPLY VOLTAGE Figure 5: Timing diagram of VDD against V0. VL-FS-MDLS161612D-02 REV. A (MDLS161612D-LV-G-LED04G-IC-NT3881DH-01AI) JULY/2002 PAGE 13 OF 13 5.4 Correspondence between Character Codes and Character Patterns (NOVATEK Standard NT3881D-01) “Varitronix Limited reserves the right to change this specification.” FAX:(852) 2343-9555. URL:http://www.varitronix.com - END -