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VL-FS-MGLS128128-54C

VL-FS-MGLS128128-54C

  • 厂商:

    VARITRONIX

  • 封装:

  • 描述:

    VL-FS-MGLS128128-54C - SPECIFICATION OF LCD MODULE TYPE - Varitronix international limited

  • 数据手册
  • 价格&库存
VL-FS-MGLS128128-54C 数据手册
VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 2 OF 12 DOCUMENT REVISION HISTORY DOCUMENT DATE DESCRIPTION REVISION FROM TO A 2005.08.19 First Release. Based on a.) Test Specification: VL-TS-MGLS128128-XX REV. U, 2005.05.05. b.) VL-QUA-012A REV. R, 2004.03.20. According to VL-QUA-012A, LCD size is small because Unit Per Laminate=8 which is more than 6pcs/Laminate. CHANGED BY CHEN HUI JUAN CHECKED BY QIN SONG QING VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 3 OF 12 CONTENTS Page No. 1. 2. 3. 3.1 3.2 4. 4.1 4.2 4.3 4.4 5. 6. GENERAL DESCRIPTION MECHANICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ELECTRICAL MAXIMUM RATINGS – FOR IC ONLY ENVIRONMENTAL CONDITIONS ELECTRICAL SPECIFICATIONS INTERFACE SIGNALS TYPICAL ELECTRICAL CHARACTERISTICS TIMING SPECIFICATIONS TIMING DIAGRAM OF VDD AGAINST VO REMARK LCD COSMETIC CONDITIONS 4 4 6 6 6 7 7 8 9 10 11 12 VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 4 OF 12 VARITRONIX LIMITED Specification of LCD Module Type Model No.: MGLS128128-54C 1. General Description • • • • • • • • • 2. 128 x 128 dots STN Positive Transflective Yellow LCD Graphic Module Driving scheme: 1/128 duty, 1/12.4 bias. Viewing direction: 12 o’clock. ‘Toshiba’ T6963C-0101 flat pack or equivalent LCD Controller. ‘Toshiba’ T6A40 flat pack or equivalent LCD Common Drivers. ‘Toshiba’ T6A39 flat pack or equivalent LCD Segment Drivers. 8 K byte display RAM. Yellow-green LED03 backlight. FPC inter-connection. Mechanical Specifications The mechanical detail is shown in Fig. 1 and summarized in Table 1 below. Table 1 Parameter Outline dimensions Viewing area Active area Display format Dot size Dot spacing Dot pitch Weight Specifications 92.0 (W) x 106.0(H) x 14.5MAX.(D) 73.0(W) x 73.0(H) 70.35(W) x 70.35(H) 128 (Horizontal) x 128 (Vertical) 0.50(W) x 0.50(H) 0.05(W) x 0.05(H) 0.55(W) x 0.55(H) Approx. 119.0 Unit mm mm mm dots mm mm mm gram VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 5 OF 12 Figure 1: Module Specification. VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 6 OF 12 3. 3.1 Absolute Maximum Ratings Electrical Maximum Ratings – for IC Only Table 2 Parameter Symbol Min. Max. Unit Supply voltage (Logic) VDD - VSS -0.3 +7.0 V Supply voltage (LCD drive) VLCD=VDD – V0 -0.3 +28.0 V Input voltage Vin -0.3 VDD +0.3 V Note: 1.) The module may be destroyed if they are used beyond the absolute maximum ratings. 2.) All voltage values are referenced to VSS = 0V. 3.2 Environmental Conditions Table 3 Storage Temperature Remark (Tstg) (Note 1) Min. Max. Min. Max. Ambient Temperature -20°C +70°C -30°C +80°C Dry Humidity No condensation 90% max. RH for Ta ≤ 40°C Vibration (IEC 68-2-6) 3 directions Frequency: 10 ∼ 55 Hz cells must be mounted Amplitude: 0.75 mm on a suitable connector Duration: 20 cycles in each direction. 3 directions Shock (IEC 68-2-27) Pulse duration: 11 ms 2 Half-sine pulse shape Peak acceleration: 981 m/s = 100 g Number of shocks: 3 shocks in 3 mutually perpendicular axes. Note 1: Product cannot sustain in extreme storage conditions for a long time. Item Operating Temperature (Topr) VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 7 OF 12 4. 4.1. Electrical Specifications Interface signals Table 4 Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Note 1: Symbol FGND VSS VDD V0 WR ______ ______ Description Frame Ground (see note 1) Ground (0V) Power supply for logic (+5V) Power supply for LCD drive Command/Data write to module when “L” Command/Data read from module when “L” Chip enable of controller when “L” Command/Data read /write. “H” for command read/write and “L” for data read/write. Controller reset when “L” Data input/output (LSB) Data input/output Data input/output Data input/output Data input/output Data input/output Data input/output Data input/output (MSB) Font select. “H” for 6 x 8 font & “L” for 8 x 8 font Anode of LED backlight. Cathode of LED backlight. RD _____ CE C/D _______ RST DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 FS LED+(A) LED-(K) This pin is electrically connected to the metal bezel (frame). User can choose to connect this pin to VSS or leave it open. VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 8 OF 12 4.2 Typical Electrical Characteristics At Ta = 25 °C, VDD = 5V±5%, VSS = 0V. Table 5 Parameter Supply voltage (Logic) Supply voltage (LCD) Input signal voltage Supply current (Logic & LCD) Symbol VDD –VSS VLCD =VDD –V0 VIN IDD Conditions VDD = 5V,Note 1 “H” level “L” level Character mode, VDD = 5V,Note 1 Checker board mode, VDD = 5V,Note 1 Character mode, VDD = 5V,Note 1 Checker board mode, VDD = 5V,Note 1 Forward current =180mA λ Number of LED chips=2x12=24 17.6 568 22 nm cd/m2 Min. 4.75 19.8 VDD -2.2 0 3.9 Typ. 5.00 20.3 9.1 9.6 3.8 4.1 4.1 Max. 5.25 20.8 VDD 0.8 13.8 14.4 5.7 6.1 4.3 Unit V V V V mA mA mA mA V Supply current (LCD) I0 Supply voltage of yellow-green LED03 backlight Wavelength of yellow-green LED03 backlight Backlight luminance (on the backlight surface) Note 1: VLED There is tolerance in optimum LCD driving voltage during production and it will be within the specified range. VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 9 OF 12 4.3 Timing Specifications At Ta = -20°C To +70°C, VDD = 5V±5%, VSS=0V Refer to Fig. 2, the bus timing diagram. Table 6 Parameter C/D Set-up time C/D Hold Time /CE,/RD,/WR Pulse Width Data Set-up Time Data Hold Time Access Time Output Hold Time Symbol tCDS tCDH tCE, tRD, tWR tDS tDH tACC tOH Min. 100 10 80 80 40 10 Max. 150 50 Unit ns ns ns ns ns ns ns Figure 2: Bus Timing Diagram VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 10 OF 12 4.4 Timing Diagram of VDD Against V0. Power on sequence shall meet the requirement of Figure 3, the timing diagram of VDD against V0. VDD 95% LOGIC SUPPLY VOLTAGE 0V 50ms(typical) OV LCD SUPPLY VOLTAGE V0 Figure 3: Timing Diagram of VDD Against V0. VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 11 OF 12 5. Remark VL-FS-MGLS128128-54C REV. A (MGLS128128-HT-HV-G-LED03G-12) AUG/2005 PAGE 12 OF 12 6. LCD Cosmetic Conditions a.) Reference document follow VL-QUA-012A. b.) LCD size of the product is small. “Varitronix Limited reserves the right to change this specification.” FAX: (852) 2343-9555. URL: http://www.varitronix.com - END -
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