FX-500-EAE-KNNN

FX-500-EAE-KNNN

  • 厂商:

    VECTRON

  • 封装:

  • 描述:

    FX-500-EAE-KNNN - Low Jitter Frequency Translator - Vectron International, Inc

  • 详情介绍
  • 数据手册
  • 价格&库存
FX-500-EAE-KNNN 数据手册
FX-500 Low Jitter Frequency Translator FX-500 Description The FX-500 is a complete crystal-based frequency translator used in communications applications where low jitter is paramount. Performance advantages include superior jitter performance, high output frequencies and small package size. Advanced custom ASIC technology results in a highly robust, reliable and predictable device. The device is packaged in a 6 pin J-Lead ceramic package with a hermetic seam welded lid. Features • • • • • • • • • • • Complete Frequency Translator to 77.760 MHz 3.3 Volt or 5.0 Volt Supply Capable of locking to an 8kHz pulse/ BITS clock Tri-State Output allows board test Lock Detect J-lead Ceramic Package Advanced Custom ASIC Technology Absolute Pull Range Performance to ±100 ppm CMOS output Commercial or Industrial Temperature Range EIA Compatible Tape and Reel Packaging • • • • • Applications Frequency Translation, Clock Smoothing Telecom - SONET/SDH/ATM Datacom - DSLAM, DSLAR, Access Nodes Cable Modem Head End Base Station - GSM, CDMA Block Diagram VCC (6) FIN (1) LD (5) Phase Detector & LD Loop Filter Tri-State (2) VCXO FOUT (4) ÷ ÷ GND (3) Figure 1. Functional block diagram 1 of 7 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Rev: 14Aug2009 Performance Specifications Table 1. Electrical Performance Parameter Frequency Input Frequency Capture Range (Ordering Option) Output Frequency Supply 1 Voltage (Ordering Option) Current (No Load) Input Signal Input Low Level Voltage Input High Level Voltage Pulse Width Output 2 Output High Level Voltage Ouput Low Level Voltage Rise Time Fall Time Duty Cycle 3 ≤ 60 MHz > 60MHz Leakage Current of Input Loop Bandwidth (-3dB), 8kHz input Jitter, 8kHz to 77.76MHz rms p-p Symbol FIN APR FOUT VDD VDD IDD VIL VIH Min 0.001 ±50 1.0 3.0 4.5 Typical Maximum 77.76 ±100 77.76 Units MHz ppm MHz V V mA V V ns V V ns ns % % μA Hz ps ps UI 3.3 5.0 3.6 5.5 40 0.3*VDD 0.7*VDD 6 0.9*VDD 1.8 1.8 45 40 0.1*VDD 3.0 3.0 55 60 1 10 4.7 44 0.003 VOH VOL tR tF D IC BW -1 1. A 0.1 μF low frequency tantalum bypass capacitor in parallel with a 0.01 μF high frequency ceramic capacitor is recommended. 2. Figure 2 defines the waveform parameters. Figure 3 illustrates the standard test conditions under which these parameters are specified and tested. 3. Duty cycle is defined as (on time÷period), with VS = VDD/2, per figure 2. Duty cycle is measured with a 15pf load per figure 3. 4. Other frequencies may be available, please contact factory. Figure 2. Output Waveform Figure 3. Output Test Conditions (25 ± 50C ) 2 of 7 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Rev: 14Aug2009 Absolute Maximum Ratings Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied at these or any other conditions in excess of conditions represented in the operational sections of this data sheet. Exposure to the maximum ratings for the extended periods may adversely affect device reliability. Table 2. Absolute Maximum Ratings Parameter Symbol Ratings Unit Power Supply Storage Temperature VDD TSTR 7 -55 to 125 V 0C Reliability The FX-500 is capable of meeting the following qualification tests Table 3. Environmental Compliance Parameter Conditions Mechanical Shock Mechanical Vibration Lead Solderability Gross and Fine Leak MIL-STD-883, M2002/TEST A MIL-STD-883, M2007/TESTA MIL-STD-883, M2003 MIL-STD-883, M1014 Handling Precautions Although ESD protection circuitrry has been designed into the the FX-424, proper precautions should be taken when handling and mounting. VI employs a human body model and a charged-device model (CDM) for ESD susceptibility testing and design protection evaluation. ESD thresholds are dependent on the circuit parameters used to define the model. Although no industry wide standard has been adopted for the CDM, a standard HBM of resistance=1.5Kohms and capacitance = 100pF is widely used and therefore can be used for comparison purposes Table 4. Predicted ESD R$atings Model Human Body Model Charged Device Model Minimum 1000 V 1000 V Conditions MIL-STD 883, Method 3015 JEDEC, JESD22-C101 3 of 7 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Rev: 14Aug2009 Table 5. Reflow Profile (IPC/JEDEC J-STD-020C) Parameter PreHeat Time Ramp Up Time Above 217 0C Time To Peak Temperature Time At 260 0C Ramp Down Symbol tS RUP tL tAMB-P tP RDN Value 60 sec Min, 180 sec Max 3 0C/sec Max 60 sec Min, 150 sec Max 480 sec Max 20 sec Min, 40 sec Max 6 0C/sec Max The device has been qualified to meet the JEDEC standard for Pb-Free assembly. The temperatures and time intervals listed are based on the PbFree small body requirements. The temperatures refer to the topside of the package, measured on the package body surface. The FX-500 device is hermetically sealed so an aqueous wash is not an issue. Figure 4. Suggested IR Profile Table 6. Tape and Reel Information Tape Dimensions (mm) A B C D E F G Reel Dimensions (mm) H I J K L #/Reel 24 11.5 1.5 4 12 1.78 21 13 100 5 25 330 200 Figure 5. Tape and Reel 4 of 7 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Rev: 14Aug2009 FX500 YWW CCC-CCCC XX-XX Y = Year WW = Week C = Option Codes XX = FREQUENCY CODE (SEE ORDERING INFO) Inch [mm] Figure 6. Outline Drawing and Pad Layout Table 7. Pin Functions Pin # 1 2 3 4 5 6 Symbol fIN Tri-State GND fo LD 2 ! Function Input Frequency Logic Low = Output Disable LOgic High = Output Enabled Case and Electrical Ground Output Frequiency Lock Detect Power Supply Voltage VDD 1. Tristate is driven to logic high or logic low; there is no internal pull up or pull down resistor. 2. LD is an open collector output requiring a 30k ohm pullup resistor to VDD. LD output is logic high under locked condition, logic low for no input at fIN, and for “out-of-lock” condition LD transitions between logic low and logic high at the phase detector 5 of 7 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Rev: 14Aug2009 Ordering Information Table 8. Standard Frequencies 0.0010 0.0020 0.0032 0.0040 0.0080 0.0095 0.0100 0.0156 0.0157 0.0158 0.0160 0.0240 0.0250 0.0320 0.0400 0.0441 0.0480 0.0481 0.0500 0.0640 0.0800 0.1000 0.1280 0.2430 0.2560 0.3200 0.3840 0.4000 0.4800 0.5000 0.5120 0.6555 0.7720 0.9600 A1 AR AG A2 A3 AU A6 AL AD AC A4 BX BR BW AP AA AB AV BT A5 A9 AH AX A8 AM AW AY AF AK BP AJ AE AT A7 1.0000 1.0240 1.2150 1.2288 1.2500 1.3333 1.5000 1.5360 1.5440 1.9200 2.0000 2.0480 2.3040 2.4576 2.5000 2.5575 3.0880 3.2400 3.2500 3.3750 3.8400 4.0000 4.0960 5.0000 5.1200 6.1440 6.2914 6.2915 6.3120 6.4800 6.7500 7.6800 7.7760 8.1920 BB B2 BU BK BG BF BE BV B3 B1 B8 B4 BD BJ BM B9 B6 BL BC BH B7 BN B5 C6 CD CG CC CF C7 C2 CB C9 C5 C3 9.2160 9.7200 9.7500 9.8304 10.0000 10.2300 10.2400 10.4143 10.4582 10.4872 10.9490 10.9500 11.1840 12.2880 12.3077 12.3520 12.8000 13.0000 13.5000 14.8352 15.0000 15.0336 15.3600 16.0000 16.3840 17.1840 18.4320 18.5280 18.7500 19.2000 19.3927 19.4400 19.5313 19.6608 CH C8 CE C1 C4 DP DM DV DU DN DG DJ DF D8 DY D1 D2 D3 DT DL D4 DR DW D9 D5 DE D7 DC EE DD DX D6 DZ DB 19.6990 19.7190 19.9219 20.0000 20.1416 20.4800 20.5444 20.7135 20.8286 20.8286 20.9165 21.0051 22.0000 22.1048 22.2171 22.5792 24.0000 24.5760 24.7040 25.0000 25.1658 25.6000 25.9200 26.0000 27.0000 27.6480 28.7040 29.4912 29.5000 30.0000 30.7200 30.8800 31.2500 32.0000 DK DH ED E2 E3 E4 EF E1 EB EG EH EJ E9 EK E5 E8 EC E6 E7 F7 F8 F6 F2 F3 F4 FB F1 F5 F9 HE H1 HF H8 H2 32.7680 33.0000 33.3330 34.3680 34.5600 36.8640 37.0560 37.1250 37.5000 38.8800 39.0625 39.3216 39.8438 40.0000 40.2831 40.9600 41.0889 41.6571 41.8329 42.0000 42.0102 42.5000 42.6600 44.2095 44.4343 44.6218 44.7360 44.9280 45.1584 45.8240 46.0379 46.7200 46.8750 48.0000 H3 H7 HC H6 HB HG H4 H9 HK H5 HH HD HJ JF KK J1 KM KP KT JB KV JC JZ KX LF JW J3 JE JG JM LG JK JY JV 49.1520 49.4080 50.0000 50.0480 51.2000 51.8400 52.0000 53.3300 54.7460 55.0000 60.0000 61.3800 61.4400 62.2080 62.5000 62.9145 63.3600 63.8976 64.0000 64.1520 65.5360 66.0000 70.0000 70.6560 71.6100 73.7280 74.1250 74.1758 74.2500 75.0000 76.8000 77.7600 J7 J2 JD KD LL J4 JP JU JL JX JR KY J5 J8 J9 LE JJ JN JT JH J6 JA KB KC KF K8 K1 KA K7 KH K4 K2 Note 1: Other frequencies are available upon request, please contact VI for details SS is code for non-standard frequencies, list the frequency after the part number. Note 2: Not all combinations are possible. Note 3: Output frequency must be equal to or greater than the input frequency. The ratio of fo/fIN must be an integer. Also, the output frequency must be equal to greater than 100 kHz. 6 of 7 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Rev: 14Aug2009 Ordering Information F X - 5 0 0 - E A E - K N N N - XX - XX Product Family FX: Frequency Translator Package 500: 9.0 x 14 x 4.5 mm Input D: 5.0 Vdc ±10% E: 3.3 Vdc ±10% Output A: CMOS Operating Temperature E: -40 to 85 °C T: 0 to 70 °C Absolute Pull Range K: ± 50 ppm P: ± 80 ppm S: ± 100 ppm Factory Use N: Standard Output Frequency (See Above) Input Frequency (See Above) Performance Options N: Standard A: Improved Phase Noise Loop Filter BW N: Internal Loop Filter Note: Not all combinations will be availabe - check with the factory to determine the optimum configuration for your application For Additional Information, Please Contact USA: Vectron International 267 Lowell Road Hudson, NH 03051 Tel: 1.888.328.7661 Fax: 1.888.329.8328 Europe: Vectron International Landstrasse, D-74924 Neckarbischofsheim, Germany Tel: +49 (0) 3328.4784.17 Fax: +49 (0) 3328.4784.30 Asia: Vectron International 1F-2F, No 8 Workshop, No 308 Fenju Road WaiGaoQiao Free Trade Zone Pudong, Shanghai, China 200131 Tel: 86.21.5048.0777 Fax: 86.21.5048.1881 Disclaimer Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. 7 of 7 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Rev: 14Aug2009
FX-500-EAE-KNNN
### 物料型号 - 型号:FX-500

### 器件简介 FX-500是一款基于晶体的完整频率转换器,用于通信应用中,这些应用需要极低的抖动。其性能优势包括优越的抖动性能、高输出频率和小尺寸封装。采用先进的定制ASIC技术,使得该器件非常坚固、可靠和可预测。

### 引脚分配 - Pin 1 (fN): 输入频率 - Pin 2 (Tri-State): 三态输出,逻辑低=输出禁用,逻辑高=输出启用 - Pin 3 (GND): 机箱和电气地 - Pin 4 (f): 输出频率 - Pin 5 (LD2): 锁检测 - Pin 6 (VDD): 电源电压

### 参数特性 - 完整频率转换至77.760 MHz - 3.3伏或5.0伏供电 - 能够锁定到8kHz脉冲/BITS时钟 - 三态输出允许板测试 - 锁检测 - J-lead陶瓷封装 - 先进的定制ASIC技术 - 绝对拉范围性能至±100 ppm - CMOS输出 - 商用或工业温度范围 - EIA兼容胶带和卷包装

### 功能详解 FX-500提供了一个完整的频率转换功能,能够将输入频率转换为输出频率,具有低抖动和高输出频率的特点。它还包括一个三态输出,允许在测试期间禁用输出信号,以及一个锁检测功能,用于指示设备是否已锁定到输入信号。

### 应用信息 FX-500适用于以下应用: - 频率转换、时钟平滑 - 电信 - SONET/SDH/ATM - 数据通信 - DSLAM, DSLAR, 接入节点 - 电缆调制解调器头端 - 基站 - GSM, CDMA

### 封装信息 FX-500采用6引脚J-Lead陶瓷封装,带有焊接盖的密封接缝。
FX-500-EAE-KNNN 价格&库存

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