SGUGLA44.736_10

S-Type Voltage Controlled Crystal Oscillator Features • Output Frequencies to 65.536MHz • 5 or 3.3 Vdc operation • Tri-State Output • Low jitter < 6pS rms (for freq >12MHz) • VCXO with CMOS outputs • 0/70 or –40/85 °C temperature range • Hermetically sealed ceramic SMD package The S-Type Voltage Controlled Crystal Oscillator Output Buffer / Tri State Product is free of lead and compliant to EC RoHS Directive Applications • SONET/SDH • xDSL • Digital Video ESD Diodes • Low jitter PLL’s Vc Input Buffer Block Diagram fO Description The VI S-Type Voltage Controlled Crystal Oscillator (VCXO) is a quartz stabilized square wave generator with a CMOS output and is tested at CMOS (3.3 and 5V operation) and TTL (5 V operation) logic levels. Devices are tested for absolute pull range (APR) and start-up over the operating temperature range which insures the performance and reliability. Figure 1 Vectron International 267 Lowell Rd, Hudson NH 03051 Tel:1-88-VECTRON-1 e-mail: vectron@vectron.com S-Type Voltage Controlled Crystal Oscillator Performance Characteristics Table 1. Electrical Performance Parameter Supply Voltage 1 (+5 or +3.3 V) Supply Current Output Logic Levels Output Logic High2 Output Logic Low2 Transition Times Rise Time2 Fall Time2 Symmetry or Duty Cycle3 Nominal Output Frequency Options Test Conditions for APR (+5V option) Test Conditions for APR (+3.3V option) Absolute Pull Range (ordering option) Gain Transfer Operating temperature (ordering option) Control Voltage Leakage Current Control Voltage Bandwidth (-3dB) Symbo l VDD IDD VOH VOL tR tF SYM fO VC VC APR Min Typical Maximum Units V mA V V ns ns % MHz V V ppm °C uA KHz 0.9*VDD 1.1*VDD 10mA +0.25mA/MHz 0.8*VDD 0.1VDD 5 5 45/55 65.536 4.5 3.0 50,80 or 100 Positive 0/70 or –40/85 ±1 10 1.024 0.5 0.3 IVCXO BW 1. A 0.01uF capacitor should be located as close to the supply as possible (to ground) and a 0.1uF is also recommended. 2. Figure 1 defines these parameters. Figure 2 illustrates the equivalent five gate TTL load and operating conditions under which these parameters are tested and specified. 3. Symmetry is defined as (ON TIME/PERIOD with Vs=-1.4 V for TTL and Vs=2.5 V for CMOS, 5 volt operation, and Vs=1.65V for 3.3 Volt operation. TTL/CMOS pin should be grounded for frequencies