VC-708
LVPECL, LVDS Crystal Oscillator Data Sheet Ultra Low Phase Noise
VC-708
Description
Vectron’s VC-708 Crystal Oscillator is a quartz stabilized, low phase noise, differential output oscillator which is hermetically sealed in a 5x7 ceramic package.
Features
• • • • • • 47 fs RMS jitter typical, 12kHz-20MHz Ultra Low Jitter Performance, 3rd OT Crystal Design Differential Output Low Current Consumption -10/70°C or -40/85°C Operation Hermetically Sealed 5x7 Ceramic Package • • • • • • • • •
Applications
Ethernet, GbE, SynchE Fiber Channel PON Driving A/D’s, D/A’s, FPGA’s Test and Measurement Medical Storage Area Networking Telecom COTS
• Product is compliant to RoHS directive and fully compatible with lead free assembly
Block Diagram
Complementary Output Output VDD
Phase Noise Plot
Crystal
Oscillator
NC
NC
Gnd
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Performance Specifications
Table 1. Electrical Performance, LVPECL Parameter
Voltage1 Current (No Load) Nominal Frequency Stability2 (Ordering Option) Outputs Output Logic Levels, -10/70°C Output Logic High Output Logic Low Output Logic Levels, -40/85°C Output Logic High Output Logic Low Output Rise and Fall Time3 Rise Time Fall Time Load Duty Cycle
4
Symbol
VDD IDD
Min
Supply 3.135 2.375 Frequency
Typical
3.3 2.5 50
Maximum
3.465 2.625 65
Units
V mA MHz ppm
fN
125.000, 156.250, 160.000, 161.132812, 200.000 ±25, ±50, ±100
VOH VOL VOH VOL tR tF
VDD-1.025 VDD-1.810 VDD-1.085 VDD-1.830
VDD-0.880 VDD-1.620 VDD-0.880 VDD-1.555 1.0 1.0 50 ohms into VDD-1.3V
V V V V ns ns % fs ps ps ps
45 фJ фJ
6
50 47 1.3 12 0
55 100
Jitter (12 kHz - 20 MHz ) 156.250MHz5 Period Jitter RMS P/P Deterministic Jitter7 Start-Up Time Operating Temperature (Ordering Option) Package Size
tSU TOP -10/70 or -40/85 5.0 x 7.0 x 1.8
10
ms °C mm
1. The VC-708 power supply pin should be filtered, e.g., a 10, 0.1 and 0.01uf capacitor. 2. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR reflow. 3. Figure 1 defines these parameters. 4. Duty Cycle is defined as the On Time/Period, see Figure 1. 5. Measured using an Agilent E5052. 6. Measured using a LeCroy Wavemaster 8600A, 90K samples, no filtering applied. 7. Measured using a Wavecrest SIA3300C, 90K samples.
tR VDD*0.8 Crossing Point VDD*0.2 On Time Period
Figure 1.
tF
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Performance Specifications
Table 2. Electrical Performance, LVDS Parameter
Voltage (Ordering Option) Current (No Load) Nominal Frequency Stability2 (Ordering Option) Outputs Differential Output Amplitude Differential Output Error Offset Voltage Offset Voltage Error Output Rise and Fall Time3 Rise Time Fall Time Load Duty Cycle
3,4 1
Symbol
VDD IDD
Min
Supply 3.135 2.375 Frequency
Typical
3.3 2.5 37 156.250 ±25, ±50, ±100
Maximum
3.465 2.625 48
Units
V mA MHz ppm
fN
247 -50 1.125 -50 tR tF 100 ohms differential 45 фJ фJ 1.3 12 0 tSU TOP -10/70 or -40/85 5.0 x 7.0 x 1.8 50 65 1.250
454 50 1.375 50 1.0 1.0 55 130
mV mV V mV ns ns % fs ps ps ps
Jitter (12 kHz - 20 MHz ) 156.250MHz5 Period Jitter RMS P/P Deterministic Jitter7 Start-Up Time Operating Temperature (Ordering Option) Package Size
6
10
ms °C mm
1. The VC-708 power supply pin should be filtered, eg, a 10, 0.1 and 0.01uf capacitor. 2. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR reflow. 3. Figure 1 defines these parameters. 4. Duty Cycle is defined as the On Time/Period, see Figure1. 5. Measured using an Agilent E5052. 6. Measured using a LeCroy Wavemaster 8600A, 90K samples, no filtering applied. 7. Measured using a Wavecrest SIA3300C, 90K samples.
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Package and Pinout
Table 3. Pinout Pin #
1 2 3 4 5 6
Symbol
NC NC GND fO CfO VDD
Function
No Internal Connection is made No Internal Connection is made Electrical and Lid Ground Output Frequency Complementary Output Frequency Supply Voltage VC-708 Frequency Date Code 6 7.0±0.15 5
4
5.0±0.15
1 1.96
2 1.40
3 1.8 max 1.20
1 1.78 3.66 6
2 Bottom View 5
3 3.57 4
2.54 5.08 5.08 Units are mm Figure 2. Pad Layout
2.54
Figure 3. Package Outline Drawing
LVPECL Application Diagrams
VDD 0.01uF 1 NC 2 NC 3 4 140 140 5 0.01uF 6 0.01uF
Figure 4. Single Resistor Termination Scheme Resistor values are typically 140 ohms for 3.3V operation and 84 ohms for 2.5V operation.
Figure 5. Pull-Up Pull Down Termination Resistor values shown are typical for 3.3 V opertaion. For 2.5V operation, the resistor to ground is 62 ohms and the resistor to supply is 250 ohms
The VC-708 incorporates a standard PECL output scheme, which are unterminated FET drains. There are numerous application notes on terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 4, and a pull-up/pull-down scheme as shown in Figure 5. AC coupling capacitor are optional, depending on the application and the input logic requirements of the next stage. One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left unterminated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems.
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LVDS Application Diagrams
LVDS Driver
100
LVDS Receiver
LVDS Driver
100
Receiver
Figure 6. LVDS to LVDS Connection, Internal 100ohm Resistor Some LVDS structures have an internal 100 ohm resistor on the input and do not need additional components. AC blocking capacitors can be used if the DC levels are incompatible.
Figure 7. LVDS to LVDS Connection Some input structures may not have an internal 100 ohm resistor on the input and will need an external 100ohm resistor for impedance matching. Also, the input may have an internal DC bias which may not be compatible with LVDS levels, AC blocking capacitors can be used.
One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-terminated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems.
Environmental and IR Compliance
Table 4. Environmental Compliance Parameter
Mechanical Shock Mechanical Vibration Temperature Cycle Solderability Fine and Gross Leak Resistance to Solvents Moisture Sensitivity Level Contact Pads
Condition
MIL-STD-883 Method 2002 MIL-STD-883 Method 2007 MIL-STD-883 Method 1010 MIL-STD-883 Method 2003 MIL-STD-883 Method 1014 MIL-STD-883 Method 2015 MSL1 Gold over Nickel
IR Compliance
S Suggested IR Profile Devices are built using lead free epoxy and can be subjected to standard lead free IR reflow conditions shown in Table 5. Contact pads are gold over nickel and lower maximum temperatures can also be used, such as 220C. Table 5. Reflow Profile Parameter
PreHeat Time Ramp Up Time above 217°C Time to Peak Temperature Time at 260°C Time at 240°C Ramp down
Symbol
ts RUP tL tAMB-P tP tP2 RDN
Value
200 sec Max 3°C/sec Max 150 sec Max 480 sec Max 30 sec Max 60 sec Max 6°C/sec Max
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Maximum Ratings, Tape & Reel
S
Absolute Maximum Ratings and Handling Precautions Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied or any other excess of conditions represented in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended periods may adversely affect device reliability.
Although ESD protection circuitry has been designed into the VC-708, proper precautions should be taken when handling and mounting, VI employs a Human Body Model and Charged Device Model for ESD susceptibility testing and design evaluation. ESD thresholds are dependent on the circuit parameters used to define the model. Although no industry standard has been adopted for the CDM a standard resistance of 1.5kOhms and capacitance of 100pF is widely used and therefor can be used for comparison purposes.
Table 6. Maximum Ratings Parameter
Storage Temperature Supply Voltage ESD, Human Body Model ESD, Machine Model
Symbol
TSTORE
Rating
-50/125 -0.5 to 7.0 1500 1500
Unit
°C V V V
Table 7. Tape and Reel Information Tape Dimensions (mm)
W 16 F 7.5 Do 1.5 Po 4 P1 8 A 180 B 2
Reel Dimensions (mm)
C 13 D 21 N 60 W1 17 W2 19 #/Reel 250
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Ordering Information
Table 8. Standard Output Frequencies (MHz)
125.000 156.250 160.000 161.13281 200.000
VC-708- E C E - K N X N - 156M250000
Product XO Package 5x7 Voltage Options E: +3.3 Vdc, ±5% H: +2.5 Vdc, ±5% Output C: LVPECL D: LVDS Temp Range W: -10/70°C E: -40/85°C
*Note: not all combination of options are available. Other specifications may be available upon request.
Frequency in MHz Other (Future Use) N: Standard Enable/Disable Pin X: No Enable/Disable Other (Future Use) N: Standard Stability F: ±25ppm K: ±50ppm S: ±100ppm
Example: VC-708-ECE-KNXN-156M250000
For Additional Information, Please Contact
USA:
Vectron International 267 Lowell Road Hudson, NH 03051 Tel: 1.888.328.7661 Fax: 1.888.329.8328
Europe:
Vectron International Landstrasse, D-74924 Neckarbischofsheim, Germany Tel: +49 (0) 3328.4784.17 Fax: +49 (0) 3328.4784.30
Asia:
VI Shanghai 1589 Century Avenue, the 19th Floor Chamtime International Financial Center Shanghai, China Tel: 86.21.6081.2888 Fax: 86.21.6163.3598
Disclaimer
Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information.
Rev: 12/14/2010 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page7