VC-709-ECE-KAAN-156M250

HCSL, LVDS, LVPECL Crystal Oscillator Data Sheet VC-709 VC-709 Description Vectron’s VC-709 Crystal Oscillator is a quartz stabilized, differential output oscillator, operating off a 2.5 or 3.3 volt supply in a hermetically sealed 5x7 ceramic package. Features • • • • • • • • • Ultra Low Jitter Performance, 3rd OT or Fundamental Crystal Design 13.500-170.0000MHz Output Frequencies Low Power 400ps max Rise and Fall Time Excellent Power Supply Rejection Ratio Enable/Disable 3.3 or 2.5V operation -10/70°C or -40/85°C Operation Hermetically Sealed 5x7 Ceramic Package • • • • • • • • • • • Applications PCI Express Ethernet, GbE, Synchronous Ethernet Fiber Channel Enterprise Servers Telecom Clock source for A/D’s, D/A’s Driving FPGA’s Test and Measurement PON Medical COTS • Product is compliant to RoHS directive and fully compatible with lead free assembly Block Diagram Complementary Output Output VDD Voltage Regulator Crystal Phase Noise Oscillator E/D or NC E/D or NC GND Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page1 Performance Specifications Table 1. Electrical Performance, LVPECL Option Parameter Voltage 1 Symbol VDD IDD Min Supply 3.135 2.375 Frequency Typical 3.3 2.5 35 Maximum 3.465 2.625 50 170.000 Units V V mA MHz ppm Current (No Load) Nominal Frequency Stability,3 (Ordering Option) fN 13.5 ±25, ±50 or ±100 Outputs Output Logic Levels Output Logic High Output Logic Low Load Duty Cycle4 Jitter, 156.250MHz 12kHz-50MHz 12kHz -20MHz 10kHz-1MHz 5 4 VOH VOL tR/tF VDD-1.085 VDD-1.830 50 ohms into VDD-1.3V 45 VDD-0.880 VDD-1.555 500 55 200 150 100 V V ps % fs fs fs ps ps ps ps ps ps V V ns uA ms °C mm Output Rise and Fall Time3 фJ Period Jitter6 RMS P/P Cycle-Cycle6 RMS P/P Random Jitter7 Deterministic Jitter7 Output Enabled Output Disabled Disable Time Enable/Disable Leakage Current Start-Up Time Operating Temp. (Ordering Option) Package Size 8 фJ 1.1 10.5 1.9 17.7 2.2 0 Enable/Disable VIH VIL tD tSU TOP -10/70 or -40/85 5.0 x 7.0 x 1.6 0.7*VDD 0.3*VDD 200 ±200 2 1. The VC-709 power supply pin should be filtered, eg, a 0.1 and 0.01uf capacitor. 2. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR reflow. 3. Figure 3 defines the test circuit and Figure 4 defines these parameters. 4. Duty Cycle is defined as the On/Time Period. 5. Measured using an Agilent E5052. 6. Measured using a LeCroy Wavemaster 8600A, 90K samples 7. Measured using a Wavecrest SIA3300C, 90K samples. 8. Outputs will be Enabled if Enable/Disable is left open. VDD -1.3V tR VAMP*0.8 Cross Point VAMP*0.2 tF 1 NC 2 NC 3 6 5 4 VAMP On Time 50 -1.3V 50 Period Figure 1. Figure 2. Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page2 Performance Specifications Table 2. Electrical Performance, LVDS Option Parameter Voltage1 Current (No Load) Nominal Frequency Stability (Ordering Option) Outputs Output Logic Levels3 Output Logic High Output Logic Low Differential Output Amplitude Differential Output Error Offset Voltage Offset Voltage Error Output Leakage Current Output Rise and Fall Time Load Duty Cycle4 Jitter, 156.250MHz 12kHz - 50MHz 12kHz - 20MHz 10kHz - 1MHz 5 3 2 Symbol VDD IDD Min Supply 3.135 2.375 Frequency Typical 3.3 2.5 Maximum 3.465 2.625 60 Units V V mA MHz ppm fN 13.5 ±25, ±50 or ±100 170.000 VOH VOL 0.9 250 1.125 1.43 1.10 350 1.25 1.6 450 50 1.375 50 10 V V mV mV V mV uA ps % fs fs fs ps ps ps ps ps ps V V ns uA ms °C mm tR/tF 100 ohms differential 45 фJ 400 55 200 150 100 Period Jitter6 RMS P/P Cycle-Cycle Jitter6 RMS P/P Random Jitter7 Deterministic Jitter7 Output Enabled Output Disabled Disable Time Enable/Disable Leakage Current Start-Up Time Operating Temp. (Ordering Option) 8 фJ 1.1 10.5 1.9 17.7 2.2 0 Enable/Disable VIH VIL tD IE/D tSU TOP -10/70 or -40/85 0.7*VDD 0.3*VDD 200 ±200 2 Package Size 5.0 x 7.0 x 1.6 1. The VC-709 power supply pin should be filtered, eg, a 0.1 and 0.01uf capacitor. 2. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR reflow. 3. Figure 5 defines these parameters and Figure 4 defines the test circuit. 4. Duty Cycle is defined as the On/Time Period. 5. Measured using an Agilent E5052. 6. Measured using a LeCroy Wavemaster 8600A, 90K samples. 7. Measured using a Wavecrest SIA3300C, 90K samples. 8. Outputs will be Enabled if Enable/Disable is left open. 0.01 uF DC Out 50 50 Out 5 2 4 3 6 1 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page3 Figure 3. Performance Specifications Table 3. Electrical Performance, HCSL Output Parameter Voltage1 Current (No Load) Nominal Frequency Stability (Ordering Options) Outputs Output Logic Swing Output Rise and Fall Time3 Load Duty Cycle4 Jitter (12 kHz - 20 MHz ) 100.000MHz Period Jitter6 RMS P/P Cycle-Cycle Jitter6 RMS P/P Random Jitter7 Deterministic Jitter7 Output Enabled Output Disabled Disable Time Enable/Disable Leakage Current Start-Up Time Operating Temp. (Ordering Option) Package Size 8 5 2 Symbol VDD IDD Min Supply 2.375 3.165 Frequency Typical 2.5 3.3 Maximum 2.625 3.465 30 Units V V mA MHz ppm fN 13.5 ±25, ±50 or ±100 170 VOH tR/tF 0.62 0.78 400 50 ohms to ground V ps % fs ps ps ps ps ps ps V V ns uA ms °C mm 45 фJ фJ 1.0 9.7 1.8 18.3 2.2 0 Enable/Disable VIH VIL tD IE/D tSU TOP -10/70 or -40/85 5.0 x 7.0 x 1.6 0.7*VDD 55 300 0.3*VDD 200 ±200 2 1. The VC-709 power supply pin should be filtered, e.g., a 0.1 and 0.01uf capacitor. 2. Includes calibration tolerance, operating temperature, supply voltage variations, aging and IR reflow. 3. Figure 1 defines the test circuit and Figure 2 defines these parameters. 4. Duty Cycle is defined as the On Time/Period. 5. Measured using an Agilent E5052. 6. Measured using a LeCroy Wavemaster 8600A, 90K samples. 7. Measured using a Wavecrest SIA3300C, 90K samples. 8. Outputs will be Enabled if the Enable/Disable pad is left open. tR 1 2 3 6 5 4 50 Ω 50 Ω tF VAMP*0.8 Cross Point VAMP*0.2 On Time Period VAMP Figure 4. Figure 5. Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page4 Package and Pinout Table 4. Pinout Pin # 1 2 3 4 5 6 Symbol E/D or NC E/D or NC GND fO CfO VDD Function Enable/Disable Enable/Disable Electrical and Lid Ground Output Frequency Complementary Output Frequency Supply Voltage Frequency Date Code 5.0±0.15 6 7.0±0.15 5 4 1 1.96 2 1.40 3 1.6 max 1.10 1 1.78 3.66 6 2 Bottom View 5 3 3.7 4 Dimensions are in mm 2.54 5.08 5.08 2.54 Figure 6. Pad Layout Figure 7. Package Outline Drawing HCSL Application Diagrams 15mA 1 2 3 6 5 4 50 Ω ZL=50 ohms ZL=50 ohms 50 Ω 1 2 3 6 10-30 Ω 5 10-30 Ω 4 50 Ω ZL=50 ohms 50 Ω ZL=50 ohms Figure 8. Standard HCSL Output Configuration Figure 9. Single Resistor Termination Scheme Figure 10. In some cases a 10-30 ohm series resistor is used to help reduce overshoot. The VC-709 incorporates a standard High Speed Current Logic, HCSL ,output scheme which is a 15mA current source switched between Out and Complementary Out. Being un-terminated drains, as shown in Figure 8, they require external 50 ohm resistors to ground as shown in Figure 9. HCSL is a high impedance output with quick switching times, in can be advantageous to use a 10 to 30 ohm series resistor as shown in Figure 10, to help reduce overshoot/ ringing. One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-terminated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems. Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page5 LVPECL Application Diagrams VDD 0.01uF 1 NC 2 NC 3 4 140 140 5 0.01uF 6 0.01uF Figure 11. Single Resistor Termination Scheme Resistor values are typically 140 ohms for 3.3V operation and 84 ohms for 2.5V operation. Figure 12. Pull-Up Pull Down Termination Resistor values shown are typical for 3.3 V opertaion. For 2.5V operation, the resistor to ground is 62 ohms and the resistor to supply is 250 ohms The VC-709 incorporates a standard PECL output scheme, which are un-terminated FET drains. There are numerous application notes on terminating and interfacing PECL logic and the two most common methods are a single resistor to ground, Figure 11, or for best 50 ohm matching a pull-up/pull-down scheme as shown in Figure 12 should be used. AC coupling capacitor are optional, depending on the application and the input logic requirements of the next stage. One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-terminated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems. LVDS Application Diagrams LVDS Driver 100 LVDS Receiver LVDS Driver 100 Receiver Figure 13. LVDS to LVDS Connection, Internal 100ohm Resistor Some LVDS structures have an internal 100 ohm resistor on the input and do not need additional components. AC blocking capacitors can be used if the DC levels are incompatible. Figure 14. LVDS to LVDS Connection Some input structures may not have an internal 100 ohm resistor on the input and will need an external 100ohm resistor for impedance matching. Also, the input may have an internal DC bias which may not be compatible with LVDS levels, AC blocking capacitors can be used. One of the most important considerations is terminating the Output and Complementary Outputs equally. An unused output should not be left un-terminated, and if it one of the two outputs is left open it will result in excessive jitter on both. PC board layout must take this and 50 ohm impedance matching into account. Load matching and power supply noise are the main contributors to jitter related problems. Environmental and IR Compliance Table 5. Environmental Compliance Parameter Mechanical Shock Mechanical Vibration Temperature Cycle Solderability Fine and Gross Leak Resistance to Solvents Moisture Sensitivity Level Contact Pads Condition MIL-STD-883 Method 2002 MIL-STD-883 Method 2007 MIL-STD-883 Method 1010 MIL-STD-883 Method 2003 MIL-STD-883 Method 1014 MIL-STD-202 Method 215 MSL1 Gold over Nickel Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page6 IR Compliance S Suggested IR Profile Devices are built using lead free epoxy and can be subjected to standard lead free IR reflow conditions shown in Table 6. Contact pads are gold over nickel and lower maximum temperatures can also be used, such as 220C. Table 6. Reflow Profile Parameter PreHeat Time Ramp Up Time above 217°C Time to Peak Temperature Time at 260°C Time at 240°C Ramp down Symbol ts RUP tL tAMB-P tP tP2 RDN Value 200 sec Max 3°C/sec Max 150 sec Max 480 sec Max 30 sec Max 60 sec Max 6°C/sec Max Maximum Ratings, Tape & Reel S Absolute Maximum Ratings and Handling Precautions Stresses in excess of the absolute maximum ratings can permanently damage the device. Functional operation is not implied or any other excess of conditions represented in the operational sections of this data sheet. Exposure to absolute maximum ratings for extended periods may adversely affect device reliability. Although ESD protection circuitry has been designed into the VC-709, proper precautions should be taken when handling and mounting, VI employs a Human Body Model and Charged Device Model for ESD susceptibility testing and design evaluation. ESD thresholds are dependent on the circuit parameters used to define the model. Although no industry standard has been adopted for the CDM a standard resistance of 1.5kOhms and capacitance of 100pF is widely used and therefor can be used for comparison purposes. Table 7. Maximum Ratings Parameter Storage Temperature Junction Temperature Supply Voltage Enable Disable Voltage ESD, Human Body Model ESD, Charged Device Model -55 to 125 150 -0.5 to 5.0 -0.5 to VDD+0.5 1500 1500 Unit °C C V V V V Table 8. Tape and Reel Information Tape Dimensions (mm) W 16 F 7.5 Do 1.5 Po 4 P1 8 A 180 B 2 Reel Dimensions (mm) C 13 D 21 N 50 W1 17 W2 21 #/Reel 250 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page7 Ordering Information VC-709- E C E - K A A N - xxxMxxxxxx Frequency in MHz Product XO Package 5x7 Voltage Options E: +3.3 Vdc ±5% H: +2.5 Vdc ±5% Output H: HCSL C: LVPECL D: LVDS Temp Range W: -10/70°C E: -40/85°C *Note: not all combination of options are available. Other specifications may be available upon request. Other (Future Use) N: Standard Enable/Disable Pin A: Pin 1 B: Pin 2 Enable/Disable Logic A: Enable High Stability F: ±25ppm K: ±50ppm S: ±100ppm Example: VC-709-ECE-KAAN-156M250 ±20ppm Options VC-709-107-frequency= VC-709-109-frequency= VC-709-110-frequency= VC-709-111-frequency= LVPECL, LVDS, LVPECL, LVDS, +3.3V, +3.3V, +2.5V, +2.5V, ±20ppm over -10/70°C, ±20ppm over -10/70°C, ±20ppm over -10/70°C, ±20ppm over -10/70°C, E/D on Pin1 E/D on Pin1 E/D on Pin1 E/D on Pin1 PCI Express Ordering Information VC-709- PCIE2 - 100M000000 Product XO Package 5x7 Frequency in MHz Options Supply =2.25-3.63V Output = HCSL Stability = ±50 ppm over -40/85°C Enable/Disable on Pin 1 For Additional Information, Please Contact USA: Vectron International 267 Lowell Road Hudson, NH 03051 Tel: 1.888.328.7661 Fax: 1.888.329.8328 Europe: Vectron International Landstrasse, D-74924 Neckarbischofsheim, Germany Tel: +49 (0) 3328.4784.17 Fax: +49 (0) 3328.4784.30 Asia: VI Shanghai 1589 Century Avenue, the 19th Floor Chamtime International Financial Center Shanghai, China Tel: 86.21.6081.2888 Fax: 86.21.6163.3598 Disclaimer Vectron International reserves the right to make changes to the product(s) and or information contained herein without notice. No liability is assumed as a result of their use or application. No rights under any patent accompany the sale of any such product(s) or information. Rev: 03/28/2011 Vectron International • 267 Lowell Road, Hudson, NH 03051 • Tel: 1-88-VECTRON-1 • http://www.vectron.com Page8