BCM3814V60E15A3T02

End of Life BCM® in a VIA™ Package Bus Converter BCM3814x60E15A3yzz ® C S US C NRTL US Isolated Fixed-Ratio DC-DC Converter Features & Benefits Product Ratings • Up to 130A continuous low-voltage-side current • Fixed transformation ratio (K) of 1/4 • Up to 1000W/in3 power density • 97.4% peak efficiency VHI = 54V (36 – 60V) ILO = up to 130A VLO = 13.5V (9 – 15V) (no load) K = 1/4 • Integrated ceramic capacitance filtering Product Description • Parallel operation for multi-kW arrays The BCM3814x60E15A3yzz in a VIA package is a high-efficiency Bus Converter, operating from a 36 to 60VDC high-voltage bus to deliver an isolated 9 to 15VDC unregulated, low voltage. • OV, OC, UV, short circuit and thermal protection • 3814 package This unique ultra-low-profile module incorporates DC-DC conversion, integrated filtering and PMBus commands and controls in a chassis or PCB mount form factor. • High MTBF • Thermally enhanced VIA package • PMBus® management interface The BCM offers low noise, fast transient response and industry leading efficiency and power density. A low-voltage‑side referenced PMBus-compatible telemetry and control interface provides access to the BCM’s configuration, fault monitoring and other telemetry functions. Typical Applications • DC Power Distribution • Information and Communication Technology (ICT) Equipment Leveraging the thermal and density benefits of Vicor VIA packaging technology, the BCM module offers flexible thermal management options with very low top- and bottom-side thermal impedances. • High-End Computing Systems • Automated Test Equipment When combined with downstream Vicor DC-DC conversion components and regulators, the BCM allows the Power Design Engineer to employ a simple, low-profile design, which will differentiate the end system without compromising on cost or performance metrics. • Industrial Systems • High-Density Energy Systems • Transportation Size: 3.76 x 1.40 x 0.37in [95.59 x 35.54 x 9.40mm] Part Ordering Information Product Package Function Length BCM 38 Package Width Package Type 14 x BCM = Length Width B = Board VIA Bus in in Converter V = Chassis VIA Inches x 10 Inches x 10 Module [a] [b] High-Side Max Max Max Voltage Product Grade High‑Side Low‑Side Low‑Side Range (Case Temperature) Voltage Voltage Current Ratio 60 E 15 A3 Internal Reference High-temperature current derating may apply; See Figure 1, specified thermal operating area. Positive Logic = Part is default ON, Negative Logic = Part is default OFF BCM® in a VIA™ Package Page 1 of 41 Rev 2.3 07/2020 Option Field y zz C = –20 to 100°C [a] T = –40 to 100°C [a] 02 = Chassis/PMBus/Positive Logic [b] 06 = Short Pin/PMBus/Positive Logic 10 = Long Pin/PMBus/Positive Logic N2 = Chassis/PMBus/Negative Logic [b] N6 = Short Pin/PMBus/Negative Logic NX = Long Pin/PMBus/Negative Logic BCM3814x60E15A3yzz End of Life Typical Applications BCM in a VIA package +HI +LO EXT_BIAS 5V SCL SDA SGND ADDR –HI –LO R1 SCL CLOCK ISOLATION BOUNDARY +HI +LO EXT_BIAS 5V SCL SDA SGND ADDR –HI –LO R2 ISOLATION BOUNDARY Paralleling PMBus BCM in a VIA package – connection to Host PMBus BCM® in a VIA™ Package Page 2 of 41 Rev 2.3 07/2020 GROUND BCM in a VIA package SGND DATA DC L O A D + – SDA Host PMBus® BCM3814x60E15A3yzz End of Life Typical Applications (Cont.) Host PMBus® PMBus + V EXT – SGND SGND BCM in a VIA Package SGND EXT_BIAS SCL SDA SGND } 3 SGND ADDR FUSE V HI C +HI +LO –HI –LO Non-Isolated Point-of-Load Regulators HI HV SOURCE_RTN LOAD LV ISOLATION BOUNDARY BCM3814x60E15A3yzz at point-of-load – connection to Host PMBus Host PMBus® PMBus V + EXT SGND – SGND SGND BCM in a VIA Package EXT_BIAS SCL SDA SGND } 3 SGND ADDR FUSE V HI SOURCE_RTN C +HI +LO –HI –LO LOAD HI HV LV ISOLATION BOUNDARY BCM3814x60E15A3yzz direct to load – connection to Host PMBus BCM® in a VIA™ Package Page 3 of 41 Rev 2.3 07/2020 BCM3814x60E15A3yzz End of Life Pin Configuration 10 1 +HI TOP VIEW 3 12 –LO –LO +LO 5 6 7 8 9 PMBus +LO –LO –LO 2 11 13 4 2 11 13 4 –HI EXT BIAS SCL SDA SGND ADDR BCM3814 in a VIA Package - Chassis (Lug) Mount –HI TOP VIEW –LO –LO +LO 9 8 7 6 5 PMBus +HI –LO –LO 10 12 1 ADDR SGND SDA SCL EXT BIAS +LO 3 BCM3814 in a VIA Package - Board (PCB) Mount Note: The dot on the VIA housing indicates the location of the signal pin 9. Pin Descriptions Pin Number Signal Name Type Function 1 +HI HIGH SIDE POWER High-voltage-side positive power terminal 2 –HI HIGH SIDE POWER RETURN High-voltage-side negative power terminal 3, 4 +LO LOW SIDE POWER 5 EXT BIAS INPUT 5V supply input 6 SCL INPUT I2C™ Clock, PMBus® Compatible 7 SDA INPUT/OUTPUT I2C Data, PMBus Compatible 8 SGND LOW SIDE SIGNAL RETURN Signal Ground 9 ADDR INPUT 10, 11, 12, 13 –LO LOW SIDE POWER RETURN Low-voltage-side positive power terminal Address assignment – Resistor based Low-voltage-side negative power terminal Notes: All signal pins (5, 6, 7, 8, 9) are referenced to the low-voltage side and isolated from the high-voltage side. Keep SGND signal separated from the low-voltage-side power return terminal (–LO) in electrical design. BCM® in a VIA™ Package Page 4 of 41 Rev 2.3 07/2020 End of Life BCM3814x60E15A3yzz Absolute Maximum Ratings The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. Parameter Comments +HI to –HI Min Max Unit –1 80 V 1 V/µs –1 20 V –0.3 10 V 0.15 A HI_DC or LO_DC Slew Rate +LO to –LO EXT BIAS to SGND SCL to SGND –0.3 5.5 V SDA to SGND –0.3 5.5 V ADDR to SGND –0.3 3.6 V Isolation Voltage / Dielectric Withstand Basic insulation (high-voltage side to case) 1500 VDC Basic insulation (high-voltage side to low-voltage side) [c] 1500 VDC N/A VDC Functional insulation (low-voltage side to case) [c] The absolute maximum rating listed above for the dielectric withstand (high-voltage side to the low-voltage side) refers to the VIA package. The internal safety approved isolating component (ChiP) provides basic insulation (2250V) from the high-voltage side to the low-voltage side. However, the VIA package itself can only be tested at a basic insulation value (1500V). BCM® in a VIA™ Package Page 5 of 41 Rev 2.3 07/2020 End of Life BCM3814x60E15A3yzz Electrical Specifications Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); all other specifications are at TCASE = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 60 V 14 V General Powertrain Specification – Forward Direction Operation (High-Voltage Side to Low-Voltage Side) HI-Side Voltage Range (Continuous) VHI_DC HI-Side Voltage Initialization Threshold VµC_ACTIVE HI-Side Quiescent Current IHI_Q 36 HI-side voltage where internal controller is initialized, (powertrain inactive) Disabled, VHI_DC = 54V 5 TCASE ≤ 100ºC 10 VHI_DC = 54V, TCASE = 25ºC No-Load Power Dissipation HI-Side Inrush Current Peak DC HI-Side Current Transformation Ratio LO-Side Current (Continuous) LO-Side Current (Pulsed) Efficiency (Ambient) PHI_NL IHI_INR_PK IHI_IN_DC K ILO_OUT_DC ILO_OUT_PULSE ηAMB 14.7 7.5 VHI_DC = 54V 21.6 35.2 VHI_DC = 36 – 60V, TCASE = 25ºC 25 VHI_DC = 36 – 60V 38 VHI_DC = 60V, CLO_EXT = 1000μF, RLOAD_LO = 20% of full‑load current 40 45 At ILO_OUT_DC = 130A, TCASE ≤ 90ºC 33 1/4 TCASE ≤ 90ºC 130 A 10ms pulse, 25% duty cycle, ILO_OUT_AVG ≤ 50% rated ILO_OUT_DC 143 A VHI_DC = 54V, ILO_OUT_DC = 130A 96.1 97 VHI_DC = 36 – 60V, ILO_OUT_DC = 130A 95.1 VHI_DC = 54V, ILO_OUT_DC = 65A 96.3 97.3 95.6 96.2 % ηHOT VHI_DC = 54V, ILO_OUT_DC = 130A TCASE = 90°C Efficiency (Over Load Range) η20% 26A < ILO_OUT_DC < 130A 94 RLO_COLD VHI_DC = 54V, ILO_OUT_DC = 130A, TCASE = –40°C 1.2 1.9 2.3 RLO_AMB VHI_DC = 54V, ILO_OUT_DC = 130A 1.6 2.4 2.8 RLO_HOT VHI_DC = 54V, ILO_OUT_DC = 130A, TCASE = 90°C 2.2 2.8 3.3 Low side voltage ripple frequency = 2x FSW 0.9 0.95 1.0 Switching Frequency LO-Side Voltage Ripple FSW VLO_OUT_PP CLO_EXT = 0μF, ILO_OUT_DC = 130A, VHI_DC = 54V, 20MHz BW TCASE ≤ 100ºC BCM® in a VIA™ Package Page 6 of 41 A V/V Efficiency (Hot) LO-Side Output Resistance W A TCASE ≤ 100ºC High voltage to low voltage, K = VLO_DC / VHI_DC, at no load mA % % 120 MHz mV 250 Rev 2.3 07/2020 mΩ End of Life BCM3814x60E15A3yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); all other specifications are at TCASE = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit General Powertrain Specification – Forward Direction Operation (High-Voltage Side to Low-Voltage Side), Cont. Effective HI-Side Capacitance (Internal) CHI_INT Effective value at 54VHI_DC 11.2 µF Effective LO-Side Capacitance (Internal) CLO_INT Effective value at 13.5VLO_DC 140 µF Rated LO-Side Capacitance (External) CLO_OUT_EXT Rated LO-Side Capacitance (External), CLO_OUT_AEXT Parallel Array Operation Excessive capacitance may drive module into short circuit protection 1000 µF CLO_OUT_AEXT Max = N • 0.5 • CLO_OUT_EXT MAX, where N = the number of units in parallel Powertrain Hardware Protection Specification – Forward Direction Operation (High-Voltage Side to Low-Voltage Side) • These built-in powertrain protections are fixed in hardware and cannot be configured through PMBus®. • When duplicated in supervisory limits, hardware protections serve a secondary role and become active when supervisory limits are disabled through PMBus. Auto Restart Time tAUTO_RESTART Start up into a persistent fault condition. Non-latching fault detection given VHI_DC > VHI_UVLO+ 490 560 ms HI-Side Overvoltage Lockout Threshold VHI_OVLO+ 63 67 71 V HI-Side Overvoltage Recovery Threshold VHI_OVLO– 61 65 69 V HI-Side Overvoltage Lockout Hysteresis VHI_OVLO_HYST 2 V HI-Side Overvoltage Lockout Response Time tHI_OVLO 100 µs HI-Side Soft-Start Time tHI_SOFT-START 1 ms LO-Side Overcurrent Trip Threshold ILO_OUT_OCP LO-Side Overcurrent Response Time Constant tLO_OUT_OCP LO-Side Short Circuit Protection Trip Threshold ILO_OUT_SCP LO-Side Short Circuit Protection Response Time tLO­­_OUT_SCP Overtemperature Shutdown Threshold BCM® in a VIA™ Package Page 7 of 41 tOTP+ From powertrain active. Fast current limit protection disabled during soft start 143 Effective internal RC filter 180 3 195 125 Rev 2.3 07/2020 A ms A 1 Internal 225 µs °C End of Life BCM3814x60E15A3yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); all other specifications are at TCASE = 25ºC unless otherwise noted. ­Attribute Symbol Conditions / Notes Min Typ Max Unit Powertrain Supervisory Limits Specification – Forward Direction Operation (High-Voltage Side to Low-Voltage Side) • These supervisory limits are set in the internal controller and can be reconfigured or disabled through PMBus®. • When disabled, the powertrain protections presented in the previous table will intervene during fault events. HI-Side Overvoltage Lockout Threshold VHI_OVLO+ 64 66 68 V HI-Side Overvoltage Recovery Threshold VHI_OVLO– 60 64 66 V HI-Side Overvoltage Lockout Hysteresis VHI_OVLO_HYST 2 V HI-Side Overvoltage Lockout Response Time tHI_OVLO 100 µs HI-Side Undervoltage Lockout Threshold VHI_UVLO– 26 28 30 V HI-Side Undervoltage Recovery Threshold VHI_UVLO+ 28 30 32 V HI-Side Undervoltage Lockout Hysteresis VHI_UVLO_HYST 2 V tHI_UVLO 100 µs 20 ms HI-Side Undervoltage Lockout Response Time HI-Side Undervoltage Start-Up Delay tHI_UVLO+_DELAY LO-Side Overcurrent Trip Threshold ILO_OUT_OCP LO-Side Overcurrent Response Time Constant tLO_OUT_OCP From VHI_DC = VHI_UVLO+ to powertrain active (i.e., one-time start-up delay from application of VHI_DC to VLO_DC) 167 Effective internal RC filter tOTP+ Internal 125 Overtemperature Recovery Threshold tOTP– Internal 105 Undertemperature Shutdown Threshold (Internal) tUTP BCM® in a VIA™ Package Page 8 of 41 tUTP_RESTART 185 3 Overtemperature Shutdown Threshold Undertemperature Restart Time 176 ms °C 110 115 C-Grade –25 T-Grade –45 Start up into a persistent fault condition. Non-latching fault detection given VHI_DC > VHI_UVLO+ Rev 2.3 07/2020 A 3 °C °C s BCM3814x60E15A3yzz End of Life Operating Area LO-Side Current (A) 160 140 120 100 80 60 40 20 0 –60 –40 –20 0 20 40 60 80 100 120 Case Temperature (°C) 36 – 60V Figure 1 — Specified thermal operating area 2200 2000 1800 1600 1400 1200 1000 800 600 400 200 0 200 180 LO-Side Current (A) LO-Side Power (W) 1. The BCM in a VIA package is cooled through the non-pin-side case. 2. The thermal rating is based on typical measured device efficiency. 3. The case temperature in the graph is the measured temperature of the non-pin-side housing, such that the internal operating temperature does not exceed 125°C. 160 140 120 100 80 60 40 20 36 38 40 42 44 46 48 50 52 54 56 58 0 60 36 38 40 HI-Side Voltage (V) PLO_OUT_DC 42 44 46 ILO_OUT_DC PLO_OUT_PULSE LO-Side Capacitance (% Rated CLO_EXT_MAX) Figure 2 — Specified electrical operating area using rated RLO_HOT 110 100 90 80 70 60 50 40 30 20 10 0 0 20 40 60 LO-Side Current (% ILO_DC) Figure 3 — Specified HI-side start up into load current and external capacitance BCM® in a VIA™ Package Page 9 of 41 48 50 52 54 HI-Side Voltage (V) Rev 2.3 07/2020 80 100 ILO_OUT_PULSE 56 58 60 BCM3814x60E15A3yzz End of Life PMBus® Reported Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); all other specifications are at TCASE = 25ºC unless otherwise noted. Monitored Telemetry • The current telemetry is only available in forward operation. The input and output current reported value is not supported in reverse operation. PMBus Read Command Accuracy (Rated Range) Functional Reporting Range Update Rate Reported Units HI-Side Voltage (88h) READ_VIN ±5% (LL – HL) 28 to 66V 100µs VACTUAL = VREPORTED x 10–1 HI-Side Current (89h) READ_IIN ±20% (10 – 20% of FL) ±5% (20 – 133% of FL) –1 to 44A 100µs IACTUAL = IREPORTED x 10–2 LO-Side Voltage [d] (8Bh) READ_VOUT ±5% (LL – HL) 7.0 to 16.55V 100µs VACTUAL = VREPORTED x 10–1 LO-Side Current (8Ch) READ_IOUT ±20% (10 – 20% of FL) ±5% (20 – 133% of FL) –4 to 176A 100µs IACTUAL = IREPORTED x 10–2 LO-Side Resistance (D4h) READ_ROUT ±5% (50 – 100% of FL) at NL ±10% (50 – 100% of FL) (LL – HL) 500 to 3000µΩ 100ms RACTUAL = RREPORTED x 10–5 (8Dh) READ_TEMPERATURE_1 ±7°C (Full Range) –55 to 130ºC 100ms TACTUAL = TREPORTED Attribute Temperature [e] [d] [e] Default READ LO-Side Voltage returned when unit is disabled = –300V. Default READ Temperature returned when unit is disabled = –273°C. Variable Parameters • Factory setting of all Thresholds and Warning limits listed below are 100% of specified protection values. • Variables can be written only when module is disabled with VHI < VHI_UVLO– and external bias (VDDB) applied. • Module must remain in a disabled mode for 3ms after any changes to the variables below to allow sufficient time to commit changes to EEPROM. Attribute PMBus Command Conditions / Notes VHI_OVLO– is automatically 3% lower than this set point Accuracy (Rated Range) Functional Reporting Range Default Value ±5% (LL – HL) 28 – 66V 100% ±5% (LL – HL) 28 – 66V 100% ±5% (LL – HL) 14 – 36V 100% HI-Side Overvoltage Protection Limit (55h) VIN_OV_FAULT_LIMIT HI-Side Overvoltage Warning Limit (57h) VIN_OV_WARN_LIMIT HI-Side Undervoltage Protection Limit (D7h) DISABLE_FAULTS HI-Side Overcurrent Protection Limit (5Bh) IIN_OC_FAULT_LIMIT ±20% (10 – 20% of FL) ±5% (20 – 133% of FL) 0 – 44A 100% HI-Side Overcurrent Warning Limit (5Dh) IIN_OC_WARN_LIMIT ±20% (10 – 20% of FL) ±5% (20 – 133% of FL) 0 – 44A 100% Can only be disabled to a preset default value Overtemperature Protection Limit (4Fh) OT_FAULT_LIMIT Internal temperature ±7°C (Full Range) 0 – 125°C 100% Overtemperature Warning Limit (51h) OT_WARN_LIMIT Internal temperature ±7°C (Full Range) 0 – 125°C 100% ±50µs 0 – 100ms 0ms Turn On Delay (60h) TON_DELAY Additional time delay to the undervoltage start-up delay BCM® in a VIA™ Package Rev 2.3 Page 10 of 41 07/2020 BCM3814x60E15A3yzz End of Life Signal Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); all other specifications are at TCASE = 25ºC unless otherwise noted. Please note: For chassis mount model, Vicor part number 42550 will be needed for applications requiring the use of the signal pins. Signal cable 42550 is rated up to five insertions and extractions. To avoid unnecessary stress on the connector, the cable should be appropriately strain relieved. EXT. BIAS (VDDB) Pin • VDDB powers the internal controller. • VDDB needs to be applied to enable and disable the BCM through PMBus® control (using OPERATION COMMAND), and to adjust warning and protection thresholds. • VDDB voltage not required for telemetry; however, if VDDB is not applied, telemetry information will be lost when VIN is removed. Signal Type State Regular Operation INPUT Start Up Attribute Symbol VDDB Voltage VVDDB VDDB Current Consumption IVDDB Conditions / Notes Min Typ Max Unit 4.5 5 9 V 50 mA Inrush Current Peak IVDDB_INR VVDDB slew rate = 1V/µs 3.5 A Turn On Time tVDDB_ON From VVDDB_MIN to PMBus active 1.5 ms SGND Pin • All PMBus interface signals (SCL, SDA, ADDR) are referenced to SGND pin. • SGND pin also serves as return pin (ground pin) for VDDB. • Keep SGND signal separated from the low-voltage-side power return terminal (–LO) in electrical design. Address (ADDR) Pin • This pin programs the address using a resistor between ADDR pin and signal ground. • The address is sampled during start up and is stored until power is reset. This pin programs only a Fixed and Persistent address. • This pin has an internal 10kΩ pull-up resistor to 3.3V. • 16 addresses are available. The range of each address is 206.25mV (total range for all 16 addresses is 0V to 3.3V). Signal Type MULTI–LEVEL INPUT State Regular Operation Start Up Attribute Symbol Conditions / Notes ADDR Input Voltage VSADDR See address section ADDR Leakage Current ISADDR Leakage current ADDR Registration Time tSADDR From VVDDB_MIN BCM® in a VIA™ Package Rev 2.3 Page 11 of 41 07/2020 Min Typ 0 1 Max Unit 3.3 V 1 µA ms BCM3814x60E15A3yzz End of Life Serial Clock input (SCL) AND Serial Data (SDA) Pins • High power SMBus specification and SMBus physical layer compatible. Note that optional SMBALERT# is not supported. • PMBus® command compatible. Signal Type State Attribute Symbol Conditions / Notes Min Typ Max Unit Electrical Parameters 2.1 VIH Input Voltage Threshold VIL VOL Leakage Current ILEAK_PIN Signal Sink Current ILOAD Unpowered device VOL = 0.4V CI Signal Noise Immunity VNOISE_PP V 0.4 V 10 µA V 4 Total capacitive load of one device pin Signal Capacitive Load 0.8 3 VOH Output Voltage Threshold V mA 10 10MHz to 100MHz 300 Idle state = 0Hz 10 pF mV Timing Parameters DIGITAL INPUT/OUTPUT Regular Operation Operating Frequency FSMB Free Time Between Stop and Start Condition tBUF Hold Time After Start or Repeated Start Condition tHD:STA Repeat Start Condition Setup Time µs 0.6 µs tSU:STA 0.6 µs Stop Condition Setup Time tSU:STO 0.6 µs Data Hold Time tHD:DAT 300 ns Data Setup Time tSU:DAT 100 ns Clock Low Time Out tTIMEOUT 25 Clock Low Period tLOW 1.3 Clock High Period tHIGH 0.6 First clock is generated after this hold time 35 ms µs 50 µs 25 ms Cumulative Clock Low Extend Time tLOW:SEXT Clock or Data Fall Time tF 20 300 ns Clock or Data Rise Time tR 20 300 ns tLOW tR tF VIH VIL tHD,STA SDA P kHz 1.3 SCL VIH VIL 400 tBUF tHD,DAT tHIGH tSU,DAT S BCM® in a VIA™ Package Rev 2.3 Page 12 of 41 07/2020 tSU,STA tSU,STO S P BCM® in a VIA™ Package Rev 2.3 Page 13 of 41 07/2020 OUTPUT INPUT +VLO +VHI VµC_ACTIVE VHI_OVLO+ VNOM STARTUP tHI_UVLO+_DELAY VHI_UVLO+ OVERVOLTAGE VHI_UVLO- VHI_OVLO- E GE IZ AL N TA I L T N I O VO IN N O ER RN ER TUR V U L O T E RO DE DE ID NT SI SI S I I O C LO H H A OPERATION COMMAND CONTROL M F ON T OR SH D AN OF OVERCURRENT tAUTO_RESTART > tHI_UVLO+_DELAY tLO_OUT_SCP M M C O CO N N O RE T I ATIO E A D SI E R ER HI O P OP RT A ST M ND H T E ID IS TU RN SHUTDOWN T UI RC I C EN EV OF F End of Life BCM3814x60E15A3yzz Timing Diagram (Forward Direction) BCM3814x60E15A3yzz End of Life Application Characteristics Temperature controlled via pin-side side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the forward direction (high-voltage side to low-voltage side). See associated figures for general trend data. 30 98.0 Full-Load Efficiency (%) Power Dissipation (W) 27 24 21 18 15 12 9 6 3 0 36 38 40 42 44 46 48 50 52 54 56 58 97.0 96.0 95.0 94.0 –40 60 –20 0 HI-Side Voltage (V) T CASE: –40°C 25°C VHI_DC: 85°C Figure 4 — No-load power dissipation vs. VHI_DC 90 Power Dissipation (W) 100 97 Efficiency (%) 95 93 91 89 87 85 83 81 79 13 26 39 52 65 78 91 36V 54V 104 117 80 100 36V 54V 60V 70 60 50 40 30 20 10 0 130 0 13 26 39 52 65 78 91 104 117 130 117 130 LO-Side Current (A) 60V VHI_DC: Figure 6 — Efficiency at TCASE = –40°C 36V 54V 60V Figure 7 — Power dissipation at TCASE = –40°C 100 97 90 Power Dissipation (W) 99 95 Efficiency (%) 60 80 LO-Side Current (A) VHI_DC: 40 Figure 5 — Full-load efficiency vs. temperature 99 0 20 Case Temperature (ºC) 93 91 89 87 85 83 81 79 80 70 60 50 40 30 20 10 0 0 13 26 39 52 65 78 91 104 117 130 0 13 26 LO-Side Current (A) VHI_DC: 36V Figure 8 — Efficiency at TCASE = 25°C 54V 39 52 65 78 91 104 LO-Side Current (A) 60V VHI_DC: 36V 54V Figure 9 — Power dissipation at TCASE = 25°C BCM® in a VIA™ Package Rev 2.3 Page 14 of 41 07/2020 60V BCM3814x60E15A3yzz End of Life Application Characteristics (Cont.) Temperature controlled via pin-side side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the forward direction (high-voltage side to low-voltage side). See associated figures for general trend data. 100 97 90 Power Dissipation (W) 99 Efficiency (%) 95 93 91 89 87 85 83 81 79 80 70 60 50 40 30 20 10 0 0 13 26 39 52 65 78 91 104 117 0 130 13 26 LO-Side Current (A) VHI_DC: 36V 60V VHI_DC: 65 78 91 104 117 130 36V 54V 60V Figure 11 — Power dissipation at TCASE = 85°C 4.0 300 3.5 270 LO-Side Voltage Ripple (mV) LO-Side Output Resistance (mΩ) 52 LO-Side Current (A) 54V Figure 10 — Efficiency at TCASE = 85°C 3.0 2.5 2.0 1.5 1.0 0.5 0.0 –40 39 240 210 180 150 120 90 60 30 –20 0 20 40 60 80 0 100 ILO_DC: 13 26 39 52 VHI_DC: 130A Figure 12 — RLO vs. temperature; nominal VHI_DC ILO_DC = 130A at TCASE = 85°C 0 65 78 91 104 117 LO-Side Current (A) Case Temperature (°C) 54V Figure 13 — VLO_OUT_PP vs. ILO_DC ; no external CLO_OUT_EXT. Board‑mounted module, scope setting: 20MHz analog BW BCM® in a VIA™ Package Rev 2.3 Page 15 of 41 07/2020 130 End of Life BCM3814x60E15A3yzz Application Characteristics (Cont.) Temperature controlled via pin-side side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the forward direction (high-voltage side to low-voltage side). See associated figures for general trend data. Figure 14 — Full-load LO-side voltage ripple, 300µF CHI_IN_EXT; no external CLO_OUT_EXT. Board-mounted module, scope setting: 20MHz analog BW Figure 15 — 0 – 130A transient response: CHI_IN_EXT = 300µF, no external CLO_OUT_EXT Figure 16 — 130 – 0A transient response: CHI_IN_EXT = 300µF, no external CLO_OUT_EXT Figure 17 — Start up from application of VHI_DC = 54V, 20% ILO_DC 100% CLO_OUT_EXT Figure 18 — Start up from application of OPERATION COMMAND with pre-applied VHI_DC = 54V, 20% ILO_DC, 100% CLO_OUT_EXT BCM® in a VIA™ Package Rev 2.3 Page 16 of 41 07/2020 BCM3814x60E15A3yzz End of Life General Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Mechanical Length L Lug (Chassis) Mount 95.34 [3.75] 95.59 [3.76] 95.84 [3.77] mm [in] Length L PCB (Board) Mount 97.55 [3.84] 97.80 [3.85] 98.05 [3.86] mm [in] Width W 35.29 [1.39] 35.54 [1.40] 35.79 [1.41] mm [in] Height H 9.019 [0.355] 9.40 [0.37] 9.781 [0.385] mm [in] Volume Vol Weight W Without heatsink Pin Material C145 copper Underplate Low-stress ductile Nickel Pin Finish (Gold) Pin Finish (Tin) 31.93 [1.95] cm3 [in3] 130.4 [4.6] g [oz] 50 100 Palladium 0.8 6 Soft Gold 0.12 2 Whisker-resistant matte Tin 200 400 BCM3814x60E15A3yzz (T-Grade) –40 125 BCM3814x60E15A3yzz (C-Grade) –20 125 BCM3814x60E15A3yzz (T-Grade), derating applied, see safe thermal operating area –40 100 –20 100 µin µin µin Thermal Operating Internal Temperature Operating Case Temperature TINT TCASE Thermal Resistance Pin Side θINT_PIN_SIDE Thermal Resistance Housing θHOU Thermal Resistance Non-Pin Side θINT_NON_PIN_ SIDE BCM3814x60E15A3yzz (C-Grade), derating applied, see safe thermal operating area Estimated thermal resistance to maximum temperature internal component from isothermal pin/ terminal-side housing Estimated thermal resistance of thermal coupling between the pin-side and non‑pin‑side case surfaces Estimated thermal resistance to maximum temperature internal component from isothermal non-pin/ non-terminal housing Thermal Capacity °C 0.97 °C/W 0.58 °C/W 0.59 °C/W 52 Ws/°C Assembly Storage Temperature TST BCM3814x60E15A3yzz (T-Grade) –40 125 °C BCM3814x60E15A3yzz (C-Grade) –40 125 °C ESDHBM Human Body Model, “ESDA / JEDEC JDS-001-2012” Class I-C (1kV to < 2kV) 1000 ESDCDM Charge Device Model, “JESD 22-C101-E” Class II (200V to < 500V) 200 ESD Withstand BCM® in a VIA™ Package Rev 2.3 Page 17 of 41 07/2020 BCM3814x60E15A3yzz End of Life General Characteristics (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); All other specifications are at TCASE = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 780 940 pF Safety Isolation Capacitance CHI_LO Unpowered unit 620 Isolation Resistance RHI_LO At 500VDC 10 MTBF MΩ MIL-HDBK-217Plus Parts Count - 25°C Ground Benign, Stationary, Indoors / Computer 2.2 MHrs Telcordia Issue 2 - Method I Case III; 25°C Ground Benign, Controlled 3.6 MHrs cTÜVus EN 60950-1 Agency Approvals / Standards cURus UL60950-1 CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable BCM® in a VIA™ Package Rev 2.3 Page 18 of 41 07/2020 BCM3814x60E15A3yzz End of Life BCM in a VIA Package ILO IHI RLO + + K • ILO VHI + IHI_Q – V•I K + K • VHI VLO – – – Figure 19 — BCM DC model (Forward Direction) The BCM uses a high frequency resonant tank to move energy from the high-voltage side to the low-voltage side and vice versa. The resonant LC tank, operated at high frequency, is amplitude modulated as a function of the HI-side voltage and the LO-side current. A small amount of capacitance embedded in the high‑voltage‑side and low-voltage-side stages of the module is sufficient for full functionality and is key to achieving high power density. The effective DC voltage transformer action provides additional interesting attributes. Assuming that RLO = 0Ω and IHI_Q = 0A, Equation 3 now becomes Equation 1 and is essentially load independent, resistor R is now placed in series with VHI. R R The BCM3814x60E15A3yzz can be simplified into the model shown in Figure 19. Vin VHI + – BCM SAC 1/4 KK==1/32 V Vout LO At no load: VLO = VHI • K (1) Figure 20 — K = 1/4 BCM with series HI-side resistor K represents the “turns ratio” of the BCM. Rearranging Equation 1: K = VLO The relationship between VHI and VLO becomes: In the presence of a load, VLO is represented by: VLO = VHI • K – ILO • RLO (3) and ILO is represented by: ILO = VLO = (VHI – IHI • R) • K (2) VHI IHI – IHI_Q K (4) RLO represents the impedance of the BCM and is a function of the RDS_ON of the HI-side and LO-side MOSFETs, PC board resistance of HI-side and LO-side boards and the winding resistance of the power transformer. IHI_Q represents the HI-side quiescent current of the BCM controller, gate drive circuitry and core losses. (5) Substituting the simplified version of Equation 4 (IHI_Q is assumed = 0A) into Equation 5 yields: VLO = VHI • K – ILO • R • K 2 (6) This is similar in form to Equation 3, where RLO is used to represent the characteristic impedance of the BCM. However, in this case a real resistor, R, on the high-voltage side of the BCM is effectively scaled by K 2 with respect to the low-voltage side. Assuming that R = 1Ω, the effective R as seen from the low-voltage side is 62.5mΩ, with K = 1/4. BCM® in a VIA™ Package Rev 2.3 Page 19 of 41 07/2020 BCM3814x60E15A3yzz End of Life A similar exercise can be performed with the addition of a capacitor or shunt impedance at the high-voltage side of the BCM. A switch in series with VHI is added to the circuit. This is depicted in Figure 21. S VVin HI + – BCM SAC 1/4 KK==1/32 C VVout LO Low impedance is a key requirement for powering a high‑current, low-voltage load efficiently. A switching regulation stage should have minimal impedance while simultaneously providing appropriate filtering for any switched current. The use of a BCM between the regulation stage and the point-of-load provides a dual benefit of scaling down series impedance leading back to the source and scaling up shunt capacitance or energy storage as a function of its K factor squared. However, these benefits are not achieved if the series impedance of the BCM is too high. The impedance of the BCM must be low, i.e., well beyond the crossover frequency of the system. A solution for keeping the impedance of the BCM low involves switching at a high frequency. This enables the use of small magnetic components because magnetizing currents remain low. Small magnetics mean small path lengths for turns. Use of low loss core material at high frequencies also reduces core losses. Figure 21 — BCM with HI-side capacitor The two main terms of power loss in the BCM module are: A change in VHI with the switch closed would result in a change in capacitor current according to the following equation: dVHI IC (t) = C (7) dt K PLO_OUT = PHI_IN – PDISSIPATED = PHI_IN – PHI_NL – PRLO (8) C 2 • dVLO dt (10) Therefore, (11) The above relations can be combined to calculate the overall module efficiency: substituting Equation 1 and 8 into Equation 7 reveals: ILO(t) = n Resistive loss (PR ): refers to the power loss across the BCM LO module modeled as pure resistive impedance. PDISSIPATED = PHI_NL + PRLO Assume that with the capacitor charged to VHI, the switch is opened and the capacitor is discharged through the idealized BCM. In this case, IC = ILO • K n No-load power dissipation (PHI_NL): defined as the power used to power up the module with an enabled powertrain at no load. (9) η= The equation in terms of the LO side has yielded a K 2 scaling factor for C, specified in the denominator of the equation. A K factor less than unity results in an effectively larger capacitance on the low-voltage side when expressed in terms of the high‑voltage side. With a K = 1/4 as shown in Figure 21, C = 1µF would appear as C = 16µF when viewed from the low-voltage side. = PLO_OUT PHI_IN PHI_IN – PHI_NL – PRLO PHI_IN VHI • IHI – PHI_NL – (ILO)2 • RLO = 1 – BCM® in a VIA™ Package Rev 2.3 Page 20 of 41 07/2020 = VHI • IHI ( ) PHI_NL + (ILO)2 • RLO VHI • IHI (12) BCM3814x60E15A3yzz End of Life Filter Design Thermal Considerations A major advantage of BCM systems versus conventional PWM converters is that the transformer based BCM does not require external filtering to function properly. The resonant LC tank, operated at extreme high frequency, is amplitude modulated as a function of HI-side voltage and LO-side current and efficiently transfers charge through the isolation transformer. A small amount of capacitance embedded in the high-voltage-side and low‑voltage-side stages of the module is sufficient for full functionality and is key to achieving power density. The VIA package provides effective conduction cooling from either of the two module surfaces. Heat may be removed from the pin‑side surface, the non-pin-side surface or both. The extent to which these two surfaces are cooled is a key component for determining the maximum power that can be processed by a BCM, as can be seen from the specified thermal operating area in Figure 1. Since the BCM has a maximum internal temperature rating, it is necessary to estimate this temperature based on a system‑level thermal solution. For this purpose, it is helpful to simplify the thermal solution into a roughly equivalent circuit where power dissipation is modeled as a current source, isothermal surface temperatures are represented as voltage sources and the thermal resistances are represented as resistors. Figure 22 shows the “thermal circuit” for the BCM in a VIA package. This paradigm shift requires system design to carefully evaluate external filters in order to: n Guarantee low source impedance: To take full advantage of the BCM module’s dynamic response, the impedance presented to its HI-side terminals must be low from DC to approximately 5MHz. The connection of the bus converter module to its power source should be implemented with minimal distribution inductance. If the interconnect inductance exceeds 100nH, the HI-side should be bypassed with a RC damper to retain low source impedance and stable operation. With an interconnect inductance of 200nH, the RC damper may be as high as 1µF in series with 0.3Ω. A single electrolytic or equivalent low-Q capacitor may be used in place of the series RC bypass. – θHOU θINT_NON_ PDISS n Further reduce HI-side and/or LO-side voltage ripple Given the wide bandwidth of the module, the source response is generally the limiting factor in the overall system response. Anomalies in the response of the source will appear at the LO side of the module multiplied by its K factor. n Protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and induce stresses: The module high side/low side voltage ranges shall not be exceeded. An internal overvoltage lockout function prevents operation outside of the normal operating HI-side range. Even when disabled, the powertrain is exposed to the applied voltage and the power MOSFETs must withstand it. Total load capacitance at the LO side of the BCM module shall not exceed the specified maximum. Owing to the wide bandwidth and small LO-side impedance of the module, low-frequency bypass capacitance and significant energy storage may be more densely and efficiently provided by adding capacitance at the HI side of the module. At frequencies PP@ 127(6 3.957 [100.517] 3.368 [85.554] 3.368 [85.554] End of Life BCM3814x60E15A3yzz BCM in VIA Package PCB (Board) Mount Package Mechanical Drawing BCM® in a VIA™ Package Rev 2.3 Page 39 of 41 07/2020 1.61 [40.93] 4414 BCM –OUT RETURN TO CASE 6HH3LQ&RQILJXUDWLRQDQG3LQ'HVFULSWLRQVHFWLRQVIRUSLQGHVLJQDWLRQV DIM 'B' 12 13 1.277 [32.430] 1.277 [32.430] 1.277 [32.430] RECOMMENED HOLE PATTERN 10 11 1.02 [25.96] 3814 BCM –OUT RETURN TO CASE 8QOHVVRWKHUZLVHVSHFLILHGGLPHQVLRQVDUH,QFK>PP@ 127(6 1 2 DIM 'A' 1.02 [25.96] PRODUCT 3814 NBM –OUT RETURN TO CASE DIM 'C' 9 5 6 7 8 DIM 'D' 3.368 [85.554] 3.368 [85.554] 3 4 3.957 [100.517] DETAIL A 4.35 [110.55] 3.76 [95.59] 3.76 [95.59] DIM 'E' 4.44 [112.76] 3.85 [97.80] 3.85 [97.80] DIM 'F' DIM 'G' 4.221 [107.206] 3.632 [92.243] 3.632 [92.243] SEE DETAIL 'A' 1.439 [36.554] .850 [21.590] .850 [21.590] End of Life BCM3814x60E15A3yzz BCM in VIA Package PCB (Board) Mount Package Recommended Hole Pattern End of Life BCM3814x60E15A3yzz Revision History Revision Date Description 1.0 03/03/16 Initial release n/a 1.1 05/02/16 New Power Pin Nomenclature All 1.2 06/17/16 Notes update 1.3 08/01/16 Charts format update 1.4 09/26/16 Value of R correction for READ_BCM_ROUT 1.5 12/13/16 Content improvements Pin Finish update PMBus® Supported Commands update 1.6 02/08/17 Part Ordering Information Update 1.7 03/23/17 Package drawings update 1.8 06/30/17 Update efficiency specifications 1.9 01/24/18 Updated monitored telemetry technical information and specs Updated mechanical drawings 2.0 02/06/18 Updated agency approvals 2.1 08/17/18 Updated mechanical drawings 38 – 39 2.2 09/24/18 Correction to READ_IIN R value 24 2.3 07/13/20 Updated terminology BCM® in a VIA™ Package Rev 2.3 Page 40 of 41 07/2020 Page Number(s) 2, 3, 10 13, 14, 15 23 All 17 26 – 37 1 37 – 39 1, 6 10 37 – 39 1, 18 24, 26, 27, 28, 31 End of Life BCM3814x60E15A3yzz Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. 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Contact Us: http://www.vicorpower.com/contact-us Vicor Corporation 25 Frontage Road Andover, MA, USA 01810 Tel: 800-735-6200 Fax: 978-475-6715 www.vicorpower.com email Customer Service: custserv@vicorpower.com Technical Support: apps@vicorpower.com ©2018 – 2020 Vicor Corporation. All rights reserved. The Vicor name is a registered trademark of Vicor Corporation. The PMBus® name, SMIF, Inc. and logo are trademarks of SMIF, Inc. I2C™ is a trademark of NXP Semiconductor All other trademarks, product names, logos and brands are property of their respective owners. BCM® in a VIA™ Package Rev 2.3 Page 41 of 41 07/2020