BCM48BF240M300A00

BCM® Bus Converter BCM48Bx240y300A00 ® S US C C NRTL US Isolated Fixed Ratio DC-DC Converter Features & Benefits Product Ratings • 48VDC – 24.0VDC 300W Bus Converter • High efficiency (>94%) reduces system power consumption (>1022W/in3) • High power density reduces power system footprint by > 40% VIN = 48V (38 – 55V) POUT= up to 300W VOUT = 24V (19.0 – 27.5V) (no load) K = 1/2 Description • Contains built-in protection features: „ Undervoltage „ Overvoltage Lockout „ Overcurrent Protection „ Short circuit Protection „ Overtemperature Protection The VI Chip® bus converter is a high efficiency (>94%) Sine Amplitude Converter™ (SAC™) operating from a 38 to 55VDC primary bus to deliver an isolated, ratiometric output voltage from 19.0 to 27.5VDC. The Sine Amplitude Converter offers a low AC impedance beyond the bandwidth of most downstream regulators; therefore capacitance normally at the load can be located at the input to the Sine Amplitude Converter. Since the transformation ratio of the BCM48Bx240y300A00 is 1/2, the capacitance value can be reduced by a factor of 4x, resulting in savings of board area, materials and total system cost. • Provides enable/disable control, internal temperature monitoring • Can be paralleled to create multi-kW arrays The BCM48BF240y300A00 is provided in a VI Chip package compatible with standard pick-and-place and surface mount assembly processes. The co-molded VI Chip package provides enhanced thermal management due to a large thermal interface area and superior thermal conductivity. The high conversion efficiency of the BCM48Bx240y300A00 increases overall system efficiency and lowers operating costs compared to conventional approaches. Typical Applications • High-End Computing Systems • Automated Test Equipment • High-Density Power Supplies • Communications Systems Part Numbering Product Number BCM48Bx240y300A00 Package Style (x) Product Grade (y) F = J-Lead T = –40 to 125°C T = Through hole M = –55 to 125°C For Storage and Operating Temperatures see General Characteristics Typical Application enable / disable switch SW1 F1 PC TM L O A D BCM® Bus Converter +IN +OUT -IN -OUT VIN BCM® Bus Converter Page 1 of 21 Rev 1.5 01/2021 BCM48Bx240y300A00 Pin Configuration 4 3 2 1 A A +OUT B B C C D D E E –OUT F G H H J J +OUT –OUT +IN K K L L M M N N P P R R TM RSV PC –IN T T Bottom View Pin Descriptions Pin Number Signal Name Type A1-E1, A2-E2 +IN INPUT POWER Positive input power terminal L1-T1, L2-T2 –IN INPUT POWER RETURN Negative input power terminal H1, H2 TM OUTPUT J1, J2 RSV NC K1, K2 PC OUTPUT/INPUT A3-D3, A4-D4, J3-M3, J4-M4 +OUT OUTPUT POWER Positive output power terminal E3-H3, E4-H4, N3-T3, N4-T4 –OUT OUTPUT POWER RETURN Negative output power terminal BCM® Bus Converter Page 2 of 21 Function Temperature monitor, input side referenced signal No connect Enable and disable control, input side referenced signal Rev 1.5 01/2021 BCM48Bx240y300A00 Absolute Maximum Ratings The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. Parameter Comments +IN to –IN VIN Slew Rate Operational Min Max Unit –1 60 V –1 1 V/µs Isolation Voltage, Input to Ouput 2250 V –1 40 V –3 18 A –2 12.5 A PC to –IN –0.3 20 V TM to –IN –0.3 7 V +OUT to –OUT Output Current Transient ≤ 10ms, ≤ 10% DC Output Current Average BCM® Bus Converter Page 3 of 21 Rev 1.5 01/2021 BCM48Bx240y300A00 Electrical Specifications Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); all other specifications are at TCASE = 25°C unless otherwise noted. ­Attribute Symbol Conditions / Notes Min Typ Max Unit 38 55 V 38 55 V 5.0 7.0 mA 650 750 ms 5.9 8.0 Powertrain Input Voltage Range, Continuous Input Voltage Range, Transient Quiescent Current VIN to VOUT Time VIN_DC VIN_TRANS IQ TON1 Full current or power supported, 50ms max, 10% duty cycle max Disabled, PC Low VIN = 48V, PC floating 550 VIN = 48V, TCASE = 25°C No-Load Power Dissipation PNL 3.5 VIN = 48V VIN = 38 – 55V, TCASE = 25°C 9 VIN = 38 – 55V 14 Inrush Current Peak IINR_P Worse case of: VIN = 55V, COUT = 375μF, RLOAD = 1877mΩ DC Input Current IIN_DC At POUT = 300W Transformation Ratio K Output Power (Average) POUT_AVG Output Power (Peak) POUT_PK Output Current (Average) IOUT_AVG Output Current (Peak) IOUT_PK Efficiency (Ambient) ηAMB 12.0 13.5 K = VOUT / VIN, at no load 20 A 8.0 A 1/2 10ms max, POUT_AVG ≤ 300W 10ms max, IOUT_AVG ≤ 12.5A VIN = 48V, IOUT = 12.5A; TCASE = 25°C 94.5 VIN = 38 – 55V, IOUT = 12.5A; TCASE = 25°C 92.7 VIN = 48V, IOUT = 6.25A; TCASE = 25°C 93.3 95.0 95.2 W V/V 300 W 450 W 12.5 A 18 A 95.5 % Efficiency (Hot) ηHOT VIN = 48V, IOUT = 12.5A; TCASE = 100°C 94.1 Efficiency (Over Load Range) η20% 3A < IOUT < 12.5A 81.0 ROUT_COLD IOUT = 12.5A, TCASE = –40°C 20.0 32.8 46.0 ROUT_AMB IOUT = 12.5A, TCASE = 25°C 32.0 43.4 55.0 ROUT_HOT IOUT = 12.5A, TCASE = 100°C 38.0 50.7 64.0 1.68 1.77 1.86 MHz 400 mV Output Resistance Switching Frequency FSW % % mΩ Output Voltage Ripple VOUT_PP COUT = 0F, IOUT = 12.5A, VIN = 48V, 20MHz BW 200 Output Inductance (Parasitic) LOUT_PAR Frequency up to 30MHz, Simulated J-lead model 600 pH Output Capacitance (Internal) COUT_INT Effective value at 24.0VOUT 12 µF Output Capacitance (External) COUT_EXT BCM® Bus Converter Page 4 of 21 0 Rev 1.5 01/2021 375 µF BCM48Bx240y300A00 Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); all other specifications are at TCASE = 25°C unless otherwise noted. ­Attribute Symbol Conditions / Notes Min Typ Max Unit Protection Input Overvoltage Lockout Threshold VIN_OVLO+ 55.1 58.7 60 V Input Overvoltage Recovery Threshold VIN_OVLO– 55.1 57.2 60 V Input Overvoltage Lockout Hysteresis VIN_OVLO_HYST 1.2 V tOVLO 8 µs Overvoltage Lockout Response Time Fault Recovery Time tAUTO_RESTART 240 300 380 ms Input Undervoltage Lockout Threshold VIN_UVLO– 28.5 31.3 37.4 V Input Undervoltage Recovery Threshold VIN_UVLO+ 28.5 34.6 37.4 V Input Undervoltage Lockout Hysteresis VIN_UVLO_HYST 1.6 V Undervoltage Lockout Response Time tUVLO 8 µs Output Overcurrent Trip Threshold IOCP Output Overcurrent Response Time Constant tOCP Short Circuit Protection Trip Threshold ISCP Short Circuit Protection Response Time tSCP Effective internal RC filter 25 35 A 5.3 ms 35 A 1 µs 125 TJ_OTP °C 550 20 500 18 450 16 400 14 350 12 300 10 250 8 200 6 150 4 100 2 50 0 18.0 20.0 22.0 24.0 26.0 Output Voltage (V) P (ave) P (pk), < 10ms Figure 1 — Safe operating area BCM® Bus Converter Page 5 of 21 Rev 1.5 01/2021 I (ave) I (pk), < 10ms 28.0 Output Current (A) Output Power (W) Thermal Shut-Down Threshold 15 BCM48Bx240y300A00 Signal Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); all other specifications are at TCASE = 25°C unless otherwise noted. Primary Control: PC • The PC pin enables and disables the BCM. When held low, the BCM is disabled. • In an array of BCM modules, PC pins should be interconnected to synchronize start up and permit start up into full load conditions. • PC pin outputs 5V during normal operation. PC pin internal bias level drops to 2.5V during fault mode, provided VIN remains in the valid range. Signal Type State Regular Operation Analog Output Standby Transition Attribute Symbol Typ Max Unit VPC 4.7 5.0 5.3 V IPC_OP 2.0 3.5 5.0 mA PC Source (Current) IPC_EN 50 100 PC Resistance (Internal) RPC_INT 50 150 PC Capacitance (Internal) CPC_INT PC Load Resistance RPC_S Regular Operation PC Enable Threshold VPC_EN PC Disable Threshold VPC_DIS Standby PC Disable Duration tPC_DIS_T Transition Min PC Available Current PC Voltage Start Up Digital Input / Output Conditions / Notes PC Threshold Hysteresis VPC_HYSTER PC Enable To VOUT Time tON2 PC Disable To Standby Time tPC_DIS PC Fault Response Time tFR_PC Internal pull down resistor To permit regular operation µA 400 kΩ 1000 pF 60 2.0 Minimum time before attempting re-enable 1 VIN = 48V for at least TON1 ms 50 kΩ 2.5 3.0 V 1.95 V s 50 From fault to PC = 2V mV 100 150 µs 4 10 µs 100 µs Temperature Monitor: TM • The TM pin monitors the internal temperature of the controller IC within an accuracy of ±5°C. • Can be used as a “Power Good” flag to verify that the BCM module is operating. • Is used to drive the internal comparator for overtemperature shut down. Signal Type State Attribute TM Voltage Range Analog Output Digital Input / Output Regular Operation Transition Standby Symbol Conditions / Notes VTM_AMB TM Available Current ITM TM Gain ATM TM Voltage Ripple VTM_PP TM Capacitance (External) CTM_EXT TM Fault Response Time tFR_TM TM Voltage VTM_DIS TM Pull Down (Internal) RTM_INT TJ controller = 27°C 3.00 Unit 4.04 V 3.05 V 100 µA mV/°C 200 mV 50 pF CTM = 0pF, VIN = 48V, IOUT = 12.5A 120 From fault to TM = 1.5V 10 µs 0 V Internal pull down resistor Reserved for factory use. No connection should be made to this pin. Rev 1.5 01/2021 2.95 Max 10 Reserved: RSV BCM® Bus Converter Page 6 of 21 Typ 2.12 VTM TM Voltage Reference Min 25 40 50 kΩ BCM® Bus Converter Page 7 of 21 NL 5V 2.5 V 5V 3V PC VUVLO+ VUVLO– Rev 1.5 01/2021 1 A E: tON2 F: tOCP G: tPC–DIS H: tSCP** B D 1: Controller start 2: Controller turn off 3: PC release C *Min value switching off **From detection of error to power train shut down A: tON1 B: tOVLO* C: tAUTO_RESTART D: tUVLO 0.4V 3V @ 27°C TM LL • K VOUT C 500mS before retrial 3V VIN VOVLO+ VOVLO– 2 F 4: PC pulled low 5: PC released on output SC 6: SC removed IOCP ISSP IOUT E 3 G 4 Notes: H 5 – Timing and signal amplitudes are not to scale – Error pulse width is load dependent 6 BCM48Bx240y300A00 Timing Diagram BCM48Bx240y300A00 Application Characteristics The following values, typical of an application environment, are collected at TCASE = 25°C unless otherwise noted. See associated figures for general trend data. 98 Full Load Efficiency (%) Power Dissipation (W) 13 11 9 7 5 3 94 1 38 40 42 44 46 47 49 51 Input Voltage (V) -40°C TCASE: 25°C 53 55 -40 100°C 32 Power Dissipation (W) 36 94 Efficiency (%) 91 88 85 82 79 76 73 0 2 4 6 Load Current (A) 38V VIN: 8 10 48V 12 Power Dissipation (W) 82 79 76 73 BCM® Bus Converter Page 8 of 21 0 2 4 6 8 Load Current (A) 38V 10 48V 12 14 55V Figure 5 — Power dissipation at TCASE = –40°C 85 8 Load Current (A) Figure 6 — Efficiency at TCASE = 25°C 14 4 VIN: 88 38V 12 55V 8 24 VIN: 48V 100 12 55V 91 6 38V 80 16 27 4 60 20 94 2 40 24 97 0 20 28 0 14 Figure 4 — Efficiency at TCASE = –40°C 70 0 Case Temperature (°C) Figure 3 — Full-load efficiency vs. temperature; Vin 97 70 -20 V IN: Figure 2 — No-load power dissipation vs. Vin Efficiency (%) 96 48V 10 12 21 18 15 12 9 6 3 0 14 55V 0 2 4 VIN: 6 8 Load Current (A) 38V 48V Figure 7 — Power dissipation at TCASE = 25°C Rev 1.5 01/2021 10 55V BCM48Bx240y300A00 Application Characteristics (Cont.) The following values, typical of an application environment, are collected at TCASE = 25°C unless otherwise noted. See associated figures for general trend data. 27 94 24 Power Dissipation (W) 97 Efficiency (%) 91 88 85 82 79 76 73 70 0 2 4 6 Load Current (A) 38V VIN: 8 10 48V 12 21 18 15 12 9 6 3 0 14 0 2 55V 4 38V VIN: Figure 8 — Efficiency at TCASE = 100°C 6 8 Load Current (A) 10 48V 12 14 55V Figure 9 — Power dissipation at TCASE = 100°C 70 300 270 Voltage (mVPK-PK) ROUT (mΩ) 60 50 40 30 240 210 180 150 120 90 60 30 0 20 -40 -20 0 20 40 60 80 0 100 Case Temperature (°C) IOUT: BCM® Bus Converter Page 9 of 21 4 6 8 Load Current (A) VIN: 12.5A Figure 10 — ROUT vs. temperature; nominal input 2 10 12 14 48V Figure 11 — Vripple vs. Iout: no external Cout, board mounted module, scope setting: 20MHz analog BW Rev 1.5 01/2021 BCM48Bx240y300A00 Application Characteristics (Cont.) The following values, typical of an application environment, are collected at TCASE = 25°C unless otherwise noted. See associated figures for general trend data. Figure 12 — Full load ripple, 330µF Cin: no external Cout, board mounted module, scope setting: 20MHz analog BW Figure 13 — Start up from application of PC; Vin pre-applied Cout = 375µF Figure 14 — 0 – 12.5A transient response: Cin = 330µF, Iin measured prior to Cin , no external Cout Figure 15 — 12.5 – 0A transient response: Cin = 330µF, Iin measured prior to Cin, no external Cout BCM® Bus Converter Rev 1.5 Page 10 of 21 01/2021 BCM48Bx240y300A00 General Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TCASE ≤ 100°C (T-Grade); All other specifications are at TCASE = 25°C unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Mechanical Length L 32.25 [1.270] 32.50 [1.280] 32.75 [1.289] mm [in] Width W 21.75 [0.856] 22.00 [0.866] 22.25 [0.876] mm [in] 6.48 [0.255] 6.73 [0.265] Height H Volume Vol Weight W Lead Finish No heat sink 6.98 [0.275] mm [in] 4.81 [0.294] cm3 [in3] 14.5 [0.512] g [oz] Nickel 0.51 2.03 Palladium 0.02 0.15 Gold 0.003 0.051 BCM48Bx240T300A00 (T-Grade) –40 125 BCM48Bx240M300A00 (M-Grade) –55 125 µm Thermal Operating Temperature TJ Thermal Resistance θJC Isothermal heatsink and isothermal internal PCB Thermal Capacity °C 1 °C/W 5 Ws/°C Assembly Peak Compressive Force Applied to Case (Z-Axis) Storage Temperature Supported by J-lead only 6 lbs 5.41 lbs/ in2 BCM48Bx240T300A00 (T-Grade) –40 125 °C BCM48Bx240M300A00 (M-Grade) –65 125 °C ESDHBM Human Body Model, JEDEC JESD 22-A114D.01 Class 1D 1000 ESDCDM Charge Device Model, JEDEC JESD 22-C101-D 400 TST ESD Withstand V Soldering Peak Temperature During Reflow RoHS 245 Non-RoHS 225 °C Peak Time Above Liquidus Requires AN:009 compliance 60 90 s Peak Heating Rate During Reflow Requires AN:009 compliance 1 1.5 3 °C/s Peak Cooling Rate Post Reflow Requires AN:009 compliance 1 1.5 6 °C/s 60 VDC Safety Working Voltage (IN – OUT) VIN_OUT 2250 Isolation Voltage (Hipot) VHIPOT Isolation Capacitance CIN_OUT Unpowered unit Isolation Resistance RIN_OUT At 500VDC MTBF 2500 VDC 3200 10 pF MΩ MIL-HDBK-217Plus Parts Count - 25°C Ground Benign, Stationary, Indoors / Computer Profile 3.80 MHrs Telcordia Issue 2 - Method I Case III; 25°C Ground Benign, Controlled 5.60 MHrs cTÜVus Agency Approvals / Standards 3800 cURus CE Marked for Low Voltage Directive and RoHS recast directive, as applicable. BCM® Bus Converter Rev 1.5 Page 11 of 21 01/2021 BCM48Bx240y300A00 Using The Control Signals PC, TM Primary Control (PC) pin can be used to accomplish the following functions: n Logic enable and disable for module: Once tON1 time has been satisfied, a PC voltage greater than VPC_EN will cause the module to start. Bringing PC lower than VPC_DIS will cause the module to enter standby. n Auxiliary voltage source: Once enabled in regular operational conditions (no fault), each BCM module PC provides a regulated 5V, 3.5mA voltage source. n Synchronized start up: In an array of parallel modules, PC pins should be connected to synchronize start up across units. This permits the maximum load and capacitance to scale by the number of paralleled modules. n Output disable: PC pin can be actively pulled down in order to disable the module. Pull‑down impedance shall be lower than 60Ω. n Fault-detection flag: The PC 5V voltage source is internally turned off as soon as a fault is detected. Note that PC can not sink significant current during a fault condition. The PC pin of a faulted module will not cause interconnected PC pins of other modules to be disabled. Temperature Monitor (TM) pin provides a voltage proportional to the absolute temperature of the converter control IC. It can be used to accomplish the following functions: n Monitor the control IC temperature: The temperature in Kelvin is equal to the voltage on the TM pin scaled by 100. (i.e., 3.0V = 300K = 27°C). If a heat sink is applied, TM can be used to protect the system thermally. n Fault-detection flag: The TM voltage source is internally turned off as soon as a fault is detected. For system monitoring purposes microcontroller interface faults are detected on falling edges of TM signal. BCM® Bus Converter Rev 1.5 Page 12 of 21 01/2021 BCM48Bx240y300A00 Sine Amplitude Converter™ Point-of-Load Conversion LIN 0.6nH + RC IN 2.2mΩ VIN 2000pH IOUT CIN 2µF IQ 123mA + + – – K LOUT 600pH RC OUT 417µΩ 0.006Ω V•I 1/2 • IOUT ROUT 43.4mΩ 1/2 • VIN COUT 12µF + VOUT – – Figure 16 — VI Chip® module AC model The Sine Amplitude Converter (SAC™) uses a high‑frequency resonant tank to move energy from input to output. The resonant LC tank, operated at high frequency, is amplitude modulated as a function of input voltage and output current. A small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving power density. The use of DC voltage transformation provides additional interesting attributes. Assuming that ROUT = 0Ω and IQ = 0A, Equation 3 now becomes Equation 1 and is essentially load independent, resistor R is now placed in series with VIN. The BCM48Bx240y300A00 SAC can be simplified into the preceeding model. R At no load: VIN VOUT = VIN • K VOUT VIN (2) The relationship between VIN and VOUT becomes: VOUT = (VIN – IIN • R) • K (3) IIN – IQ K VOUT = VIN • K – IOUT • R • K2 (4) ROUT represents the impedance of the SAC, and is a function of the RDS_ON of the input and output MOSFETs and the winding resistance of the power transformer. IQ represents the quiescent current of the SAC control, gate drive circuitry and core losses. (5) Substituting the simplified version of Equation 4 (IQ is assumed = 0A) into Equation 5 yields: and IOUT is represented by: IOUT = VOUT Figure 17 — K = 1/2 Sine Amplitude Converter with series input resistor In the presence of a load, VOUT is represented by: VOUT = VIN • K – IOUT • ROUT SAC™ K = 1/2 (1) K represents the “turns ratio” of the SAC. Rearranging Equation 1: K= + – (6) This is similar in form to Equation 3, where ROUT is used to represent the characteristic impedance of the SAC. However, in this case a real R on the input side of the SAC is effectively scaled by K 2 with respect to the output. Assuming that R = 1Ω, the effective R as seen from the secondary side is 250.0mΩ, with K = 1/2. BCM® Bus Converter Rev 1.5 Page 13 of 21 01/2021 BCM48Bx240y300A00 A similar exercise should be performed with the additon of a capacitor or shunt impedance at the input to the SAC. A switch in series with VIN is added to the circuit. This is depicted in Figure 18. S VIN + – C SAC™ K = 1/2 VOUT A solution for keeping the impedance of the SAC low involves switching at a high frequency. This enables small magnetic components because magnetizing currents remain low. Small magnetics mean small path lengths for turns. Use of low‑loss core material at high frequencies also reduces core losses. Figure 18 — Sine Amplitude Converter™ with input capacitor A change in VIN with the switch closed would result in a change in capacitor current according to the following equation: IC (t) = C dVIN (7) dt Assume that with the capacitor charged to VIN, the switch is opened and the capacitor is discharged through the idealized SAC. In this case, IC = IOUT • K Low impedance is a key requirement for powering a high‑current, low-voltage load efficiently. A switching regulation stage should have minimal impedance while simultaneously providing appropriate filtering for any switched current. The use of a SAC between the regulation stage and the point-of-load provides a dual benefit of scaling down series impedance leading back to the source and scaling up shunt capacitance or energy storage as a function of its K factor squared. However, the benefits are not useful if the series impedance of the SAC is too high. The impedance of the SAC must be low, i.e., well beyond the crossover frequency of the system. The two main terms of power loss in the BCM module are: n No-load power dissipation (PNL): defined as the power used to power up the module with an enabled powertrain at no load. n Resistive loss (PROUT): refers to the power loss across the BCM modeled as pure resistive impedance. PDISSIPATED = PNL + PR (8) Therefore, POUT = PIN – PDISSIPATED = PIN – PNL – PR OUT substituting Equations 1 and 8 into Equation 7 reveals: IOUT = C K2 • dVOUT dt (10) OUT (9) (11) The above relations can be combined to calculate the overall module efficiency: The equation in terms of the output has yielded a K 2 scaling factor for C, specified in the denominator of the equation. A K factor less than unity results in an effectively larger capacitance on the output when expressed in terms of the input. With a K = 1/2 as shown in Figure 18, C = 1µF would appear as C = 4µF when viewed from the output. η= = POUT PIN PIN – PNL – PR PIN OUT VIN • IIN – PNL – (IOUT)2 • ROUT =1– BCM® Bus Converter Rev 1.5 Page 14 of 21 01/2021 = VIN • IIN (PNL + (IOUT)2 • ROUT) VIN • IIN (12) BCM48Bx240y300A00 Input and Output Filter Design Thermal Considerations A major advantage of SAC™ systems versus conventional PWM converters is that the transformers do not require large functional filters. The resonant LC tank, operated at extreme high frequency, is amplitude modulated as a function of input voltage and output current and efficiently transfers charge through the isolation transformer. A small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieve power density. VI Chip® products are multi-chip modules whose temperature distribution varies greatly for each part number as well as with the input / output conditions, thermal management and environmental conditions. Maintaining the top of the BCM48Bx240y300A00 case to less than 100°C will keep all junctions within the VI Chip module below 125°C for most applications. This paradigm shift requires system design to carefully evaluate external filters in order to: n Guarantee low source impedance: To take full advantage of the BCM’s dynamic response, the impedance presented to its input terminals must be low from DC to approximately 5MHz. The connection of the bus converter module to its power source should be implemented with minimal distribution inductance. If the interconnect inductance exceeds 100nH, the input should be bypassed with a RC damper to retain low source impedance and stable operation. With an interconnect inductance of 200nH, the RC damper may be as high as 1μF in series with 0.3Ω. A single electrolytic or equivalent low-Q capacitor may be used in place of the series RC bypass. The percent of total heat dissipated through the top surface versus through the J-lead is entirely dependent on the particular mechanical and thermal environment. The heat dissipated through the top surface is typically 60%. The heat dissipated through the J-lead onto the PCB surface is typically 40%. Use 100% top surface dissipation when designing for a conservative cooling solution. It is not recommended to use a VI Chip module for an extended period of time at full load without proper heat sinking. n Further reduce input and/or output voltage ripple without sacrificing dynamic response: Given the wide bandwidth of the module, the source response is generally the limiting factor in the overall system response. Anomalies in the response of the source will appear at the output of the module multiplied by its K factor. This is illustrated in Figures 14 and 15. n Protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and cause failures: The module input/output voltage ranges shall not be exceeded. An internal overvoltage lockout function prevents operation outside of the normal operating input range. Even during this condition, the powertrain is exposed to the applied voltage and power MOSFETs must withstand it. A criterion for protection is the maximum amount of energy that the input or output switches can tolerate if avalanched. Total load capacitance at the output of the BCM shall not exceed the specified maximum. Owing to the wide bandwidth and low output impedance of the module, low-frequency bypass capacitance and significant energy storage may be more densely and efficiently provided by adding capacitance at the input of the module. At frequencies