BCM® Bus Converter
BCM6123xD1E5135yzz
®
C
S
US
C
NRTL
US
Isolated Fixed-Ratio DC-DC Converter
Features & Benefits
Product Ratings
• Up to 35A continuous secondary current
• Up to 2735W/in3 power density
• 98% peak efficiency
VPRI = 400V (260 – 410V)
ISEC = up to 35A
VSEC = 50V (32.5 – 51.3V)
(no load)
K = 1/8
• 4,242VDC isolation
• Parallel operation for multi-kW arrays
Product Description
• OV, OC, UV, short-circuit and thermal protection
The BCM6123xD1E5135yzz is a high-efficiency Bus Converter,
operating from a 260 to 410VDC primary bus to deliver an isolated,
ratiometric secondary voltage from 32.5 to 51.3VDC.
• 6123 through-hole ChiP™ package
2.494 x 0.898 x 0.284in
[63.34 x 22.80 x 7.21mm]
• PMBus® management interface [a]
Typical Applications
• 380VDC Power Distribution
• High-End Computing Systems
• Automated Test Equipment
• Industrial Systems
• High-Density Power Supplies
• Communications Systems
• Transportation
[a]
The BCM6123xD1E5135yzz offers low noise, fast transient
response, and industry leading efficiency and power density. In
addition, it provides an AC impedance beyond the bandwidth of
most downstream regulators, allowing input capacitance normally
located at the input of a PoL regulator to be located at the primary
side of the BCM. With a primary to secondary K factor of 1/8, that
capacitance value can be reduced by a factor of 64x, resulting in
savings of board area, material and total system cost.
Leveraging the thermal and density benefits of Vicor ChiP
packaging technology, the BCM offers flexible thermal
management options with very low top and bottom side thermal
impedances. Thermally-adept ChiP-based power components
enable customers to achieve low-cost power system solutions
with previously unattainable system size, weight and efficiency
attributes quickly and predictably.
This product can operate in the reverse direction, at full rated
current, after being previously started in the forward direction.
When used with D44TL1A0 and I13TL1A0
BCM® Bus Converter
Page 1 of 30
Rev 1.6
05/2019
BCM6123xD1E5135yzz
Typical Applications
BCM
TM
EN
enable/disable
switch
SW1
VAUX
F1
VPRI
+VPRI
+VSEC
–VPRI
–VSEC
CPRI
PoL
GND
PRIMARY
SECONDARY
ISOLATION BOUNDARY
BCM6123xD1E5135y00 at point-of-load
BCM
SER-OUT
SER-OUT
EN
SER-IN
enable/disable
switch
SER-IN
FUSE
VPRI
C
+VPRI
+VSEC
–VPRI
–VSEC
PoL
I_BCM_ELEC
PRIMARY
SOURCE_RTN
SECONDARY
Digital
Supervisor
ISOLATION BOUNDARY
Digital Isolator
D44TL1A0
I13TL1A0
NC
PRI_OUT_A
Host µC
SEC_IN_A
VDDB
SEC_IN_B
TXD
VDD
PRI_IN_C
SEC_OUT_C
RXD
PRI_COM
SEC_COM
SER-IN
t
+
PRI_OUT_B
–
V
EXT
SER-OUT
SGND
SGND
PMBus
PMBus
SGND
SGND
SGND
BCM6123xD1E5135y01 at point-of-load
BCM® Bus Converter
Page 2 of 30
Rev 1.6
05/2019
BCM6123xD1E5135yzz
Typical Applications (Cont.)
PRM
BCM
ENABLE
enable/disable
switch
TM/SER-OUT
EN
SGND
enable/disable
switch
VAUX/SER-IN
R
FUSE
V
C
PRI
+VPRI
+VSEC
–VPRI
–VSEC
PRIMARY
R
R
TRIM_PRM
VTM
REF/
REF_EN
AL
VT
SHARE/
CONTROL NODE
VC
AL_PRM
L
V
Adaptive Loop Temperature Feedback
TM
VTM Start Up Pulse
OUT
+OUT
VC
PC
IFB
C
R
O_PRM_DAMP
I_PRM_DAMP
SGND
I_BCM_ELEC
SOURCE_RTN
VAUX
TRIM
I_PRM_FLT
R
+IN
+OUT
–IN
–OUT
L
I_PRM_CER
SGND
LOAD
O_VTM_CER
+IN
O_PRM_FLT
C
O_PRM_CER
–IN
–OUT
PRIMARY
SECONDARY
SECONDARY
LOAD_RTN
ISOLATION BOUNDARY
ISOLATION BOUNDARY
SGND
BCM6123xD1E5135yzz + PRM™ + VTM™, Adaptive Loop configuration
V
REF
TM/SER-OUT
enable/disable
switch
VPRI
C
I_BCM_ELEC
SOURCE_RTN
+VPRI
+VSEC
–VPRI
–VSEC
PRIMARY
VT
SHARE/
CONTROL NODE
VC
IFB
I_PRM_DAMP
L
I_PRM_FLT
Voltage Sense and Error Amplifier
(Differential)
VTM
SGND
VTM Start up Pulse
V+
SGND
+OUT
+IN
External Current Sense
I_PRM_ELEC
–IN
SGND
VC
PC
V–
VOUT
–IN
+OUT
TM
Voltage Reference with Soft Start
+IN
C
SGND
OUT
GND
REF/
REF_EN
AL
SGND
R
FUSE
IN
VAUX
TRIM
SGND
VAUX/SER-IN
REF 3312
ENABLE
EN
enable/disable
switch
SGND
PRM
Voltage Sense
BCM
R
L
C
O_PRM_DAMP
O_VTM_CER
LOAD
+IN
O_PRM_FLT
C
O_PRM_CER
–IN
–OUT
–OUT
PRIMARY
SECONDARY
SECONDARY
ISOLATION BOUNDARY
ISOLATION BOUNDARY
SGND
BCM6123xD1E5135yzz + PRM + VTM, Remote Sense configuration
3-Phase AIM
BCM6123 ChiP™
+
+VPRI
+VSEC
TM / SER-OUT
L1
L2
L3
L
O
A
D
EN
VAUX / SER-IN
–
–VPRI
–VSEC
ISOLATION BOUNDARY
3-phase AC to point-of-load (3-phase AIM™ + BCM6123xD1E5135yzz)
BCM® Bus Converter
Page 3 of 30
Rev 1.6
05/2019
BCM6123xD1E5135yzz
Pin Configuration
TOP VIEW
1
2
+VPRI
A
A’
+VSEC
TM/SER-OUT
B
B’
–VSEC
EN
C
VAUX/SER-IN
D
–VPRI
E
C’ +VSEC
D’
–VSEC
BCM6123 ChiP™
Pin Descriptions
Power Pins
Pin Number
Signal Name
Type
Function
A1
+VPRI
PRIMARY POWER
Positive primary transformer power terminal
E1
–VPRI
PRIMARY POWER
RETURN
Negative primary transformer power terminal
A’2, C’2
+VSEC
SECONDARY
POWER
Positive secondary transformer power terminal
B’2, D’2
–VSEC
SECONDARY
POWER RETURN
Negative secondary transformer power terminal
Analog Control Signal Pins
Pin Number
Signal Name
Type
Function
B1
TM
OUTPUT
C1
EN
INPUT
D1
VAUX
OUTPUT
Temperature Monitor; primary-side referenced signals
Enables and disables power supply; primary-side referenced signals
Auxiliary Voltage Source; primary-side referenced signals
PMBus®
Control Signal Pins
Pin Number
Signal Name
Type
B1
SER-OUT
OUTPUT
C1
EN
INPUT
Enables and disables power supply; primary-side referenced signals
D1
SER-IN
INPUT
UART receive pin; primary-side referenced signals
BCM® Bus Converter
Page 4 of 30
Function
UART transmit pin; primary-side referenced signals
Rev 1.6
05/2019
BCM6123xD1E5135yzz
Part Ordering Information
Part Number
Temperature Grade
BCM6123TD1E5135T0R
Tray Size
00 = Analog Control
BCM6123TD1E5135T00
BCM6123TD1E5135T01
Option
01 = PMBus® Control
T = –40 to 125°C
16 parts per tray
0R = Reversible Analog Control
0P = Reversible PMBus Control
BCM6123TD1E5135T0P
All products shipped in JEDEC standard high-profile (0.400” thick) trays (JEDEC Publication 95, Design Guide 4.10).
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
+VPRI_DC to –VPRI_DC
Min
Max
Unit
–1
480
V
1
V/µs
VPRI_DC or VSEC_DC Slew Rate
(Operational)
+VSEC_DC to –VSEC_DC
–1
TM/SER-OUT to –VPRI_DC
EN to –VPRI_DC
–0.3
VAUX/SER-IN to –VPRI_DC
BCM® Bus Converter
Page 5 of 30
Rev 1.6
05/2019
60
V
4.6
V
5.5
V
4.6
V
BCM6123xD1E5135yzz
Electrical Specifications
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
410
V
120
V
General Powertrain PRIMARY to SECONDARY Specification (Forward Direction)
Primary Input Voltage Range
(Continuous)
VPRI µController
PRI to SEC Input Quiescent Current
VPRI_DC
VµC_ACTIVE
IPRI_Q
260
VPRI_DC voltage where µC is initialized,
(i.e., VAUX = low, powertrain inactive)
Disabled, EN Low, VPRI_DC = 400V
2
TINTERNAL ≤ 100ºC
4
VPRI_DC = 400V, TINTERNAL = 25ºC
PRI to SEC No-Load
Power Dissipation
PRI to SEC Inrush Current Peak
PPRI_NL
IPRI_INR_PK
VPRI_DC = 400V
10
6
21
15
VPRI_DC = 260 – 410V
22
6
TINTERNAL ≤ 100ºC
DC Primary Input Current
Transformation Ratio
Secondary Output Current
(Continuous)
Secondary Output Current (Pulsed)
IPRI_IN_DC
K
Secondary Output Power
(Continuous)
PSEC_OUT_DC
Secondary Output Power
(Pulsed)
PSEC_OUT_PULSE
A
At ISEC_OUT_DC = 35A, TINTERNAL ≤ 100ºC
4.5
Primary to secondary, K = VSEC_DC / VPRI_DC, at no load
1/8
35
A
40
A
Specified at VPRI_DC = 410V
1750
W
Specified at VPRI_DC = 410V; 10ms pulse, 25% duty
cycle, PSEC_AVG ≤ 50% of rated PSEC_OUT_DC
2000
W
10ms pulse, 25% duty cycle,
ISEC_OUT_AVG ≤ 50% of rated ISEC_OUT_DC
VPRI_DC = 400V, ISEC_OUT_DC = 35A
96.7
VPRI_DC = 260 – 410V, ISEC_OUT_DC = 35A
95.2
97.3
ηAMB
VPRI_DC = 400V, ISEC_OUT_DC = 17.5A
97.3
97.8
PRI to SEC Efficiency (Hot)
ηHOT
VPRI_DC = 400V, ISEC_OUT_DC = 35A
96.3
96.8
PRI to SEC Efficiency
(Over Load Range)
η20%
7A < ISEC_OUT_DC < 35A
92
RSEC_COLD
VPRI_DC = 400V, ISEC_OUT_DC = 35A, TINTERNAL = –40°C
12
16
RSEC_AMB
VPRI_DC = 400V, ISEC_OUT_DC = 35A
16
22.6
33
RSEC_HOT
VPRI_DC = 400V, ISEC_OUT_DC = 35A, TINTERNAL = 100°C
24
31
39
FSW
Frequency of the output voltage ripple = 2x FSW
1.05
1.10
1.14
VSEC_OUT_PP
CSEC_EXT = 0μF, ISEC_OUT_DC = 35A, VPRI_DC = 400V,
20MHz BW
Switching Frequency
Secondary Output Voltage Ripple
%
Secondary Output Leads Inductance
(Parasitic)
Primary Input Series Inductance
(Internal)
BCM® Bus Converter
Page 6 of 30
%
%
20
250
TINTERNAL ≤ 100ºC
Primary Input Leads Inductance
(Parasitic)
A
V/V
PRI to SEC Efficiency (Ambient)
PRI to SEC Output Resistance
W
12
ISEC_OUT_DC
ISEC_OUT_PULSE
14
VPRI_DC = 260 – 410V, TINTERNAL = 25ºC
VPRI_DC = 410V, CSEC_EXT = 100μF, RLOAD_SEC = 50% of
full load current
mA
mΩ
MHz
mV
350
LPRI_IN_LEADS
Frequency 2.5MHz (double switching frequency),
simulated lead model
6.7
nH
LSEC_OUT_LEADS
Frequency 2.5MHz (double switching frequency),
simulated lead model
1.3
nH
Reduces the need for input decoupling inductance in
BCM arrays
0.56
µH
LIN_INT
Rev 1.6
05/2019
BCM6123xD1E5135yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Cont.
Effective Primary Capacitance
(Internal)
CPRI_INT
Effective value at 400VPRI_DC
0.37
µF
Effective Secondary Capacitance
(Internal)
CSEC_INT
Effective value at 50VSEC_DC
25.6
µF
Rated Secondary Output
Capacitance (External)
CSEC_OUT_EXT
Rated Secondary Output Capacitance
CSEC_OUT_AEXT
(External), Parallel Array Operation
Excessive capacitance may drive module
into short-circuit protection
100
µF
357.5
ms
CSEC_OUT_AEXT Max = N • 0.5 • CSEC_OUT_EXT MAX, where
N = the number of units in parallel
Powertrain Protection PRIMARY to SECONDARY (Forward Direction)
Auto Restart Time
tAUTO_RESTART
Start up into a persistent fault condition. Non-latching
fault detection given VPRI_DC > VPRI_UVLO+
292.5
Primary Overvoltage
Lockout Threshold
VPRI_OVLO+
420
436
450
V
Primary Overvoltage
Recovery Threshold
VPRI_OVLO–
405
426
440
V
Primary Overvoltage
Lockout Hysteresis
VPRI_OVLO_HYST
10
V
tPRI_OVLO
100
µs
1
ms
Primary Overvoltage
Lockout Response Time
Secondary Soft-Start Time
tSEC_SOFT-START
Secondary Output Overcurrent
Trip Threshold
ISEC_OUT_OCP
Secondary Output Overcurrent
Response Time Constant
tSEC_OUT_OCP
Secondary Output Short-Circuit
Protection Trip Threshold
ISEC_OUT_SCP
Secondary Output Short-Circuit
Protection Response Time
tSEC_OUT_SCP
Overtemperature
Shut-Down Threshold
BCM® Bus Converter
Page 7 of 30
tOTP+
From powertrain active; fast current limit protection
disabled during soft start
37.5
Effective internal RC filter
47
3.6
1
Rev 1.6
05/2019
125
A
ms
A
52
Temperature sensor located inside controller IC
59
µs
°C
BCM6123xD1E5135yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Powertrain Supervisory Limits PRIMARY to SECONDARY (Forward Direction)
Primary Overvoltage
Lockout Threshold
VPRI_OVLO+
420
436
450
V
Primary Overvoltage
Recovery Threshold
VPRI_OVLO–
405
426
440
V
Primary Overvoltage
Lockout Hysteresis
VPRI_OVLO_HYST
10
V
Primary Overvoltage
Lockout Response Time
tPRI_OVLO
100
µs
Primary Undervoltage
Lockout Threshold
VPRI_UVLO–
200
226
250
V
Primary Undervoltage
Recovery Threshold
VPRI_UVLO+
225
244
259
V
Primary Undervoltage
Lockout Hysteresis
VPRI_UVLO_HYST
15
V
tPRI_UVLO
100
µs
20
ms
Primary Undervoltage
Lockout Response Time
From VPRI_DC = VPRI_UVLO+ to powertrain active, EN
Primary-to-Secondary Start-Up Delay tPRI_TO_SEC_DELAY floating (i.e., one-time start-up delay from application
of VPRI_DC to VSEC_DC)
Secondary Output Overcurrent
Trip Threshold
ISEC_OUT_OCP
Secondary Output Overcurrent
Response Time Constant
tSEC_OUT_OCP
Overtemperature
Shut-Down Threshold
tOTP+
Overtemperature
Recovery Threshold
tOTP–
Undertemperature
Shut-Down Threshold
tUTP
Undertemperature Restart Time
BCM® Bus Converter
Page 8 of 30
tUTP_RESTART
37.5
Effective internal RC filter
Temperature sensor located inside controller IC
47
3.6
°C
110
Temperature sensor located inside controller IC;
Protection not available for M-Grade units.
Rev 1.6
05/2019
A
ms
125
105
Start up into a persistent fault condition. Non-Latching
fault detection given VPRI_DC > VPRI_UVLO+
59
3
115
°C
–45
°C
s
BCM6123xD1E5135yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
51.3
V
General Powertrain SECONDARY to PRIMARY Specification (Reverse Direction)
Secondary Input Voltage Range
(Continuous)
VSEC_DC
32.5
VSEC_DC = 50V, TINTERNAL = 25ºC
SEC to PRI No-Load
Power Dissipation
DC Secondary Input Current
Primary Output Power (Continuous)
Primary Output Power (Pulsed)
Primary Output Current (Continuous)
Primary Output Current (Pulsed)
PSEC_NL
ISEC_IN_DC
PPRI_OUT_DC
PPRI_OUT_PULSE
VSEC_DC = 50V
12
6
22
VSEC_DC = 32.5 – 51.3V, TINTERNAL = 25ºC
18
VSEC_DC = 32.5 – 51.3V
23
At IPRI_DC = 4.38A, TINTERNAL ≤ 100ºC
36
A
1750
W
Specified at VSEC_DC = 51.3V; 10ms pulse,
25% duty cycle, PPRI_AVG ≤ 50% rated PPRI_OUT_DC
2000
W
4.38
A
5
A
10ms pulse, 25% duty cycle,
IPRI_OUT_AVG ≤ 50% rated IPRI_OUT_DC
VSEC_DC = 50V, IPRI_OUT_DC = 4.38A
96.7
VSEC_DC = 32.5 – 51.3V, IPRI_OUT_DC= 4.38A
95.2
97.3
SEC to PRI Efficiency (Ambient)
ηAMB
VSEC_DC = 50V, IPRI_OUT_DC = 2.2A
97.3
97.8
SEC to PRI Efficiency (Hot)
ηHOT
VSEC_DC = 50V, IPRI_OUT_DC = 4.38A
96.3
96.8
SEC to PRI Efficiency
(Over Load Range)
η20%
0.88A < IPRI_OUT_DC < 4.38A
SEC to PRI Output Resistance
Primary Output Voltage Ripple
%
%
92
VSEC_DC = 50V, IPRI_OUT_DC = 4.38A, TINTERNAL = –40°C
1400
1628
2200
RPRI_AMB
VSEC_DC = 50V, IPRI_OUT_DC = 4.38A
1650
2026
2650
RPRI_HOT
VSEC_DC = 50V, IPRI_OUT_DC = 4.38A, TINTERNAL = 100°C
2350
2683
3100
CPRI_OUT_EXT = 0μF, IPRI_OUT_DC = 4.38A,
VSEC_DC = 50V, 20MHz BW
TINTERNAL ≤ 100ºC
BCM® Bus Converter
Page 9 of 30
%
RPRI_COLD
VPRI_OUT_PP
W
Specified at VSEC_DC = 51.3V
IPRI_OUT_DC
IPRI_OUT_PULSE
17
2000
mV
2800
Rev 1.6
05/2019
mΩ
BCM6123xD1E5135yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
52.5
54.5
56.5
V
Protection SECONDARY to PRIMARY (Reverse Direction)
Secondary Overvoltage
Lockout Threshold
VSEC_OVLO+
Secondary Overvoltage
Lockout Response Time
tPRI_OVLO
Secondary Undervoltage
Lockout Threshold
VSEC_UVLO–
Secondary Undervoltage
Lockout Response Time
tSEC_UVLO
Module latched shut down with VPRI_DC < VPRI_UVLO–_R
100
Module latched shut down with VPRI_DC < VPRI_UVLO–_R
13.75
15
µs
16
100
V
µs
Primary Undervoltage
Lockout Threshold
VPRI_UVLO–_R
Applies only to reversible products in forward and in
reverse direction; IPRI_DC ≤ 20% while
VPRI_UVLO–_R < VPRI_DC < VPRI_MIN
110
120
130
V
Primary Undervoltage
Recovery Threshold
VPRI_UVLO+_R
Applies only to reversible products in forward and in
reverse direction
120
135
150
V
Primary Undervoltage
Lockout Hysteresis
VPRI_UVLO_HYST_R
Applies only to reversible products in forward and in
reverse direction
Primary Output Overcurrent
Trip Threshold
IPRI_OUT_OCP
Module latched shut down with VPRI_DC < VPRI_UVLO–_R
Primary Output Overcurrent
Response Time Constant
tPRI_OUT_OCP
Effective internal RC filter
Primary Short-Circuit Protection
Trip Threshold
IPRI_SCP
Primary Short-Circuit Protection
Response Time
tPRI_SCP
Module latched shut down with VPRI_DC < VPRI_UVLO–_R
BCM® Bus Converter
Rev 1.6
Page 10 of 30 05/2019
10
4.69
5.88
3.6
V
7.38
A
ms
A
6.5
1
µs
BCM6123xD1E5135yzz
Operating Area
2000
Primary/Secondary
Output Power (W)
1800
1600
1400
1200
1000
800
600
400
200
0
35
45
55
65
75
85
95
105
115
125
Case Temperature (°C)
Top only at temperture
Top and leads at temperature
Top, leads and belly at temperature
2000
1900
1800
1700
1600
1500
1400
1300
1200
1100
1000
900
800
Seondary Output Current (A)
Secondary Output Power (W)
Figure 1 — Specified thermal operating area
260
275
290
305
320
335
350
365
380
395
42
40
38
36
34
32
30
28
26
24
22
20
18
16
410
260
275
290
Primary Input Voltage (V)
PSEC_OUT_DC
305
ISEC_OUT_DC
PSEC_OUT_PULSE
Secondary Output Capacitance
(% Rated CSEC_EXT_MAX)
Figure 2 — Specified electrical operating area using rated RSEC_HOT
110
100
90
80
70
60
50
40
30
20
10
0
0
320
335
350
365
380
Primary Input Voltage (V)
20
40
60
80
Seondary Output Current (% ISEC_DC)
Figure 3 — Specified primary start up into load current and external capacitance
BCM® Bus Converter
Rev 1.6
Page 11 of 30 05/2019
100
ISEC_OUT_PULSE
395
410
BCM6123xD1E5135yzz
Analog Control Signal Characteristics
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Temperature Monitor
• The TM pin is a standard analog I/O configured as an output from an internal µC.
• The TM pin monitors the internal temperature of the controller IC within an accuracy of ±5°C.
• µC 250kHz PWM output internally pulled high to 3.3V.
Signal Type
State
Start Up
Attribute
Powertrain Active
to TM Time
TM Duty Cycle
TM Current
Symbol
Conditions / Notes
Min
tTM
Typ
Max
µs
100
TMPWM
18.18
ITM
Unit
68.18
%
4
mA
Recommended external filtering
Digital
Output
Regular
Operation
TM Capacitance (External)
CTM_EXT
Recommended External filtering
0.01
µF
TM Resistance (External)
RTM_EXT
Recommended External filtering
1
kΩ
10
mV / °C
1.27
V
Specifications using recommended filter
TM Gain
TM Voltage Reference
TM Voltage Ripple
ATM
VTM_AMB
VTM_PP
Internal temperature = 27ºC
RTM_EXT = 1kΩ, CTM_EXT = 0.01µF,
VPRI_DC = 400V, ISEC_DC = 35A
28
TINTERNAL ≤ 100ºC
mV
40
Enable / Disable Control
• The EN pin is a standard analog I/O configured as an input to an internal µC.
• It is internally pulled high to 3.3V.
• When held low, the BCM internal bias will be disabled and the powertrain will be inactive.
• In an array of BCMs, EN pins should be interconnected to synchronize start up.
Signal Type
State
Start Up
Analog
Input
Regular
Operation
Attribute
EN to Powertrain
Active Time
Symbol
tEN_START
EN Voltage Threshold
VEN_TH
EN Resistance (Internal)
REN_INT
EN Disable Threshold
Conditions / Notes
Min
VPRI_DC > VPRI_UVLO+, EN held low both
conditions satisfied for T > tPRI_UVLO+_DELAY
Typ
Max
µs
250
V
2.3
Internal pull-up resistor
VEN_DISABLE_TH
BCM® Bus Converter
Rev 1.6
Page 12 of 30 05/2019
Unit
1.5
kΩ
1
V
BCM6123xD1E5135yzz
Analog Control Signal Characteristics (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Auxiliary Voltage Source
• The VAUX pin is a standard analog I/O configured as an output from an internal µC.
• VAUX is internally connected to µC output and internally pulled high to a 3.3V regulator with 2% tolerance, a 1% resistor of 1.5kΩ.
• VAUX can be used as a “Ready to process full power” flag. This pin transitions VAUX voltage after a 2ms delay from the start of powertrain activating,
signaling the end of soft start.
• VAUX can be used as “Fault flag”. This pin is pulled low internally when a fault protection is detected.
Signal Type
State
Start Up
Analog
Output
Regular
Operation
Fault
Attribute
Symbol
Powertrain Active to
VAUX Time
tVAUX
VAUX Voltage
VVAUX
VAUX Available Current
IVAUX
VAUX Voltage Ripple
VVAUX_PP
VAUX Capacitance
(External)
CVAUX_EXT
VAUX Resistance (External)
RVAUX_EXT
VAUX Fault Response Time
tVAUX_FR
Conditions / Notes
Min
Powertrain active to VAUX High
Typ
Max
ms
2
2.8
3.3
V
4
mA
50
TINTERNAL ≤ 100ºC
100
0.01
VPRI_DC < VµC_ACTIVE
From fault to VVAUX = 2.8V, CVAUX = 0pF
BCM® Bus Converter
Rev 1.6
Page 13 of 30 05/2019
1.5
Unit
mV
µF
kΩ
10
µs
BCM6123xD1E5135yzz
PMBus® Control Signal Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
UART SER-IN / SER-OUT Pins
• Universal Asynchronous Receiver/Transmitter (UART) pins.
• The BCM communication version is not intended to be used without a Digital Supervisor.
• Isolated I2C™ communication and telemetry is available when using Vicor Digital Isolator and Vicor Digital Supervisor.
Please see specific product data sheet for more details.
• UART SER-IN pin is internally pulled high using a 1.5kΩ to 3.3V.
Signal Type
State
General I/O
Attribute
Symbol
Baud Rate
BRUART
Conditions / Notes
Min
Rate
Typ
Max
Unit
Kbit/s
750
SER-IN Pin
SER-IN Input Voltage Range
Digital
Input
Regular
Operation
VSER-IN_IH
2.3
V
VSER-IN_IL
1
400
V
SER-IN Rise Time
tSER-IN_RISE
10 – 90%
ns
SER-IN Fall Time
tSER-IN_FALL
10 – 90%
25
ns
SER-IN RPULLUP
RSER-IN_PLP
Pull up to 3.3V
1.5
kΩ
SER-IN External Capacitance
CSER-IN_EXT
400
pF
SER-OUT Pin
Digital
Output
SER-OUT Output
Voltage Range
VSER-OUT_OH
0mA ≥ IOH ≥ -4mA
VSER-OUT_OL
0mA ≤ IOL ≤ 4mA
SER-OUT Rise Time
tSER-OUT_RISE
10 – 90%
55
ns
SER-OUT Fall Time
tSER-OUT_FALL
10 – 90%
45
ns
SER-OUT Source Current
ISER-OUT
SER-OUT Output Impedance
ZSER-OUT
2.8
V
0.5
VSER-OUT = 2.8V
6
V
mA
Ω
120
Enable / Disable Control
• The EN pin is a standard analog I/O configured as an input to an internal µC.
• It is internally pulled high to 3.3V.
• When held low, the BCM internal bias will be disabled and the powertrain will be inactive.
• In an array of BCMs, EN pins should be interconnected to synchronize start up.
• PMBus ON/OFF command has no effect if the BCM EN pin is not in the active state. This BCM has active high EN pin logic.
Signal Type
Analog
Input
State
Attribute
Symbol
Conditions / Notes
Start Up
EN to Powertrain Active Time
tEN_START
VPRI_DC > VPRI_UVLO+,
EN held low both conditions satisfied
for t > tPRI_UVLO+_DELAY
EN Voltage Threshold
VENABLE
EN Resistance (Internal)
REN_INT
Regular
Operation
EN Disable Threshold
VEN_DISABLE_TH
BCM® Bus Converter
Rev 1.6
Page 14 of 30 05/2019
Min
Typ
Max
µs
250
V
2.3
Internal pull-up resistor
Unit
1.5
kΩ
1
V
BCM6123xD1E5135yzz
PMBus® Reported Characteristics
Specifications apply over all line, load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Monitored Telemetry
• The BCM communication version is not intended to be used without a Digital Supervisor.
• The current telemetry is only available in forward operation. The input and output current reported value is not supported in reverse operation.
Digital Supervisor
PMBus Read Command
Accuracy
(Rated Range)
Functional
Reporting Range
Update
Rate
Reported Units
Input Voltage
(88h) READ_VIN
±5% (LL – HL)
130 – 450V
100µs
VACTUAL = VREPORTED x 10–1
Input Current
(89h) READ_IIN
±20% (10 – 20% of FL)
±5% (20 – 133% of FL)
0 to 5.9A
100µs
IACTUAL = IREPORTED x 10–3
Output Voltage [b]
(8Bh) READ_VOUT
±5% (LL – HL)
16.25 – 56.25V
100µs
VACTUAL = VREPORTED x 10–1
Output Current
(8Ch) READ_IOUT
±20% (10 – 20% of FL)
±5% (20 – 133% of FL)
0 to 47.5A
100µs
IACTUAL = IREPORTED x 10–2
Output Resistance
(D4h) READ_ROUT
±5% (50 – 100% of FL) at NL
±10% (50 – 100% of FL) (LL – HL)
10 – 40mΩ
100ms
RACTUAL = RREPORTED x 10–5
(8Dh) READ_TEMPERATURE_1
±7°C (Full Range)
–55 to 130ºC
100ms
TACTUAL = TREPORTED
Attribute
Temperature [c]
[b]
[c]
Default READ Output Voltage returned when unit is disabled = –300V.
Default READ Temperature returned when unit is disabled = –273°C.
Variable Parameter
• Factory setting of all below Thresholds and Warning limits are 100% of listed protection values.
• Variables can be written only when module is disabled either EN pulled low or VIN < VIN_UVLO–.
• Module must remain in a disabled mode for 3ms after any changes to the below variables allowing ample time to commit changes to EEPROM.
Attribute
Digital Supervisor
PMBus Command [d]
Input / Output Overvoltage
Protection Limit
(55h) VIN_OV_FAULT_LIMIT
Input / Output Overvoltage
Warning Limit
(57h) VIN_OV_WARN_LIMIT
Input / Output Undervoltage
Protection Limit
(D7h) DISABLE_FAULTS
Conditions / Notes
VIN_OVLO– is automatically 3%
lower than this set point
Can only be disabled to a preset
default value
Accuracy
(Rated Range)
Functional
Reporting
Range
Default
Value
±5% (LL – HL)
130 – 435V
100%
±5% (LL – HL)
130 – 435V
100%
±5% (LL – HL)
130 – 260V
100%
Input Overcurrent
Protection Limit
(5Bh) IIN_OC_FAULT_LIMIT
±20% (10 – 20% of FL)
±5% (20 – 133% of FL)
0 – 5.625A
100%
Input Overcurrent
Warning Limit
(5Dh) IIN_OC_WARN_LIMIT
±20% (10 – 20% of FL)
±5% (20 – 133% of FL)
0 – 5.625A
100%
Overtemperature
Protection Limit
(4Fh) OT_FAULT_LIMIT
±7°C (Full Range)
0 – 125°C
100%
Overtemperature
Warning Limit
(51h) OT_WARN_LIMIT
±7°C (Full Range)
0 – 125°C
100%
±50µs
0 – 100ms
0ms
Turn-On Delay
[d]
(60h) TON_DELAY
Additional time delay to the
undervoltage start-up delay
Refer to Digital Supervisor datasheet for complete list of supported commands.
BCM® Bus Converter
Rev 1.6
Page 15 of 30 05/2019
+VSEC
VAUX
TM
OUTPUT
OUTPUT
EN
+VPRI
OUTPUT
BIDIR
INPUT
VµC_ACTIVE
BCM® Bus Converter
Rev 1.6
Page 16 of 30 05/2019
START UP
tVAUX
tPRI_TO_SEC_DELAY
VPRI_UVLO+
VPRI_OVLO+
VNOM
OVERVOLTAGE
VPRI_UVLO-
VPRI_OVLO-
l
RV
O N L Pu
VE
UT
N
A
P
O
R N
T
T
TU R
OU
PU
T NTE
E
Y
N
N
U
Z
I
I
I
R O
P
AL A - ARY
IN U X
TI ND URN
C
A
I
D
V
_
IM
IN CO T
RI
PR
VP N &
µc SE
E
p
l -u
T
OL
AG
>
tPRI_TO_SEC_DELAY
tAUTO-RESTART
tSEC_OUT_SCP
SHUT DOWN
GE
NT
TA
H
L
E
W G
EV
VO
LO HI
S
T F
IT
D ED
RE
U
U
F
E
P
L
L
C
UT
IN N-O
IR
UL PUL
P
C
Y
P
R
T
IN
E
E
A R TU
BL ABL
OR
DC
M
I
I_
A
H
R
S
PR
VP
EN EN
RT
TA
ENABLE CONTROL
OVERCURRENT
E
BCM6123xD1E5135yzz
BCM Timing Diagram
BCM6123xD1E5135yzz
High-Level Functional State Diagram
Application
of input voltage to VPRI_DC
VµC_ACTIVE < VPRI_DC < VPRI_UVLO+
STANDBY SEQUENCE
VPRI_DC > VPRI_UVLO+
START-UP SEQUENCE
TM Low
TM Low
EN High
EN High
VAUX Low
VAUX Low
Powertrain Stopped
Powertrain Stopped
ENABLE falling edge,
or OTP detected
Fault
Autorecovery
FAULT
SEQUENCE
TM Low
EN High
VAUX Low
tPRI_TO_SEC_DELAY
expired
ONE TIME DELAY
INITIAL START UP
Input OVLO or UVLO,
Output OCP,
or UTP detected
ENABLE falling edge,
or OTP detected
Input OVLO or UVLO,
Output OCP,
or UTP detected
Powertrain Stopped
Short Circuit detected
BCM® Bus Converter
Rev 1.6
Page 17 of 30 05/2019
SUSTAINED
OPERATION
TM PWM
EN High
VAUX High
Powertrain Active
BCM6123xD1E5135yzz
Application Characteristics
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
260
275
290
305
320
335
350
365
380
395
PRI to SEC, Full Load Efficiency (%)
PRI to SEC, Power Dissipation (W)
Temperature controlled via top-side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the
forward direction (primary side to secondary side). See associated figures for general trend data.
410
98.0
97.8
97.5
97.3
97.0
96.8
96.5
96.3
96.0
95.8
95.5
-40
-20
0
Primary Input Voltage (V)
TTOP SURFACE CASE:
-40°C
25°C
0.0
3.5
7.0
88
80
72
64
56
48
40
32
24
16
8
0
10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0
0.0
3.5
260V
400V
VPRI :
80
100
400V
410V
10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0
260V
400V
410V
Figure 7 — Power dissipation at TCASE = –40°C
72
99
98
PRI to SEC,
Power Disipation (W)
PRI to SEC, Efficiency (%)
60
Secondary Output Current (A)
410V
Figure 6 — Efficiency at TCASE = –40°C
97
96
95
94
93
92
91
90
260V
7.0
Secondary Output Current (A)
VPRI :
40
Figure 5 — Full-load efficiency vs. temperature; VPRI_DC
PRI to SEC,
Power Dissipation (W)
PRI to SEC, Efficiency (%)
VPRI:
80°C
Figure 4 — No-load power dissipation vs. VPRI_DC
99
98
97
96
95
94
93
92
91
90
89
88
20
Case Temperature (ºC)
64
56
48
40
32
24
16
8
0
0.0
3.5
7.0
10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0
260V
Figure 8 — Efficiency at TCASE = 25°C
400V
3.5
7.0
10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0
Load Current (A)
Load Current (A)
VPRI :
0.0
VPRI :
410V
260V
400V
Figure 9 — Power dissipation at TCASE = 25°C
BCM® Bus Converter
Rev 1.6
Page 18 of 30 05/2019
410V
BCM6123xD1E5135yzz
Application Characteristics (Cont.)
99
72
98
64
Power Dissipation (W)
PRI to SEC, Efficiency (%)
Temperature controlled via top-side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the
forward direction (primary side to secondary side). See associated figures for general trend data.
97
96
95
94
93
92
91
90
56
48
40
32
24
16
8
0
0.0
3.5
7.0
10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0
0.0
3.5
7.0
Secondary Output Current (A)
260V
400V
VPRI :
410V
PRI to SEC, Output Resistance (mΩ)
50
40
30
20
10
0
-40
-20
0
20
40
60
80
100
Case Temperature (°C)
ISEC_OUT:
260V
400V
410V
Figure 11 — Power dissipation at TCASE = 80°C
Figure 10 — Efficiency at TCASE = 80°C
Secondary Output Voltage Ripple (mV)
VPRI :
10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0
Secondary Output Current (A)
250
200
150
100
50
0
0.0
3.5
7.0
10.5 14.0 17.5 21.0 24.5 28.0 31.5 35.0
Secondary Output Current (A)
VPRI:
35A
Figure 12 — RSEC vs. temperature; nominal VPRI_DC
ISEC_DC = 24A at TCASE = 80°C
300
400V
Figure 13 — VSEC_OUT_PP vs. ISEC_DC ; no external CSEC_OUT_EXT.
Board-mounted module, scope setting:
20MHz analog BW
Figure 14 — Full-load secondary voltage and primary current
ripple, 2.2µF CPRI_IN_EXT; no external CSEC_OUT_EXT.
Board-mounted module, scope setting:
20MHz analog BW
BCM® Bus Converter
Rev 1.6
Page 19 of 30 05/2019
BCM6123xD1E5135yzz
Application Characteristics (Cont.)
Temperature controlled via top-side cold plate, unless otherwise noted. All data presented in this section are collected from units processing power in the
forward direction (primary side to secondary side). See associated figures for general trend data.
Figure 15 — 0 – 35A transient response:
CPRI_IN_EXT = 2.2µF, no external CSEC_OUT_EXT
Figure 16 — 35 – 0A transient response:
CPRI_IN_EXT = 2.2µF, no external CSEC_OUT_EXT
Figure 17 — Start up from application of VPRI_DC = 400V,
50% ISEC_OUT_DC, 100% CSEC_OUT_EXT
Figure 18 — Start up from application of EN with pre-applied
VPRI_DC = 400V, 50% ISEC_OUT_DC, 100% CSEC_OUT_EXT
BCM® Bus Converter
Rev 1.6
Page 20 of 30 05/2019
BCM6123xD1E5135yzz
General Characteristics
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade). All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions Notes
Min
Typ
Max
Unit
Mechanical
Length
L
62.96 [2.479]
63.34 [2.494]
63.72 [2.509]
mm [in]
Width
W
22.67 [0.893]
22.80 [0.898]
22.93 [0.903]
mm [in]
Height
H
7.11 [0.280]
7.21 [0.284]
7.31 [0.288]
mm [in]
Volume
Vol
Weight
W
Lead Finish
Without heatsink
cm3 [in3]
10.41 [0.636]
41 [1.45]
g [oz]
Nickel
0.51
2.03
Palladium
0.02
0.15
Gold
0.003
0.051
BCM6123xD1E5135yzz (T-Grade)
–40
125
°C
BCM6123xD1E5135yzz (M-Grade)
–55
125
°C
µm
Thermal
Operating Temperature
Thermal Resistance Top Side
Thermal Resistance Leads
Thermal Resistance Bottom Side
TINTERNAL
θINT-TOP
θINT-LEADS
θINT-BOTTOM
Estimated thermal resistance to maximum
temperature internal component from
isothermal top
1.3
°C/W
Estimated thermal resistance to
maximum temperature internal
component from isothermal leads
5.6
°C/W
Estimated thermal resistance to
maximum temperature internal
component from isothermal bottom
1.3
°C/W
34
Ws/°C
Thermal Capacity
Assembly
BCM6123xD1E5135yzz (T-Grade)
–55
125
°C
BCM6123xD1E5135yzz (M-Grade)
–65
125
°C
Storage Temperature
ESD Withstand
ESDHBM
Human Body Model, “ESDA JEDEC JDS-001-2012” Class I-C (1kV to < 2kV)
ESDCDM
Charge Device Model, “JESD 22-C101-E” Class II (200V to < 500V)
BCM® Bus Converter
Rev 1.6
Page 21 of 30 05/2019
BCM6123xD1E5135yzz
General Characteristics (Cont.)
Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TINTERNAL ≤ 125°C (T-Grade); All other specifications are at TINTERNAL = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
135
°C
Soldering [e]
Peak Temperature Top Case
Safety
Isolation Voltage / Dielectric Test
VHIPOT
PRIMARY to SECONDARY
4,242
PRIMARY to CASE
2,121
SECONDARY to CASE
2,121
Isolation Capacitance
CPRI_SEC
Unpowered Unit
620
Insulation Resistance
RPRI_SEC
At 500VDC
10
MTBF
VDC
780
MΩ
3.53
MHrs
Telcordia Issue 2 - Method I Case III; 25°C
Ground Benign, Controlled
3.90
MHrs
cURus UL 60950-1
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
Previous Part Numbers
BCM400x500y1K8A3z
BCM400x500y1K8A31
[e]
pF
MIL-HDBK-217Plus Parts Count - 25°C
Ground Benign, Stationary, Indoors /
Computer
cTÜVus EN 60950-1
Agency Approvals / Standards
940
Product is not intended for reflow solder attach.
BCM® Bus Converter
Rev 1.6
Page 22 of 30 05/2019
BCM6123xD1E5135yzz
PMBus® System Diagram
-OUT
BCM
SER-OUT
-IN BCM
PRI-OUT-B
PRI-IN-C
PRI-COM
SEC-IN-B
SEC-OUT-C
TX D 1 ’
RXD1
SEC-COM
RXD4
VDDB
RXD3
VDD
RXD2
NC
D44TL1A0
RXD1
VDD
5V EXT
TXD4
NC
NC
TXD3
SSTOP
3 kΩ
SDA
SEC-IN-A
NC
PRI-OUT-A
SDA
NC
SER-IN
SCL
BCM EN
NC
Digital Isolator
SGND
SCL
3 kΩ
VDD
CP
D
Q
SGND
VCC
D
Flip-flop
NC
SADDR
NC
NC
TXD1
TXD2
74LVC1G74DC
10 kΩ
FDG6318P
R2
10 kΩ
EN Control
3.3V, at least 20mA
when using 4xDISO
Ref to Digital Isolator
datasheet for more details
SD
RD
Q
SDA
SCL
Host
µc
PMBus
R1
SGND
The PMBus communication enabled bus converter provides accurate telemetry monitoring and reporting, threshold and warning
limits adjustment, in addition to corresponding status flags.
The BCM internal µC is referenced to primary ground. The Digital Isolator allows UART communication interface with the host Digital
Supervisor at typical speed of 750kHz across the isolation barrier. One of the advantages of the Digital Isolator is its low power
consumption. Each transmission channel is able to draw its internal bias circuitry directly from the input signal being transmitted to
the output with minimal to no signal distortion.
The Digital Supervisor provides the host system µC with access to an array of up to four BCMs. This array is constantly polled for
status by the Digital Supervisor. Direct communication to individual BCM is enabled by a page command. For example, the page
(0x00) prior to a telemetry inquiry points to the Digital Supervisor data and pages (0x01 – 0x04) prior to a telemetry inquiry points to
the array of BCMs connected data. The Digital Supervisor constantly polls the BCM data through the UART interface.
The Digital Supervisor enables the PMBus-compatible host interface with an operating bus speed of up to 400kHz. The Digital
Supervisor follows the PMBus command structure and specification.
Please refer to the Digital Supervisor data sheet for more details.
BCM® Bus Converter
Rev 1.6
Page 23 of 30 05/2019
BCM6123xD1E5135yzz
BCM in a ChiP™
LPRI_IN_LEADS
6.7nH
+
CPRI_INT_ESR
21.5mΩ
CPRI_INT
0.37µF
VPRI
IPRI_Q
25.8mA
+
+
–
–
K
RSEC
24.2mΩ
LSEC_OUT_LEADS
1.3nH
+
CSEC_INT_ESR
510µΩ
139mΩ
V•I
1/8 • ISEC
LPRI_INT
0.56µH
–
1.77nH
ISEC
1/8 • VPRI
CSEC_INT
25.6µF
VSEC
–
Figure 19 — BCM AC model
The BCM uses a high-frequency resonant tank to move energy
from primary to secondary and vice versa. The resonant LC tank,
operated at high frequency, is amplitude modulated as a function
of the primary voltage and the secondary current. A small amount
of capacitance embedded in the primary and secondary stages of
the module is sufficient for full functionality and is key to achieving
high power density.
The effective DC voltage transformer action provides additional
interesting attributes. Assuming that RSEC = 0Ω and
IPRI_Q = 0A, Equation 3 now becomes Equation 1 and is essentially
load independent, resistor R is now placed in series with VPRI.
The BCM6123xD1E5135yzz can be simplified into the model
shown in Figure 19.
R
At no load:
VPRI
VSEC = VPRI • K
VSEC
The relationship between VPRI and VSEC becomes:
VSEC = (VPRI – IPRI • R) • K
In the presence of a load, VSEC is represented by:
VSEC = VPRI • K – ISEC • RSEC
(3)
ISEC =
K
VSEC = VPRI • K – ISEC • R • K2
(4)
RSEC represents the impedance of the BCM, and is a function of
the RDS_ON of the primary and secondary MOSFETs and the winding
resistance of the power transformer. IPRI_Q represents the quiescent
current of the BCM controller, gate drive circuitry and core losses.
(5)
Substituting the simplified version of Equation 4
(IPRI_Q is assumed = 0A) into Equation 5 yields:
and ISEC is represented by:
IPRI – IPRI_Q
VSEC
Figure 20 — K = 1/8 BCM with series primary resistor
(2)
VPRI
BCM
K = 1/8
(1)
K represents the “turns ratio” of the BCM.
Rearranging Equation 1:
K=
+
–
(6)
This is similar in form to Equation 3, where RSEC is used to represent
the characteristic impedance of the BCM. However, in this case a
real resistor, R on the primary side of the BCM is effectively scaled
by K 2 with respect to the secondary.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 16mΩ, with K = 1/8.
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Rev 1.6
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BCM6123xD1E5135yzz
A similar exercise can be performed with the additon of a capacitor
or shunt impedance at the primary of the BCM. A switch in series
with VPRI is added to the circuit. This is depicted in Figure 21.
S
VPRI
+
–
C
BCM
K = 1/8
VSEC
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables the use of small
magnetic components because magnetizing currents remain low.
Small magnetics mean small path lengths for turns. Use of low-loss
core material at high frequencies also reduces core losses.
Figure 21 — BCM with primary capacitor
A change in VPRI with the switch closed would result in a change in
capacitor current according to the following equation:
IC (t) = C
dVPRI
(7)
dt
Assume that with the capacitor charged to VPRI, the switch is
opened and the capacitor is discharged through the idealized
BCM. In this case,
IC = ISEC • K
Low impedance is a key requirement for powering a high‑current,
low-voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a BCM
between the regulation stage and the point of load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, these benefits are
not achieved if the series impedance of the BCM is too high. The
impedance of the BCM must be low, i.e., well beyond the crossover
frequency of the system.
The two main terms of power loss in the BCM are:
nn
No load power dissipation (PPRI_NL): defined as the power
used to power up the module with an enabled powertrain
at no load.
nn
Resistive loss (PRSEC): refers to the power loss across
the BCM modeled as pure resistive impedance.
PDISSIPATED = PPRI_NL + PR
(8)
Therefore,
PSEC_OUT = PPRI_IN – PDISSIPATED = PPRI_IN – PPRI_NL – PR
SEC
substituting Equation 1 and 8 into Equation 7 reveals:
ISEC(t) =
C
K2
•
dVSEC
dt
(10)
SEC
(9)
(11)
The above relations can be combined to calculate the overall
module efficiency:
The equation in terms of the secondary has yielded a K 2 scaling
factor for C, specified in the denominator of the equation.
A K factor less than unity results in an effectively larger capacitance
on the secondary when expressed in terms of the primary. With
K = 1/8 as shown in Figure 21, C = 1µF would appear as
C = 64µF when viewed from the secondary.
η=
=
PSEC_OUT
PPRI_IN
PPRI_IN – PPRI_NL – PR
PPRI_IN
SEC
VPRI • IPRI – PPRI_NL – (ISEC)2 • RSEC
=1–
BCM® Bus Converter
Rev 1.6
Page 25 of 30 05/2019
=
VPRI • IPRI
(
)
PPRI_NL + (ISEC)2 • RSEC
VPRI • IPRI
(12)
BCM6123xD1E5135yzz
Input and Output Filter Design
Thermal Considerations
A major advantage of BCM systems versus conventional PWM
converters is that the transformer based BCM does not require
external filtering to function properly. The resonant LC tank,
operated at extreme high frequency, is amplitude modulated as a
function of primary voltage and secondary current and efficiently
transfers charge through the isolation transformer. A small amount
of capacitance embedded in the primary and secondary stages
of the module is sufficient for full functionality and is key to
achieving power density.
The ChiP™ module provides a high degree of flexibility in that
it presents three pathways to remove heat from the internal
power‑dissipating components. Heat may be removed from the
top surface, the bottom surface and the leads. The extent to which
these three surfaces are cooled is a key component in determining
the maximum current that is available from a ChiP, as can be
seen from Figure 1.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
nn
Guarantee low source impedance:
To take full advantage of the BCM’s dynamic response, the
impedance presented to its primary terminals must be low from
DC to approximately 5MHz. The connection of the bus converter
module to its power source should be implemented with minimal
distribution inductance. If the interconnect inductance exceeds
100nH, the input should be bypassed with a RC damper to
retain low source impedance and stable operation. With an
interconnect inductance of 200nH, the RC damper may be as
high as 1µF in series with 0.3Ω. A single electrolytic or equivalent
low-Q capacitor may be used in place of the series RC bypass.
Since the ChiP has a maximum internal temperature rating, it
is necessary to estimate this internal temperature based on a
system-level thermal solution. Given that there are three pathways
to remove heat from the ChiP, it is helpful to simplify the thermal
solution into a roughly equivalent circuit where power dissipation
is modeled as a current source, isothermal surface temperatures
are represented as voltage sources and the thermal resistances are
represented as resistors. Figure 22 shows the “thermal circuit” for a
BCM6123 ChiP in an application where the top, bottom, and leads
are cooled. In this case, the BCM power dissipation is PDTOTAL and
the three surface temperatures are represented as TCASE_TOP,
TCASE_BOTTOM, and TLEADS. This thermal system can now be very
easily analyzed using a SPICE simulator with simple resistors,
voltage sources, and a current source. The results of the simulation
provide an estimate of heat flow through the various dissipation
pathways as well as internal temperature.
nn
Further reduce primary and/or secondary voltage ripple
without sacrificing dynamic response:
Thermal Resistance
Top
θINT-TOP
Given the wide bandwidth of the module, the source response
is generally the limiting factor in the overall system response.
Anomalies in the response of the primary source will appear at
the secondary of the module multiplied by its K factor.
Thermal Resistance
Bottom
θINT-BOTTOM
Power Dissipation
(W)
nn
Protect the module from overvoltage transients imposed
by the system that would exceed maximum ratings and
induce stresses:
The module primary/secondary voltage ranges shall not be
exceeded. An internal overvoltage lockout function prevents
operation outside of the normal operating primary range. Even
when disabled, the powertrain is exposed to the applied voltage
and the power MOSFETs must withstand it.
CSEC_EXT =
CPRI_EXT
K2
TCASE_BOTTOM(°C)
+
–
Thermal Resistance
Leads
θINT-LEADS
TLEADS(°C)
+
–
TCASE_TOP(°C)
+
–
Figure 22 — Top case, bottom case and leads thermal model
Alternatively, equations can be written around this circuit and
analyzed algebraically:
TINT – PD1 • θINT-TOP = TCASE_TOP
Total load capacitance at the secondary of the BCM shall not
exceed the specified maximum. Owing to the wide bandwidth and
low secondary impedance of the module, low-frequency bypass
capacitance and significant energy storage may be more densely
and efficiently provided by adding capacitance at the primary of
the module. At frequencies VPRI_UVLO+_R must be applied first to
allow the primary reference controller and power train to start.
Continuous operation in reverse is then possible after a
successful start up.
nn
A dedicated input filter for each BCM in an array is required to
prevent circulating currents.
For further details see:
AN:016 Using BCM Bus Converters in High Power Arrays.
BCM® Bus Converter
Rev 1.6
Page 27 of 30 05/2019
BCM6123xD1E5135yzz
BCM Through-Hole Package Mechanical Drawing and Recommended Land Pattern
63.34±.38
2.494±.015
11.43
.450
31.67
1.247
0
1.52
.060
(2) PL.
11.40
.449
0
22.80±.13
.898±.005
0
1.52
.060
(4) PL.
0
1.02
.040
(3) PL.
TOP VIEW (COMPONENT SIDE)
.05 [.002]
SEATING
7.21±.10
.284±.004
.
PLANE
.41
.016
(9) PL.
30.91
1.217
0
30.91
1.217
4.17
.164
(9) PL.
8.25
.325
2.75
.108
2.75
.108
8.00
.315
0
0
1.38
.054
1.38
.054
4.13
.162
8.00
.315
0
8.25
.325
BOTTOM VIEW
0
8.00±.08
.315±.003
4.13±.08
.162±.003
1.38±.08
.054±.003
8.00±.08
.315±.003
+VPRI
0
-VSEC
TM / SER-OUT
0
EN
VAUX / SER-IN
-VPRI
2.03
.080
PLATED THRU
.25 [.010]
ANNULAR RING
(2) PL.
8.25±.08
.325±.003
+VSEC
2.75±.08
.108±.003
-VSEC
8.25±.08
.325±.003
RECOMMENDED HOLE PATTERN
(COMPONENT SIDE)
NOTES:
1- RoHS COMPLIANT PER CST-0001 LATEST REVISION.
2- UNLESS OTHERWISE SPECIFIED DIMENSIONS ARE MM / [INCH]
BCM® Bus Converter
Rev 1.6
Page 28 of 30 05/2019
2.75±.08
.108±.003
+VSEC
0
1.38±.08
.054±.003
30.91±.08
1.217±.003
30.91±.08
1.217±.003
1.52
.060
PLATED THRU
.25 [.010]
ANNULAR RING
(3) PL.
2.03
.080
PLATED THRU
.38 [.015]
ANNULAR RING
(4) PL.
BCM6123xD1E5135yzz
Revision History
Revision
Date
Description
1.0
08/4/16
Release of current data sheet with new part number
1.1
01/16/17
Updated the output resistance in the reverse direction
1.2
08/04/17
Updated height specification
1, 21, 28
1.3
09/15/17
Updated volume specification
21
1.4
10/10/17
Updated secondary to primary output resistance
9
1.5
07/16/18
Implemented content improvements
Added 3-phase typical application
Made typo corrections to figures 14 –16
1.6
05/01/19
Updated ambient temperature efficiency specifications
BCM® Bus Converter
Rev 1.6
Page 29 of 30 05/2019
Page Number(s)
n/a
9
All
3
19 – 20
6, 9
BCM6123xD1E5135yzz
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BCM® Bus Converter
Rev 1.6
Page 30 of 30 05/2019
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