DCM™ in a VIA™ Package
DC-DC Converter
DCM5614xD0H36K3yzz
Isolated Regulated DC Converter
Features & Benefits
Product Ratings
• Isolated, regulated DC-DC converter
• Up to 1300W, 46.43A continuous
• 96% peak efficiency
•
451W/in3
VIN = 270V (180 – 400V)
POUT = 1300W
VOUT = 28V (22 – 36V)
(NO LOAD)
IOUT = 46.43A
power density
• Wide input range 180 – 400VDC
Product Description
• Safety Extra Low Voltage (SELV) 28V nominal output
The DCM in a VIA package (270 – 28V) is a high-power,
high‑efficiency DC-DC converter, operating from a 180 – 400VDC
primary source to deliver an isolated, regulated, 28V nominal,
Safety Extra Low Voltage (SELV) secondary output. This low‑profile
module, available in chassis- or PCB-mount form-factors,
incorporates a DC-DC converter, inrush protection and optional
analog or digital communication. The DCM offers low noise, fast
transient response and high efficiency and power density. The
optional secondary referenced PMBus-compatible telemetry and
control interface provides access to the DCM’s internal controller
configuration, fault monitoring and other telemetry functions.
Leveraging the thermal management and power benefits of VIA
packaging technology, the DCM module offers flexible mechanical
mounting options with low top- and bottom-side thermal
resistances. When combined with downstream regulators and PoL
current multipliers, the DCM enables power system architects to
achieve power-system solutions with outstanding performance
metrics and low total cost.
• 2121VDC isolation
• ZVS, ZCS high-frequency switching
Enables low-profile, high-density filtering
• OV, OC, UV, short circuit and thermal protection
• Fully operational current limit
• Available in chassis-mount and through-hole VIA package
5.57 x 1.40 x 0.37in
[141.43 x 35.54 x 9.40mm]
• PMBus® management or analog control interface
Typical Applications
• Defense
• Aerospace
• Communications Systems
Size:
5.57 x 1.40 x 0.37in
[141.43 x 35.54 x 9.40mm]
Note: Product images may not highlight current product markings.
DCM™ in a VIA™ Package
Page 1 of 40
Rev 1.0
03/2020
DCM5614xD0H36K3yzz
Typical Applications
Auxiliary
Supply Input
DCM in a VIA Package
F1
+IN
+OUT
VDDE
EN
TR
NC
NC
VIN
CIN_EXT
–IN
SW1
RTR
COUT_EXT
Load
–OUT
ISOLATION BOUNDARY
DCM5614xD0H36K3yzz at point-of-load
Auxiliary
Supply Input
DCM in a VIA Package
F1
+IN
+OUT
VDDE
SCL
SDA
SGND
ADDR
VIN
CIN_EXT
–IN
–OUT
RADDR
CLK
DATA
SGND
DCM5614xD0H36K3yzz at point-of-load, connection to PMBus®
DCM™ in a VIA™ Package
Page 2 of 40
Rev 1.0
03/2020
Load
GROUND
DATA
CLOCK
ISOLATION BOUNDARY
COUT_EXT
Host PMBus
DCM5614xD0H36K3yzz
Pin Configuration
TOP VIEW
1
3
5
6
7
8
9
4
2
DCM in a VIA package - Chassis Mount
TOP VIEW
2
4
9
8
7
6
5
3
1
DCM in a VIA package - PCB Mount
Pin Descriptions
Power Pins
Pin Number
Signal Name
Type
Function
1
+IN
INPUT POWER
Positive input power terminal
2
–IN
INPUT POWER RETURN
Negative input power terminal
3
+OUT
OUTPUT POWER
Positive output power terminal
4
–OUT
OUTPUT POWER RETURN
Negative output power terminal
Pin Number
Signal Name
Type
5
VDDE
INPUT
External power supply for internal controller
6
EN
INPUT
Enables and disables DCM. Needs VDDE pre-applied
7
TR
INPUT
Enables and disables trim functionality, adjusts output voltage when trim active
8
NC
–
No connection
9
NC
–
No connection
Analog Control Signal Pins
Function
PMBus® Control Signal Pins
Pin Number
Signal Name
Type
5
VDDE
INPUT
External power supply for internal controller
6
SCL
INPUT
I2C™ Clock, PMBus compatible
7
SDA
INPUT / OUTPUT
8
SGND
LOW-SIDE SIGNAL RETURN
9
ADDR
INPUT
DCM™ in a VIA™ Package
Page 3 of 40
Function
I2C Data, PMBus compatible
Signal ground
Address assignment, resistor based
Rev 1.0
03/2020
DCM5614xD0H36K3yzz
Part Ordering Information
Part Number
Package Type
DCM5614VD0H36K3T01
Product Grade
Option Field
01 = Chassis/Analog
V = Chassis VIA
DCM5614VD0H36K3T02
02 = Chassis/PMBus®
DCM5614BD0H36K3T05
05 = Short Pin/Analog
T = –40 to 100°C [a]
DCM5614BD0H36K3T06
06 = Short Pin/PMBus
B = Board VIA
DCM5614BD0H36K3T09
09 = Long Pin/Analog
10 = Long Pin/PMBus
DCM5614BD0H36K3T10
[a]
High-temperature power de-rating may apply; see Figure 1, specified thermal operating area.
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Electrical specifications do not apply when operating beyond rated operating conditions.
Parameter
Comments
Input Voltage (+IN to –IN)
Min
Max
Unit
–0.5
460
V
1
V/µs
–0.3
12
V
–0.5
3.6
V
–0.5
3.6
V
–0.3
5.5
V
–0.3
5.5
V
–0.3
3.6
V
60
V
Input Voltage Slew Rate
VDDE to SGND
TR to –OUT
Analog interface models only
EN to –OUT
SCL to SGND
PMBus®
SDA to SGND
interface models only
ADDR to SGND
Output Voltage (+OUT to –OUT)
Dielectric Withstand
(Input to Output)
[b]
Internal Operating Temperature
T-Grade
–40
125
°C
Storage Temperature
T-Grade
–40
125
°C
2121
VDC
The absolute maximum rating listed above for Dielectric withstand (input to output) refers to the VIA package. The internal safety approved isolating
component (ChiP™) provides reinforced insulation (4242V) from the input to output. However, the VIA package itself can only be tested at a basic isolation
value (2121V).
1400
40
1200
Output Voltage (V)
Maximum Output Power (W)
[b]
See comment below
1000
800
600
400
200
0
10
20
30
40
50
60
70
80
90
100
25
20
5
Case Temperature (ºC)
10
15
20
25
30
35
40
45
Output Current (A)
Non-Pin-Side Surface at Temperature
Pin-Side and Non-Pin-Side Surfaces at Temperature
DCM™ in a VIA™ Package
Page 4 of 40
30
15
110
Figure 1 — Thermal specified operating area: max output power vs.
case temp, module at minimum full load efficiency
35
Low Trim
Nominal Trim
Figure 2 — Electrical specified operating area
Rev 1.0
03/2020
High Trim
50
DCM5614xD0H36K3yzz
Electrical Specifications
Specifications apply over all line and load conditions, internal temperature TINT = 25°C, unless otherwise noted. Boldface specifications apply over the
temperature range specified by the product grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
180
270
400
V
12
A
Power Input Specifications
Input Voltage Range
VIN
Continuous operation
Inrush Current (Peak)
IINRP
With maximum COUT-EXT, full resistive load
Input Capacitance (Internal)
CIN-INT
Effective value at nominal input voltage
1.2
µF
Input Capacitance (Internal) ESR
RCIN-INT
At 1MHz
0.86
mΩ
Input Voltage
Initialization Threshold
VIN-INIT
Threshold to start tINIT delay
100
V
No-Load Specifications
Input Power – Disabled
PQ
Input Power – Enabled with
No Load
PNL
DCM™ in a VIA™ Package
Page 5 of 40
Nominal line, see Figure 3
1.6
Nominal line, see Figure 4
Worst case line, see Figure 4
Rev 1.0
03/2020
1.8
2.4
Worst case line, see Figure 3
13
22
27
W
W
DCM5614xD0H36K3yzz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, internal temperature TINT = 25°C, unless otherwise noted. Boldface specifications apply over the
temperature range specified by the product grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
27.72
28
28.28
V
28
36
V
2
%
1300
W
46.43
A
Power Output Specifications
Output Voltage Set Point
Rated Output Voltage Trim Range
Output Voltage Accuracy
VOUT-NOM
VIN = 270V, nominal trim, at no load
VOUT-TRIMMING
Trim range at no load;
Specifies the low, nominal and high trim conditions
22
%VOUT-ACCURACY
The total output voltage set-point accuracy from the
calculated ideal VOUT based on load and trim;
Applies over all line, load and trim conditions
–2
Rated Output Power
POUT
Continuous, VOUT ≥ 28.0V
Rated Output Current
IOUT
Continuous, VOUT ≤ 28.0V
Efficiency
Output Voltage Ripple
η
VOUT-PP
Switching Frequency,
Input Stage
FRPL-IN
Switching Frequency,
Output Stage
Full load, nominal line, nominal trim
92.7
Full load, over line and temperature, nominal trim
90.8
50% load, over rated line, temperature and trim
89.5
VIN = 270V, VOUT = 28V, IOUT = 46.43A,
COUT-EXT = 0μF, 20MHz BW
93.7
%
70
Nominal line, nominal trim, full rated load,
TCASE = 25°C
mV
0.64
Over all line, load, trim, exclusive of
burst‑mode operation
0.3
FRPL-OUT
Over all line, load and trim
0.9
Output Capacitance (Internal)
COUT-INT
Effective value at nominal output voltage
56.7
µF
Output Capacitance (Internal) ESR
RCOUT-INT
At 1MHz
0.18
mΩ
COUT-EXT
All line, 22V ≤ VOUT ≤ 28V, no load;
Excessive capacitance may drive module into fault
protection; see Figure 16.
Rated Output Capacitance
(External)
Equivalent Output Resistance
Initialization Delay
ROUT
0.7
0.95
MHz
0.99
0.75
VIN = 270V, nominal trim, at full load, TCASE = –40°C
10
18
28
VIN = 270V, nominal trim, at full load, TCASE = 25°C
12
20
30
VIN = 270V, nominal trim, at full load, TCASE = 75°C
12
25
32
F
mΩ
tINIT
See state diagram
7
ms
Output Turn-On Delay
tON
From rising edge EN or acknowledgement of
OPERATION command with VIN pre-applied;
See timing diagram
25
ms
Output Turn-Off Delay
tOFF
From falling edge EN or acknowledgement of
OPERATION command. See timing diagram.
Soft-Start Ramp Time
tSS
Output Current at Start Up
Monotonic Soft-Start
Threshold Voltage
Minimum Required
Disabled Duration
Minimum Required Disabled
Duration for Predictable Restart
Voltage Deviation (Transient)
Settling Time
DCM™ in a VIA™ Package
Page 6 of 40
IOUT-START
VOUT-MONOTONIC
tOFF-MIN
tOFF-MONOTONIC
%VOUT-TRANS
tSETTLE
1
At full rated resistive load, COUT-EXT = 0µF
200
At full rated load and COUT-EXT
1000
Max load current at start up
46.43
Output voltage rise becomes monotonic with 10% of
preload once it crosses VOUT-MONOTONIC
Refers to the minimum time a module must be in the
disabled state before it will attempt to start via EN or
OPERATION command
Refers to the minimum time a module must be
in the disabled state before it is guaranteed to
exhibit monotonic soft start and have predictable
start‑up timing
No COUT-EXT (10 ↔ 90% load step),
excluding load line
Rev 1.0
03/2020
4
300
ms
ms
A
V
ms
2.5
s
VIN_UVLO+
Attribute
Output Voltage Trim
Constant-Current
Threshold
PMBus Command
Conditions / Notes
(21h) VOUT_COMMAND
(E8h) MFR_CONSTANT_CURRENT
DCM™ in a VIA™ Package
Page 9 of 40
Applied values greater than 105%
disable constant current limit
operation and command will return
a value of 130%
Rev 1.0
03/2020
Accuracy
(Rated Range)
Functional
Reporting
Range
Default
Value
±2% (Full Range)
22 – 36V
28V
±20% (0 – 25% of FL)
±5% (25 – 105% of FL)
0 – 105%
130%
105%
DCM5614xD0H36K3yzz
PMBus® Control Signal Characteristics
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25°C, unless otherwise noted. Boldface specifications apply over the
temperature range specified by the product grade.
Please note: for chassis mount models, Vicor part number 42550 will be needed for applications requiring the use of the signal pins. Signal cable 42550 is
rated for up to 5 insertions and extractions. To avoid unnecessary stress on the connector, the cable should be appropriately strain relieved.
VDDE
• VDDE powers the internal controller.
• VDDE needs to be pre-applied before VIN in order to activate OPERATION command functionalities
• If not pre-applied, VDDE is derived from VOUT; however, in this case, the OPERATION command function is not activated (the unit is always enabled and
can be disabled only by removing VIN).
Signal Type
Power Input
State
Any
Attribute
Symbol
Power Input
for Internal Controller
VVDDE
VDDE Current Consumption
Start Up
Turn-On Time
Conditions / Notes
Min
Typ
Max
Unit
4
5
10
V
35
50
mA
IVDDE
tVDDE-ON
From VVDDE-MIN to PMBus active
1.5
ms
Signal Ground: SGND
• All PMBus interface signals (SCL, SDA, ADDR) are referenced to SGND pin.
• SGND pin also serves as return pin (ground pin) for VDDE.
• SGND pin and low-voltage‑side power‑return terminal (–OUT) are common.
To avoid noise interference, keep SGND signal separated from –OUT in electrical design.
Serial Address (PMBus Address): ADDR
• This pin programs the address using a resistor between ADDR pin and signal ground.
• The address is sampled during start up and is stored until power is reset. This pin programs only a fixed and persistent address.
• This pin has an internal 10kΩ pull-up resistor to 3.3V VCC.
• 16 addresses are available. The range of each address nominally 206.25mV (total range for all 16 addresses is 0 – 3.3V).
Signal Type
Multi-Level
Input
State
Regular
Operation
Start Up
Attribute
Symbol
Conditions / Notes
ADDR Input Voltage
VSADDR
ADDR Leakage Current
ISADDR
Leakage current
ADDR Registration Time
tSADDR
From VVDDE_MIN
DCM™ in a VIA™ Package
Rev 1.0
Page 10 of 40 03/2020
Min
Typ
0
1
Max
Unit
3.3
V
1
µA
ms
DCM5614xD0H36K3yzz
PMBus® Control Signal Characteristics (Cont.)
Specifications apply over all line, trim and load conditions, internal temperature TINT = 25°C, unless otherwise noted. Boldface specifications apply over the
temperature range specified by the product grade.
Please note: for chassis mount models, Vicor part number 42550 will be needed for applications requiring the use of the signal pins. Signal cable 42550 is
rated for up to 5 insertions and extractions. To avoid unnecessary stress on the connector, the cable should be appropriately strain relieved.
Serial Clock Input (PMBus Clock) and Serial Data (PMBus Data): SCL, SDA
• High-power SMBus specification physical layer compatible. Note that optional SMBALERT# is signal not supported.
• PMBus command compatible.
Signal Type
State
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Electrical Parameters
VIH
Input Voltage Threshold
2.3
VIL
1
VOH
Output Voltage Threshold
2.8
VOL
Leakage Current
ILEAK-PIN
Signal Sink Current
ILOAD
Signal Capacitive Load
Cl
Signal Noise Immunity
VNOISE-PP
V
Unpowered device
–10
VOL = 0.4V
V
0.5
V
10
µA
4
Total capacitive load of one pin
mA
10
10 – 100MHz
300
Idle state = 0Hz
10
V
pF
mV
Timing Parameters
Digital
Input / Output
Regular
Operation
Operating Frequency
FSMB
Free Time Between Stop and
Start Condition
tBUF
First clock is generated after
this hold time
1.3
µs
0.6
µs
tHD:STA
Repeat Start Condition
Set-Up Time
tSU:STA
0.6
µs
Stop Condition Set-Up Time
tSU:STO
0.6
µs
Data Hold Time
tHD:DAT
300
ns
Data Set-Up Time
tSU:DAT
100
ns
Clock Low Time-Out
tTIMEOUT
25
Clock Low Period
tLOW
1.3
Clock High Period
tHIGH
0.6
35
ms
µs
50
µs
25
ms
Cumulative Clock Low
Extend Time
tLOW:SEXT
Clock or Data Fall Time
tF
20
300
ns
Clock or data rise time
tR
20
300
ns
tLOW tR
tF
VIH
VIL
tHD,STA
SDA
P
kHz
Hold Time After Start or
Repeated Start Condition
SCL
VIH
VIL
400
tBUF
tHD,DAT
tHIGH
tSU,DAT
S
DCM™ in a VIA™ Package
Rev 1.0
Page 11 of 40 03/2020
tSU,STA
tSU,STO
S
P
DCM5614xD0H36K3yzz
Timing Diagrams – Analog Interface Version
tOFF
DCM™ in a VIA™ Package
Rev 1.0
Page 12 of 40 03/2020
ILOAD
FULL LOAD
Output
IOUT
VOUT
VOUT-UVP
VOUT-NOM
TR
VTR-DIS
Input
EN
VIN
VIN-UVLO+/–
VIN-INIT
VIN-OVLO+/–
tINIT
tON
1
Input Power On
– Trim Inactive
tSS
2
Ramp to
Full Load
3
TR
Ignored
4
EN
Low
tMIN_OFF
5
EN
High
tSS
tON
6
Input
OVLO
tOVLO
tSS
7
Input
UVLO
tUVLO
tSS
tOFF
8
Input
Returned
to Zero
Module inputs are shown in blue; module outputs are shown in brown. Timing diagrams assume VDDE pre-applied. Without VDDE pre-applied, EN is ignored,
EN and TR will go high after VOUT. All other behaviors (OVLO, UVLO, OVP, etc.) will remain the same.
DCM™ in a VIA™ Package
Rev 1.0
Page 13 of 40 03/2020
Output
Input
IOUT
FULL LOAD
IOUT
VOUT
VOUT-UVP
VOUT-NOM
TR
VTR = Nom
VTR-EN
EN
VIN
VIN-UVLO+/–
VIN-INIT
VIN-OVLO+/–
tINIT
tON
9
Input Power On
– Trim active
tSS
VOUT-OVP
10
VOUT
based on
VTR
tFAULT
tSS
11
Load dump
and reverse
current
12
VOUT OVP
RLOAD
IOUT-CLCC
13
Current Limit
with Resistive
Load
tFAULT
tSS-MAX
tINIT
tON
tSS
15
14
Overload induced
Resistive
Output UVP
Load with
decreasing R
16
Aborted soft start
into overload
DCM5614xD0H36K3yzz
Timing Diagrams – Analog Interface Version (Cont.)
Module inputs are shown in blue; module outputs are shown in brown. Timing diagrams assume VDDE pre-applied. Without VDDE pre-applied, EN is ignored,
EN and TR will go high after VOUT. All other behaviors (OVLO, UVLO, OVP, etc.) will remain the same.
DCM5614xD0H36K3yzz
Application Characteristics
2.7
20
2.4
18
Power Dissipation (W)
Input Power (W)
Temperature controlled via non-pin-side cold plate, unless otherwise noted. See associated figures for general trend data.
2.1
1.8
1.5
1.2
0.9
0.6
0.3
16
14
12
10
8
6
4
2
0
0
180
180
200 220 240 260 280 300 320 340 360 380 400
200 220 240 260 280 300 320 340 360 380 400
Input Voltage (V)
Input Voltage (V)
TCASE:
–40°C
25°C
Figure 3 — Disabled power dissipation vs. VIN
97
97
96
96
95
95
94
93
92
91
25°C
75°C
94
93
92
91
90
90
180
200 220 240 260 280 300 320 340 360 380 400
180
200 220 240 260 280 300 320 340 360 380 400
Input Voltage (V)
TCASE:
–40°C
25°C
Input Voltage (V)
75°C
Figure 5 — Full-load efficiency vs. VIN at low trim
TCASE:
96
95
94
93
92
91
90
180
200 220 240 260 280 300 320 340 360 380 400
Input Voltage (V)
TCASE:
–40°C
25°C
–40°C
25°C
75°C
Figure 6 — Full-load efficiency vs. VIN at nominal trim
97
Efficiency (%)
–40°C
Figure 4 — No-load power dissipation vs. VIN at nominal trim
Efficiency (%)
Efficiency (%)
TPIN_SIDE_SURFACE_CASE:
75°C
75°C
Figure 7 — Full-load efficiency vs. VIN at high trim
DCM™ in a VIA™ Package
Rev 1.0
Page 14 of 40 03/2020
DCM5614xD0H36K3yzz
Application Characteristics (Cont.)
96
140
94
120
Power Dissipation (W)
Efficiency (%)
Temperature controlled via non-pin-side cold plate, unless otherwise noted. See associated figures for general trend data.
92
90
88
86
84
82
100
80
60
40
20
0
0
4.6
9.3
13.9 18.6 23.2 27.9 32.5 37.1
41.8 46.4
0
4.6
9.3
Load Current (A)
VIN:
180V
270V
400V
VIN:
180V
270V
400V
Figure 9 — Power dissipation vs. load at TCASE = –40°C, nominal trim
96
140
94
120
Power Dissipation (W)
Efficiency (%)
41.8 46.4
Load Current (A)
Figure 8 — Efficiency vs. load at TCASE = –40°C, nominal trim
92
90
88
86
84
82
100
80
60
40
20
0
0
4.6
9.3
13.9 18.6 23.2 27.9 32.5 37.1
41.8 46.4
0
4.6
9.3
Load Current (A)
VIN:
180V
270V
13.9 18.6 23.2 27.9 32.5 37.1
41.8 46.4
Load Current (A)
400V
Figure 10 — Efficiency vs. load at TCASE = 25°C, nominal trim
VIN:
180V
270V
400V
Figure 11 — Power dissipation vs. load at TCASE = 25°C, nominal trim
96
140
94
120
Power Dissipation (W)
Efficiency (%)
13.9 18.6 23.2 27.9 32.5 37.1
92
90
88
86
84
82
100
80
60
40
20
0
0
4.6
9.3
13.9 18.6 23.2 27.9 32.5 37.1
41.8 46.4
0
4.6
Load Current (A)
VIN:
180V
270V
9.3
13.9 18.6 23.2 27.9 32.5 37.1
41.8 46.4
Load Current (A)
400V
Figure 12 — Efficiency vs. load at TCASE = 75°C, nominal trim
VIN:
180V
270V
400V
Figure 13 — Power dissipation vs. load at TCASE = 75°C, nominal trim
DCM™ in a VIA™ Package
Rev 1.0
Page 15 of 40 03/2020
DCM5614xD0H36K3yzz
Application Characteristics (Cont.)
23
3.0
22
2.7
Input Capacitance (µF)
Output Resistance (mΩ)
Temperature controlled via non-pin-side cold plate, unless otherwise noted. See associated figures for general trend data.
21
20
19
18
17
16
–55
–40
–25
–10
5
20
35
50
65
180V
270V
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0
80
Case Temperature (°C)
VIN:
2.4
0
40
80
120
160
200
240
280
320
360
400
Input Voltage (V)
400V
Figure 14 — ROUT vs. temperature at nominal trim
Figure 15 — Effective internal input capacitance vs. VIN
120
CH1
Output Capacitance
(%Rated COUT_EXT)
100
80
CH2
60
40
CH3
20
CH4
0
20
22
24
26
28
30
32
34
36
38
Output Voltage Trim Set Point (V)
Figure 16 — Maximum rated output capacitance COUT-EXT at start up,
over all line, no load
CH1 VIN: 200V/div
CH2 VOUT: 20V/div
CH1
CH2
CH2
CH3
CH3
CH4
CH4
CH3 IIN: 5A/div
CH4 IOUT: 50A/div
CH1 EN: 2V/div
CH2 VOUT: 20V/div
Timebase: 200ms/div
Figure 18 — Input voltage start up, VIN = 270V, VOUT = 28V,
COUT_EXT = 0.5F, RLOAD = 0.6Ω
Timebase: 100ms/div
Figure 17 — Input voltage start up, VIN = 270V, VOUT = 28V,
COUT_EXT = 0F, RLOAD = 0.6Ω
CH1
CH1 VIN: 200V/div
CH2 VOUT: 20V/div
CH3 IIN: 5A/div
CH4 IOUT: 50A/div
CH3 IIN: 5A/div
CH4 IOUT: 50A/div
Timebase: 100ms/div
Figure 19 — Start up from EN, VIN = 270V, VOUT = 28V, COUT_EXT = 0F,
RLOAD = 0.6Ω; analog-interface models only
DCM™ in a VIA™ Package
Rev 1.0
Page 16 of 40 03/2020
DCM5614xD0H36K3yzz
Application Characteristics (Cont.)
Temperature controlled via non-pin-side cold plate, unless otherwise noted. See associated figures for general trend data.
CH1
CH1
CH2
CH1 VOUT: 20mV/div
Timebase: 500ns/div
Figure 20 — Output voltage ripple, VIN = 270V, VOUT = 28V,
COUT_EXT = 0F, RLOAD = 0.6Ω
CH1 VOUT: 1V/div
CH2 IOUT: 20A/div
Figure 21 — 10 – 100% load transient response, VIN = 270V,
nominal trim, COUT_EXT = 0µF
CH1
CH2
CH1 VOUT: 1V/div
CH2 IOUT: 20A/div
Timebase: 100µs/div
Timebase: 100µs/div
Figure 22 — 100 – 10% load transient response, VIN = 270V,
nominal trim, COUT_EXT = 0µF
DCM™ in a VIA™ Package
Rev 1.0
Page 17 of 40 03/2020
DCM5614xD0H36K3yzz
General Characteristics
Specifications apply over all line and load conditions, internal temperature TINT = 25°C, unless otherwise noted. Boldface specifications apply over the
temperature range specified by the product grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical [c]
Length
L
141.18 [5.56]
141.43 [5.57] 141.68 [5.58]
mm [in]
Width
W
35.29 [1.39]
35.54 [1.40]
35.79 [1.41]
mm [in]
Height
H
9.02 [0.355]
9.40 [0.37]
9.78 [0.385]
mm [in]
Volume
Vol
Weight
W
Without heat sink
47.33 [2.89]
cm3 [in3]
215 [7.58]
g [oz]
Pin Material
C145 Copper
Underplate
Low-stress ductile Nickel
50
100
Palladium
0.8
6
Soft Gold
0.12
2
Whisker-resistant-matte Tin
200
400
µin
–40
125
°C
Pin Finish (Gold)
Pin Finish (Tin)
µin
µin
Thermal
Operating Internal Temperature [d]
TINT
Thermal Resistance Pin Side
θINT_PIN_SIDE
Thermal Resistance Housing
θHOU
Thermal Resistance Non-Pin Side
θINT_NON_PIN_SIDE
T-Grade
Estimated thermal resistance to
maximum temperature internal
component from isothermal pin/
terminal-side housing
Estimated thermal resistance of thermal
coupling between the pin-side and
non‑pin‑side case surfaces
Estimated thermal resistance to
maximum temperature internal
component from isothermal non-pin/
non-terminal housing
0.97
°C/W
0.42
°C/W
0.62
°C/W
Assembly
Storage Temperature
ESD Rating
TST
T-Grade
–40
HBM
Method per Human Body Model Test
ESDA/JEDEC JDS-001-2012
CLASS 2
CDM
Charged Device Model JESD22-C101E
CLASS 2
125
°C
130
°C
Soldering [e]
Peak Temperature Top Case
For further information, please contact
factory applications
[c]
Product appearance may change over time depending upon environmental exposure. This change has no impact on product performance.
Temperature refers to the internal operation of the DCM. For maximum case temperature, please refer to Figure 1.
[e] Product is not intended for reflow solder attach.
[d]
DCM™ in a VIA™ Package
Rev 1.0
Page 18 of 40 03/2020
DCM5614xD0H36K3yzz
General Characteristics (Cont.)
Specifications apply over all line and load conditions, internal temperature TINT = 25°C, unless otherwise noted. Boldface specifications apply over the
temperature range specified by the product grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Safety
Dielectric Withstand Test
VHIPOT
IN to OUT
2121
IN to CASE
2121
OUT to CASE
707
VDC
Reliability
MTBF
MIL-HDBK-217Plus Parts Count
25°C Ground Benign, Stationary,
Indoors / Computer
0.88
MHrs
Telcordia Issue 2, Method I Case III,
25°C, Ground Benign, Controlled
1.85
MHrs
Agency Approvals
Agency Approvals / Standards
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
DCM™ in a VIA™ Package
Rev 1.0
Page 19 of 40 03/2020
DCM5614xD0H36K3yzz
Pin Functions
Design Guidelines
Power Terminals
Building Blocks and System Design
+IN, –IN
Input power pins.
The DCM converter input accepts the full 180 – 400V range,
and it generates an isolated trimmable 28.0VDC output. Multiple
DCMs may be paralleled for higher power capacity via wireless
load sharing, even when they are operating off of different input
voltage supplies.
+OUT, –OUT
Output power pins. –OUT also serves as the reference for the
secondary-referenced control pins on analog interface models.
Analog Signal Control Pins
EN (Enable)
This pin enables and disables the DCM converter; when held low
the unit will be disabled. It is referenced to the –OUT pin of the
converter. EN is active only if VDDE is pre-applied before VIN is
applied. Otherwise, EN is inactive and will be ignored until VIN is
removed and reapplied.
nn
Output enable: When EN is allowed to pull up above the enable
threshold, the module will be enabled. If leaving EN floating, it is
pulled up to VCC and the module will be enabled.
nn
Output disable: EN may be pulled down externally in order to
disable the module.
nn
EN is an input only, it does not pull low in the event of a fault.
TR (Trim)
The TR pin is used to select the trim mode and to trim the
output voltage of the DCM converter. The TR pin has an internal
pull-up to VCC.
The DCM will latch trim behavior at application of VIN (once VIN
exceeds VIN-UVLO+), and persist in that same behavior until loss of
input voltage.
nn
At application of VIN, if TR is sampled at a value above VTRIM-DIS,
the module will latch in a non-trim mode, and will ignore the TR
input for as long as VIN is present.
nn
At application of VIN, if TR is sampled at a value below VTRIM‑EN,
the TR will serve as an input to control the real time output
voltage. It will persist in this behavior until VIN is no
longer present.
If trim is active when the DCM is operating, the TR pin provides
dynamic trim control at a typical 0.4Hz of –3dB bandwidth over the
output voltage. TR also decreases the current limit threshold when
trimming above VOUT-NOM.
PMBus® Signal Control Pins
SCL and SDA (Serial Clock and Serial Data)
I2C™ communication signal pin interface for PMBus Host clock
and data connection. SCL and SDA are not internally pulled up
to any voltage, permitting flexibility for the user in defining the
communication bus voltage. External pull-up resistors are required,
the value of which should be considered dependent on the SCL
and SDA signal routing impedance characteristics.
ADDR (Address)
This pin programs the module with a fixed and persistent PMBus
address using a resistor between the ADDR pin and SGND. The
address pin has an internal 10kΩ pull-up resistor to VCC. The
address is sampled by the DCM’s internal microcontroller at
initial turn on and held until power is removed. See the Device
Address table in the PMBus Interface section for recommended
values of R ADDR.
The DCM converter provides a regulated output voltage with a
load dependent, resistive droop characteristic (ROUT ). The load line
enables configuration of an array of DCM converters that manage
the output load with no share signal bus among modules. When
multiple DCM5614 modules are connected in an array, they will
inherently share the load current according to the equivalent
impedance divider that the system implements from the power
source to the point-of-load. Ensuring equal current sharing among
modules requires that DCM array impedances be matched.
Downstream regulators may be used to provide tighter voltage
regulation if required.
The DCM5614xD0H36K3yzz may be used in standalone
applications where the output power requirements are up to
1300W. However, it is easily deployed as arrays of modules to
increase power handling capacity. Arrays of up to four units have
been qualified for 5.2kW capacity. Application of DCM converters
in an array requires no de-rating of the maximum available power
versus what is specified for a single module. To ensure reliable
system recovery in the event of a fault of one or more units in an
array, ORing of the DCM outputs is needed. Note that the addition
of ORing circuitry can influence current sharing among modules.
Soft Start
When the DCM starts, it will go through a soft start. The soft‑start
routine ramps the output voltage by modulating the internal error
amplifier reference. This causes the output voltage to approximate
a piecewise linear ramp. The output ramp finishes when the
voltage reaches either the nominal output voltage or the trimmed
output voltage as set by either the TR pin (analog interface
modules) or the VOUT_COMMAND (21h – PMBus interface
modules). The DCM is capable of supporting full rated output
current during start up and will enter constant-current operation to
support charging highly capacitive loads (see Figure 16).
Trim Mode and Output Trim Control
(Analog Interface Modules)
When the input voltage is initially applied to a DCM, and after
tINIT elapses, the trim pin voltage V TR is sampled. The TR pin has
an internal pull-up resistor to VCC, so unless external circuitry
pulls the pin voltage lower, it will pull up to VCC. If the initially
sampled trim pin voltage is higher than V TRIM-DIS, then the DCM
will disable trimming as long as VIN remains applied. In this case, for
all subsequent operation, the output voltage will be programmed
to the nominal set point. This minimizes the support components
required for applications that only require the nominal rated VOUT
and also provides the best output set‑point accuracy as there are
no additional errors introduced from external trim components.
If, at initial application of VIN, the TR pin voltage is prevented from
exceeding V TRIM-EN, then the DCM will activate trim mode. The trim
mode will remain active for as long as VIN is applied.
Please note: For chassis mount models, Vicor part number 42550 will be
needed for applications requiring the use of signal pins.
DCM™ in a VIA™ Package
Rev 1.0
Page 20 of 40 03/2020
DCM5614xD0H36K3yzz
Line Impedance, Input Slew rate and
Input Stability Requirements
VOUT set point at no load can be calculated using the
equation below:
(
VOUT-TRIMMING = 20.00 + 20.625 •
VTR
VCC
)
(1)
Note: the trim mode is not changed when a DCM recovers from any fault
condition or being disabled.
Module performance is guaranteed through output voltage trim
range VOUT-TRIMMING. If VOUT is trimmed above this range, then
certain combinations of line and load transient conditions may
trigger the output OVP.
Output Current Limit
The DCM features a fully operational firmware-controlled current
limit that effectively keeps the module operating inside the
Safe Operating Area (SOA) for all valid trim and load profiles.
The current limit approximates a “brick wall” limit, where the
output current is prevented from exceeding the current limit
threshold by reducing the output voltage via the internal error
amplifier reference.
Connect a high-quality, low-noise power supply to the +IN and –IN
terminals. Additional capacitance may have to be added between
+IN and –IN to make up for impedances in the interconnect cables
as well as deficiencies in the source.
Excessive source impedance can bring about system stability
issues for a regulated DC-DC converter, and must either be
avoided or compensated. A 100µF input capacitor is the minimum
recommended in case the source impedance is insufficient to
satisfy stability requirements.
Additional information can be found in the
filter design application note.
Please refer to this input filter design tool to ensure input stability.
Ensure that the input voltage slew rate is less than 1V/µs,
otherwise a pre-charge circuit is required for the DCM input to
control the input voltage slew rate and prevent overstress to input
stage components.
Input Fuse Selection
Sustained operation in current limit is permitted and no de-rating
of output power is required. In order to preserve the SOA, when
the converter is trimmed above the nominal output voltage,
the current limit threshold is automatically reduced to limit the
available output power.
The DCM is not internally fused in order to provide flexibility in
configuring power systems. Input line fusing is recommended at
the system level, in order to provide thermal protection in case of
catastrophic failure. The fuse shall be selected by closely matching
system requirements with the following characteristics:
Current limit can reduce the output voltage to as little as the
UVP threshold (VOUT-UVP). Below this minimum output voltage
compliance level, further loading will cause the module to shut
down due to the output undervoltage fault protection.
nn
Current rating (usually greater than the DCM converter’s
maximum current)
Analog Interface Modules
The current limit threshold at all trim conditions is 105% of rated
output current. Note that at output voltage trim conditions higher
than 28V, the rated output current is automatically reduced to
prevent exceeding the 1300W rated output power capability of the
module. The module may enter current-limited operation during
soft start when charging large capacitive loads (see Figure 16).
nn
Ambient temperature
PMBus®
The following section describes fault conditions in which the
DCM will automatically shut down to protect the powertrain from
operation outside the prescribed safe operating area. All faults are
non‑latching; the powertrain will automatically attempt to restart
once the fault condition subsides.
Interface Modules
The default current limit threshold at all trim conditions is 105% of
rated output current. Note that at output voltage trim conditions
higher than 28V, the rated output current is automatically reduced
to prevent exceeding the 1300W rated output power capability of
the module. The current limit threshold may be adjusted from 0 to
105% of rated current via the MFR_CONSTANT_CURRENT (E8h)
command, see PMBus Interface section beginning on page 25.
This command also permits disabling the firmware-controlled
constant‑current behavior such that an output overcurrent event
exceeding IOUT_CL triggers the hardware overcurrent protection and
disables the powertrain for a minimum time tCL_FAULT. The module
will periodically attempt to restart until the overcurrent condition is
removed and normal operation resumes.
The module may enter current-limited operation during soft start
when charging large capacitive loads (see Figure 16). The current
limit threshold during soft start is set according to the
MFR_CONSTANT_CURRENT (E8h). Current-limited operation
during soft start is retained (105% threshold) even if the
firmware‑controlled constant‑current behavior is disabled.
nn
Maximum voltage rating (usually greater than the maximum
possible input voltage)
nn
Breaking capacity per application requirements
nn
Nominal melting I2t
nn
Recommended fuse: Littelfuse® 487 series rated 10A.
Fault Handling
Input Undervoltage Fault Protection (UVLO)
The converter’s input voltage is monitored to detect an input
undervoltage condition. If the converter is not already running,
then it will ignore enable commands until the input voltage is
greater than VIN-UVLO+. If the converter is running and the input
voltage falls below VIN-UVLO–, the converter recognizes a fault
condition, the powertrain stops switching, and the output voltage
of the unit falls.
Input voltage transients which fall below UVLO for less than tUVLO
may not be detected by the fault protection logic, in which case
the converter will continue regular operation. No protection is
required in this case.
Once the UVLO fault is detected by the fault protection logic, the
converter shuts down and waits for the input voltage to rise above
VIN-UVLO+. Provided the converter is still enabled, it will then restart.
DCM™ in a VIA™ Package
Rev 1.0
Page 21 of 40 03/2020
DCM5614xD0H36K3yzz
Input Overvoltage Fault Protection (OVLO)
The converter’s input voltage is monitored to detect an input
overvoltage condition. When the input voltage is higher than
VIN‑OVLO+, a fault is detected, the powertrain stops switching, and
the output voltage of the converter falls.
+
TC_PIN_SIDE
θINT_PIN_SIDE
–
After an OVLO fault occurs, the converter will wait for the input
voltage to fall below VIN-OVLO–. Provided the converter is still
enabled, the powertrain will restart.
θHOU
–
TC_NON_
θINT_NON_
A time dependent overvoltage protection permits the module to
ride through short duration voltage surge transients. The converter
will continue to process power so long as the input voltage returns
to a level below VIN‑OVLO– within tOVLO.
PIN_SIDE
+
PIN_SIDE
PDISS
s
s
Output Undervoltage Fault Protection (UVP)
The converter determines that an output overload or short circuit
condition exists by measuring its output voltage and the output of
the internal error amplifier. In general, whenever the powertrain is
switching and the output voltage falls below VOUT-UVP threshold, a
undervoltage fault will be registered. Once an output undervoltage
condition is detected, the powertrain immediately stops switching,
and the output voltage of the converter falls. The converter
remains disabled for a time tFAULT. Once recovered and provided the
converter is still enabled, the powertrain will restart.
Figure 23 — Double-sided cooling thermal model
Temperature Fault Protections (OTP)
Single-side cooling: the model of Figure 23 can be simplified
by calculating the parallel resistor network and using one
simple thermal resistance number and the internal power
dissipation curves; an example for non-pin-side cooling only is
shown in Figure 24.
Output Overvoltage Fault Protection (OVP)
The converter monitors the output voltage during each switching
cycle. If the output voltage exceeds VOUT-OVP+, the OVP fault
protection is triggered. The control logic disables the powertrain,
and the output voltage of the converter falls.
The DCM will remain disabled for at least time tFAULT. Provided the
converter is still enabled and the output voltage has fallen below
VOUT-OVP–, the powertrain will restart.
In this case, θINT can be derived as following:
θINT =
(θ
INT_PIN_SIDE
+ θHOU) • θINT_NON_PIN_SIDE
θINT_PIN_SIDE + θHOU + θINT_NON_PIN_SIDE
θINT
Thermal Considerations
The VIA package provides effective conduction cooling from
either of the two module surfaces. Heat may be removed from
the pin-side surface, the non-pin-side surface or both. The extent
to which these two surfaces are cooled is a key component for
determining the maximum power that can be processed by a
DCM in a VIA package, as can be seen from specified thermal
operating area on Page 4. Since the VIA package has a maximum
internal temperature rating, it is necessary to estimate this internal
temperature based on a system-level thermal solution. To this
purpose, it is helpful to simplify the thermal solution into a roughly
equivalent circuit where power dissipation is modeled as a current
source, isothermal surface temperatures are represented as voltage
sources and the thermal resistances are represented as resistors.
Figure 23 shows the “thermal circuit” for the VIA package.
(2)
Double-side cooling: while this option might bring limited
advantage to the module internal components (given the surfaceto-surface coupling provided), it might be appealing in cases where
the external thermal system requires allocating power to two
different elements, like for example heatsinks with independent
airflows or a combination of chassis/air cooling.
+
TC_NON_
–
The fault logic monitors the internal temperature of the converter.
If the measured temperature exceeds TINT-OTP, a temperature fault
is registered. As with the undervoltage fault protection, once
a temperature fault is registered, the powertrain immediately
stops switching, the output voltage of the converter falls, and the
converter remains disabled for at least time tOTP-FAULT. Then, the
converter waits for the internal temperature to return to below
TINT‑OTP before recovering. Provided the converter is still enabled,
the DCM will restart.
In this case, the internal power dissipation is PDISS, θINT_PIN_SIDE and
θINT_NON_PIN_SIDE are thermal resistance characteristics of the VIA
package and the pin-side and non-pin-side surface temperatures
are represented as TC_PIN_SIDE, and TC_NON_PIN_SIDE. It is interesting
to notice that the package itself provides a high degree of thermal
coupling between the pin-side and non-pin-side case surfaces
(represented in the model by the resistor θHOU). This feature enables
two main options regarding thermal designs:
PIN_SIDE
s
PDISS
s
Figure 24 — Single-sided cooling thermal model
DCM™ in a VIA™ Package
Rev 1.0
Page 22 of 40 03/2020
DCM5614xD0H36K3yzz
Grounding Considerations
Summary
The chassis of the DCM is required to be connected to Protective
Earth when installed in the end application and must satisfy the
requirements of IEC 60950-1 for Class I products.
The final package assembly contains basic insulation from input
to case, reinforced insulation from input to output, and functional
insulation from output to case.
Dielectric Withstand
The output of the DCM complies with the requirements of SELV
circuits so only functional insulation is required from the output
The DCM contains an internal safety approved isolating component
(ChiP™) that provides the Reinforced Insulation from Input
to Output. The isolating component is individually tested for
Reinforced Insulation from Input to Output at 4242VDC prior to the
final assembly of the DCM in a VIA package.
When the VIA package assembly is complete the Reinforced
Insulation can only be tested at Basic Insulation values as specified
in the electric strength Test Procedure noted in clause 5.2.2
of IEC 60950-1.
(SELV) to case (PE) because the case is required to be connected
to protective earth in the final installation. The construction of
the DCM in a VIA package can be summarized by describing it
as a “Class II” component installed in a “Class I” subassembly.
The reinforced insulation from input to output can only be
tested at a basic insulation value of 2121VDC on the completely
assembled VIA package.
Test Procedure Note from IEC 60950-1
“For equipment incorporating both REINFORCED INSULATION and
lower grades of insulation, care is taken that the voltage applied
to the REINFORCED INSULATION does not overstress BASIC
INSULATION or SUPPLEMENTARY INSULATION.”
DCM™ in a VIA™ Package
Rev 1.0
Page 23 of 40 03/2020
DCM5614xD0H36K3yzz
System Diagram for PMBus® Interface
5V
VDDE
DCM in a VIA
Package
SCL
SDA
SGND
SCL
SDA
Host
PMBus
SGND
ADDR
The controller of the DCM in a VIA package is referenced to the low-voltage-side signal ground (SGND).
The DCM in a VIA package provides the Host PMBus system with accurate telemetry monitoring and reporting, voltage and current
setpoint adjustment, in addition to corresponding status flags. The standalone DCM is periodically polled for status by the host
PMBus. Direct communication to the DCM is enabled by a page command. For example, the page (0x00) prior to a telemetry inquiry
points to the DCM controller data and page (0x01) prior to a telemetry inquiry points to the DCM parameters.
The DCM enables the PMBus compatible host interface with an operating bus speed of up to 400kHz. The DCM follows the PMBus
command structure and specification.
DCM™ in a VIA™ Package
Rev 1.0
Page 24 of 40 03/2020
DCM5614xD0H36K3yzz
PMBus® Interface
Reported DATA Formats
Refer to “PMBus Power System Management Protocol Specification
Revision 1.3, Part I and II” for complete PMBus specifications details
at http://pmbus.org.
The DCM controller employs a direct data format where all reported
measurements are in Volts, Amperes, Degrees Celsius, or Seconds.
The host uses the following PMBus specification to interpret
received values metric prefixes. Note that the COEFFICIENTS
command is not supported:
Device Address
The PMBus address (ADDR Pin) should be set to one of a
predetermined sixteen possible addresses shown in the table below
using a resistor between ADDR pin and SGND pin.
The DCM accepts only a fixed and persistent address and does not
support SMBus address resolution protocol. At initial power-up, the
DCM internal microcontroller will sample the address pin voltage,
and will hold this address until device power is removed.
ID
Slave
Address
HEX
Recommended
Resistor R ADDR (Ω)
1
1010 000b
50h
487
2
1010 001b
51h
1050
3
1010 010b
52h
1870
4
1010 011b
53h
2800
5
1010 100b
54h
3920
6
1010 101b
55h
5230
7
1010 110b
56h
6810
8
1010 111b
57h
8870
9
1011 000b
58h
11300
10
1011 001b
59h
14700
11
1011 010b
5Ah
19100
12
1011 011b
5Bh
25500
13
1011 100b
5Ch
35700
14
1011 101b
5Dh
53600
15
1011 110b
5Eh
97600
16
1011 111b
5Fh
316000
Where:
X is a “real world” value in units (A, V, °C, s)
Y is a two’s complement integer received
from the internal microcontroller
m, b and R are two’s complement integers defined as follows:
X=
()
1
• (Y • 10–R –b)
m
Command
(3)
Code
m
R
b
VOUT_COMMAND
21h
1
2
0
READ_VIN
88h
1
1
0
READ_VOUT
8Bh
1
2
0
READ_IOUT
8Ch
1
2
0
READ_TEMPERATURE_1
8Dh
1
0
0
READ_POUT
96h
1
1
0
MFR_VIN_MIN
A0h
1
1
0
MFR_VIN_MAX
A1h
1
1
0
MFR_VOUT_MIN
A4h
1
2
0
MFR_VOUT_MAX
A5h
1
2
0
MFR_IOUT_MAX
A6h
1
2
0
MFR_POUT_MAX
A7h
1
1
0
MFR_POUT_MAX
A7h
1
0
0
MFR_CONSTANT_CURRENT
E8h
1
2
0
DCM™ in a VIA™ Package
Rev 1.0
Page 25 of 40 03/2020
DCM5614xD0H36K3yzz
Supported Command List
Command
Code
Function
Default Data Content
Data Bytes
PAGE
00h
Access stored DCM information
00h
1
OPERATION
01h
Turn DCM on or off
80h
1
CLEAR_FAULTS
03h
Clear all faults
N/A
None
CAPABILITY
19h
PMBus® key capabilities set by factory
20h
1
VOUT_MODE
20h
Returns the format of the output voltage data
40h
1
VOUT_COMMAND
21h
Set DCM output voltage
VOUT Nom
2
STATUS_BYTE
78h
Summary of faults
00h
1
STATUS_WORD
79h
Summary of fault conditions
00h
2
STATUS_VOUT
7Ah
Output overvoltage and undervoltage fault status
00h
1
STATUS_IOUT
7Bh
Overcurrent fault status
00h
1
STATUS_INPUT
7Ch
Input overvoltage and undervoltage fault status
00h
1
STATUS_TEMPERATURE
7Dh
Overtemperature and undertemperature fault status
00h
1
STATUS_CML
7Eh
PMBus communication fault
00h
1
STATUS_MFR_SPECIFIC
80h
Other DCM status indicator
00h
1
READ_VIN
88h
Read input voltage
FFFFh
2
READ_VOUT
8Bh
Read output voltage
FFFFh
2
READ_IOUT
8Ch
Read output current
FFFFh
2
READ_TEMPERATURE_1
8Dh
Read internal controller temperature
FFFFh
2
READ_POUT
96h
Read output power
FFFFh
2
PMBUS_REVISION
98h
PMBus compatible revision
22h
1
MFR_ID
99h
DCM controller ID
“VI”
2
MFR_MODEL
9Ah
Internal controller or DCM model
Part Number
18
MFR_REVISION
9Bh
Internal controller or DCM revision
FW and HW revision
18
MFR_LOCATION
9Ch
Internal controller or DCM factory location
“AP”
2
MFR_DATE
9Dh
Internal controller or DCM manufacturing date
“YYWW”
4
MFR_SERIAL
9Eh
Internal controller or DCM serial number
Serial Number
16
MFR_VIN_MIN
A0h
Minimum rated input voltage
Varies per DCM
2
MFR_VIN_MAX
A1h
Maximum rated input voltage
Varies per DCM
2
MFR_VOUT_MIN
A4h
Minimum rated output voltage
Varies per DCM
2
MFR_VOUT_MAX
A5h
Maximum rated output voltage
Varies per DCM
2
MFR_IOUT_MAX
A6h
Maximum rated output current
Varies per DCM
2
MFR_POUT_MAX
A7h
Maximum rated output power
Varies per DCM
2
MFR_CONSTANT_CURRENT
E8h
Set DCM current limit threshold
69h
2
ECh
Store output voltage trim and current limit threshold in
non-volatile memory
N/A
None
MFR_V_I_COMMIT_COMMAND
DCM™ in a VIA™ Package
Rev 1.0
Page 26 of 40 03/2020
DCM5614xD0H36K3yzz
Command Structure Overview
Write Byte protocol:
The Host always initiates PMBus® communication with a START bit. All messages are terminated by the Host with a STOP bit. In a write
message, the master sends the slave device address followed by a write bit. Once the slave acknowledges, the master proceeds with the
command code and then similarly the data byte.
1
7
1
1
S
Slave Address
Wr
A
x=0
x=0
S
Start Condition
Sr
Repeated start Condition
8
Command Code
1
8
1
1
A
Data Byte
A
P
x=0
x=0
Rd Read
Wr Write
X
Indicated that field is required to have the value of x
A
Acknowledge (bit may be 0 for an ACK or 1 for a NACK)
P
Stop Condition
From Master to Slave
From Slave to Master
…
Continued next line
Figure 25 — PAGE COMMAND (00h), WRITE BYTE PROTOCOL
Read Byte protocol:
A Read message begins by first sending a Write Command, followed by a REPEATED START Bit and a slave Address. After receiving the
READ bit, the DCM controller begins transmission of the Data responding to the Command. Once the Host receives the requested Data, it
terminates the message with a NACK preceding a stop condition signifying the end of a read transfer.
1
7
1
1
S
Slave Address
Wr
A
x=0
x=0
8
Command Code
1
1
7
A Sr Slave Address
x=0
1
1
Rd
A
x=1
x=0
Figure 26 — ON_OFF_CONFIG COMMAND (02h), READ BYTE PROTOCOL
DCM™ in a VIA™ Package
Rev 1.0
Page 27 of 40 03/2020
8
Data Byte
1
1
A
P
x=1
DCM5614xD0H36K3yzz
Write Word protocol:
When transmitting a word, the lowest order byte leads the highest order byte. Furthermore, when transmitting a Byte, the least significant
bit (LSB) is sent last. Refer to System Management Bus (SMBus) specification version 2.0 for more details.
Note: Extended command and Packet Error Checking Protocols are not supported.
1
7
1
1
S
Slave Address
Wr
A
x=0
x=0
8
1
8
A
Command Code
1
Data Byte Low
x=0
8
A
Data Byte High
x=0
1
1
A
P
x=0
Figure 27 — TON_DELAY COMMAND (60h)_WRITE WORD PROTOCOL
Read Word protocol:
1
7
1
1
S
Slave Address
Wr
A
x=0
x=0
8
1
Command Code
1
7
A Sr Slave Address
x=0
1
1
Rd
A
x=1
x=0
8
1
Data Byte Low
A
x=0
Figure 28 — MFR_VIN_MIN COMMAND (A0h)_READ WORD PROTOCOL
Write Block protocol:
1
7
1
1
S
Slave Address
Wr
A
x=0
x=0
8
Data Byte 2
1
A
x=0
...
...
...
8
1
8
Byte Count = N
A
Command Code
x=0
8
Data Byte N
1
A
8
Data Byte 1
x=0
1
1
A
P
x=0
Figure 29 — SET_ALL_THRESHOLDS COMMAND (D5h)_WRITE BLOCK PROTOCOL
DCM™ in a VIA™ Package
Rev 1.0
Page 28 of 40 03/2020
1
A
x=0
...
8
Data Byte High
1
1
A
P
x=1
DCM5614xD0H36K3yzz
Read Block protocol:
1
7
1
1
S
Slave Address
Wr
A
x=0
x=0
1
8
Data Byte 1
8
1
7
x=0
8
A
1
A Sr Slave Address
Command Code
1
Data Byte 2
A
x=0
x=0
...
...
...
8
Data Byte N
1
1
Rd
A
x=1
x=0
1
1
A
P
8
1
Data Byte = N
A
x=0
x=1
Figure 30 — SET_ALL_THRESHOLDS COMMAND (D5h)_READ BLOCK PROTOCOL
Write Group Command protocol:
1
7
1
1
S
Slave Address
Wr
A
Command Code
A
First Device
x=0
x=0
First Command
x=0
1
7
Sr Slave Address
Second Device
1
7
Sr Slave Address
Nth Device
8
8
1
1
1
Wr
A
Command Code
A
x=0
x=0
Second Command
x=0
8
8
Data Byte Low
1
1
1
Wr
A
Command Code
A
x=0
x=0
Nth Command
x=0
8
Data Byte Low
1
8
Data Byte Low
1
8
1
A
Data Byte High
A
x=0
One or more Data Bytes
x=0
1
8
1
A
Data Byte High
A
x=0
One or more Data Bytes
x=0
1
8
Data Byte High
A
x=0
One or more Data Bytes
x=0
Note that only one command per device is allowed in a group command.
DCM™ in a VIA™ Package
Rev 1.0
Page 29 of 40 03/2020
...
1
A
Figure 31 — DISABLE_FAULT COMMAND (D7h)_WRITE
...
P
...
DCM5614xD0H36K3yzz
Supported Commands Transaction Type
Page Command (00h)
A direct communication to the DCM controller and a
simulated communication to non-PMBus® devices is enabled
by a page command. Supported command access privileges
with a pre-selected PAGE are defined in the following table.
Deviation from this table generates a communication error in
STATUS_CML register.
The page command data byte of 00h prior to a command call will
address the controller-specific data and a page data byte of 01h
would address the DCM.
Command
Code
Data Byte
PAGE Data Byte
Access Type
00h
01h
PAGE
00h
R/W
R/W
OPERATION
01h
R
R/W
CLEAR_FAULTS
03h
W
W
CAPABILITY
19h
R
VOUT_MODE
20h
R
VOUT_COMMAND
21h
STATUS_BYTE
78h
R/W
R
STATUS_WORD
79h
R
R
STATUS_VOUT
7Ah
R
R/W
STATUS_IOUT
7Bh
R
R/W
STATUS_INPUT
7Ch
R
R/W
STATUS_TEMPERATURE
7Dh
R
R/W
STATUS_CML
7Eh
R/W
STATUS_MFR_SPECIFIC
80h
R/W
READ_VIN
88h
Description
00h
DCM controller
01h
DCM
OPERATION Command (01h)
The OPERATION command can be used to turn on and off DCM.
Unit is On when asserted (default)
R
R/W
R/W
R
Reserved
7
6
5
4
3
2
1
0
1
0
0
0
0
0
0
0
b
This command accepts only two data values: 00h and 80h. If any
other value is sent the command will be rejected and a CML Data
error will result.
READ_VOUT
8Bh
R
Data Byte
READ_IOUT
8Ch
R
R
0x80
Turn ON
Description
READ_TEMPERATURE_1
8Dh
R
R
0x00
Turn OFF
READ_POUT
96h
R
R
PMBUS_REVISION
98h
R
MFR_ID
99h
R
MFR_MODEL
9Ah
R
R
MFR_REVISION
9Bh
R
R
MFR_LOCATION
9Ch
R
R
MFR_DATE
9Dh
R
R
MFR_SERIAL
9Eh
R
R
MFR_VIN_MIN
A0h
R
R
MFR_VIN_MAX
A1h
R
R
MFR_VOUT_MIN
A4h
R
R
MFR_VOUT_MAX
A5h
R
R
MFR_IOUT_MAX
A6h
R
R
MFR_POUT_MAX
A7h
R
R
CLEAR_FAULTS Command (03h)
MFR_CONSTANT_CURRENT
E8h
R/W
MFR_V_I_COMMIT_COMMAND
ECh
W
This command clears all status bits that have been previously set.
Persistent or active faults are re-asserted once cleared. All faults
are latched once asserted in the DCM controller. Registered faults
will not be cleared when shutting down the DCM powertrain by
sending the OPERATION command.
DCM™ in a VIA™ Package
Rev 1.0
Page 30 of 40 03/2020
DCM5614xD0H36K3yzz
CAPABILITY Command (19h)
VOUT_COMMAND (21h)
The DCM returns a default value of 20h. This value indicates that
the PMBus® frequency supported is up to 400kHz and that both
Packet Error Checking (PEC) and SMBALERT# are not supported.
This command sets the output voltage of device to the
commanded value.
Packet Error Checking is not supported
Any values outside the device output voltage range sent by host
will be rejected,will not override the current value and will set the
Unsupported data bit in STATUS_CML.
This command uses DIRECT mode and following format:
Maximum supported bus speed is 400kHz
The Device does not have SMBALERT# pin and does
not support the SMBus Alert Response protocol
Reserved
7
6
5
4
3
2
1
0
0
0
1
0
0
0
0
0
b
VOUT_MODE Command (20h)
The command returns the information about the mode used for all
the output voltage related commands. DCM uses DIRECT Mode
(40h) for all the output voltage related commands.
DCM™ in a VIA™ Package
Rev 1.0
Page 31 of 40 03/2020
VOUT_SET_POINT_ACTUAL = VOUT_SET_POINT_SET • 10–2 (Volts)
DCM5614xD0H36K3yzz
STATUS_BYTE (78h) and STATUS_WORD (79h)
STATUS_WORD
High Byte
Low Byte
STATUS_BYTE
UNIT IS BUSY
Not Supported: UNKNOWN FAULT OR WARNING
UNIT IS OFF
Not Supported: OTHER
Not Supported: FAN FAULT OR WARNING
Not Supported: VOUT_OV_FAULT
POWER_GOOD Negated*
IOUT_OC_FAULT
VIN_UV_FAULT
STATUS_MFR_SPECIFIC
TEMPERATURE FAULT OR WARNING
INPUT FAULT OR WARNING
PMBusTM COMMUNICATION EVENT
IOUT/POUT FAULT OR WARNING
Not Supported: VOUT FAULT OR WARNING
NONE OF THE ABOVE
7
6
5
4
3
2
1
0
7
0
1
1
1
1
0
0
0
1
6
1
5
0
4
1
3
2
1
1
1
0
1
0
b
* equal to POWER_GOOD#
All fault or warning flags, if set, will remain asserted until
cleared by the host or once DCM power is removed. This
includes undervoltage fault, overvoltage fault, overcurrent fault,
overtemperature fault, undertemperature fault, communication
faults and analog controller shut-down fault.
Asserted status bits in all status registers, with the exception of
STATUS_WORD and STATUS_BYTE, can be individually cleared.
This is done by sending a data byte with one in the bit position
corresponding to the intended warning or fault to be cleared. Refer
to the PMBus® Power System Management Protocol Specification –
Part II – Revision 1.3 for details.
The POWER_GOOD# bit reflects the state of the device and does
not reflect the state of the POWER_GOOD# signal limits. The
POWER_GOOD_ON COMMAND (5Eh) and POWER_GOOD_OFF
COMMAND (5Fh) are not supported. The POWER_GOOD# bit is
set, when the DCM is not in the active state, to indicate that the
powertrain is inactive and not switching. The POWER_GOOD#
bit is cleared, when the DCM is in the enabled state, after the
powertrain is activated allowing for soft-start to elapse.
STATUS_VOUT (7Ah)
POWER_GOOD# and OFF bits cannot be cleared as they always
reflect the current state of the device.
The Busy bit can be cleared using CLEAR_FAULTS Command
(03h) or by writing data value (40h) to PAGE (00h) using the
STATUS_BYTE (78h).
Fault reporting, such as SMBALERT# signal output, and host
notification by temporarily acquiring bus master status is
not supported.
If the DCM controller is powered through VDDE, it will retain the
last telemetry data and this information will be available to the user
via a PMBus Status request. This is in agreement with the PMBus
standard, which requires that status bits remain set until specifically
cleared. Note that in the case where the DCM VIN is lost, the status
will always indicate an undervoltage fault, in addition to any other
fault that occurred.
NONE OF THE ABOVE bit will be asserted if either the
STATUS_MFR_SPECIFIC (80h) or the High Byte of the STATUS
WORD is set.
STATUS_IOUT (7Bh)
IOUT_OC_FAULT
VOUT_OV_FAULT
Not Supported: IOUT_OC_LV_FAULT
Not Supported: VOUT_OV_WARNING
IOUT_OC_WARNING
Not Supported: VOUT_UV_WARNING
Not Supported: IOUT_UC_FAULT
VOUT_UV_FAULT
Not Supported: Current Share Fault
Not Supported: VOUT_MAX_WARNING
Not Supported: TON_MAX_FAULT
Not Supported: In Power Limiting Mode
Not Supported: TOFF_MAX_WARNING
Not Supported: POUT_OP_FAULT
Not Supported: VOUT_TRACKING_ERROR
7
6
5
4
3
2
1
0
1
0
0
1
0
0
0
0
Not Supported: POUT_OP_WARNING
b
Unsupported bits are indicated above. A one indicates a fault.
7
6
5
4
3
2
1
0
1
0
0
1
0
0
0
0
b
Unsupported bits are indicated above. A one indicates a fault.
DCM™ in a VIA™ Package
Rev 1.0
Page 32 of 40 03/2020
DCM5614xD0H36K3yzz
STATUS_INPUT (7Ch)
STATUS_MFR_SPECIFIC (80h)
Reserved
VIN_OV_FAULT
Not Supported: VIN_OV_WARNING
PAGE Data Byte = (01h)
Reserved
Hardware Controller Shut-Down Fault
Not Supported: VIN_UV_WARNING
Reserved
VIN_UV_FAULT
Not Supported: Unit Off For Insufficient
Input Voltage
RAMP Fault
UART COM ERROR
Not Supported: IIN_OC_FAULT
Not Supported: IIN_OC_WARNING
Reserved
Reserved
Not Supported: PIN_OP_WARNING
7
6
5
4
3
2
1
0
1
1
0
1
0
0
0
0
b
Unsupported bits are indicated above. A one indicates a fault.
STATUS_TEMPERATURE (7Dh)
OT_FAULT
Not Supported: OT_WARNING
Not Supported: UT_WARNING
Not Supported: UT_FAULT
Reserved
Reserved
7
6
5
4
3
2
1
0
0
0
0
0
0
1
1
1
b
The DCM in a VIA package has hardware protections and
supervisory protections. The hardware controller provides an
additional layer of protection and has the fastest response time.
The Hardware Controller Shut-Down Fault, when asserted,
indicates that at least one of the powertrain protection
faults is triggered.
The DCM UART is designed to operate with the DCM controller
UART. If the DCM UART CML is asserted, it may indicate a
hardware or connection issue between both internal devices.
The RAMP Fault bit, if asserted, indicates start of
voltage ramp failure.
Reserved
Reserved
Reserved
PAGE Data Byte = (00h)
Reserved
Hardware Controller Shut-Down Fault
7
6
5
4
3
2
1
0
1
1
0
1
0
0
0
0
DCM at PAGE (01h) is present
b
RAMP Fault
UART COM ERROR
Unsupported bits are indicated above. A one indicates a fault.
NVM READ ERROR [f]
STATUS_CML (7Eh)
AUX SUPPLY PRESENT
Invalid Or Unsupported Command Received
Invalid Or Unsupported Data Received
Not Supported: Packet Error Check Failed
[f]
Not Supported: Memory Fault Detected
Processor Fault Detected
Reserved
Other Communication Faults
Not Supported: Other Memory Or Logic
Fault
7
6
5
4
3
2
1
0
1
1
0
0
0
0
1
0
b
Unsupported bits are indicated above. A one indicates a fault.
The STATUS_CML data byte will be asserted when an unsupported
PMBus® command or data or other communication fault occurs.
7
6
5
4
3
2
1
0
0
0
0
1
0
1
1
1
b
Non-volatile memory read error.
When PAGE COMMAND (00h) data byte is equal to (00h),
Hardware Controller Shut-Down Fault, RAMP fault and DCM
UART CML bit will return DCM faults. The DCM UART CML will
also be asserted if active DCM stops responding. The DCM must
communicate at least once to the DCM controller in order to
trigger this FAULT. The DCM UART CML can be cleared using
PAGE (00h) CLEAR_FAULTS (03h) Command.
NVM READ ERROR is asserted when the DCM controller has an
error reading non-volatile memory on power-up.
AUX SUPPLY PRESENT bit indicates that the DCM controller is
powered up by external bias power.
DCM™ in a VIA™ Package
Rev 1.0
Page 33 of 40 03/2020
DCM5614xD0H36K3yzz
READ_VIN Command (88h)
If PAGE data byte is equal to (01h) command will return DCM’s
value of input voltage in the following format:
VIN_ACTUAL = VIN_REPORTED • 10–1 (Volts)
READ_VOUT Command (8Bh)
If PAGE data byte is equal to (01h) command will return DCM’s
output voltage in the following format:
VOUT_ACTUAL = VOUT_REPORTED • 10–2 (Volts)
MFR_VIN_MIN Command (A0h),
MFR_VIN_MAX Command (A1h),
MFR_VOUT_MIN Command (A4h),
MFR_VOUT_MAX Command (A5h),
MFR_IOUT_MAX Command (A6h),
MFR_POUT_MAX Command (A7h)
These values are set by the factory and indicate the device
input output voltage and output current range and output
power capacity. Information can be accessed with either PAGE
(00h) or (01h).
The DCM controller will report rated DCM input voltage minimum
and maximum in volts, output voltage minimum and maximum
in volts, output current maximum in Amperes and output power
maximum in watts.
READ_IOUT Command (8Ch)
MFR_CONSTANT_CURRENT COMMAND (E8h)
If PAGE data byte is equal to (00h or 01h) command will return
DCM’s output current in the following format:
This command sets the value of DCM current limit threshold as
percentage of full load. The DCM will enter constant current
operation when a load is connected that exceeds the specified
current limit threshold.
IOUT_ACTUAL = IOUT_REPORTED • 10–2 (Amps)
READ_TEMPERATURE_1 Command (8Dh)
Valid values are in the range of 00h – 69h (0 – 105% rated current).
IOUT_VALUE_ACTUAL = IOUT_VALUE_SET • 10–2 Full Load (Amps)
If PAGE data byte is equal to (00h or 01h) command will return
DCM’s temperature in the following format:
TACTUAL = ±TREPORTED (ºC)
READ_POUT Command (96h)
If PAGE data byte is equal to (00h or 01h) command will return
DCM’s output power in the following format:
POUT_ACTUAL = POUT_REPORTED • 10 (W)
–1
The constant-current behavior of the DCM can be disabled by
entering any value greater than 69h. When disabled,
MFR_CONSTANT_CURRENT command will return 82h (130%).
In this mode the powertrain will cease switching operation in
the event of an overcurrent condition that exceeds the hardware
protection threshold IOUT-CL.
MFR_V_I_COMMIT_COMMAND Command (ECh)
This command stores the values of the output voltage
set point VOUT_COMMAND (21h) and current limit threshold
MFR_CONSTANT_CURRENT (E8h) in non-volatile memory. The
stored values become the default voltage setpoint and current limit
threshold upon recycling the DCM input voltage.
MFR_V_I_COMMIT_COMMAND is a block command and takes
0 bytes of data.
If enabled, the DCM powertrain will be momentarily disabled while
writing to non-volatile memory and will automatically restart once
the write sequence is completed.
DCM™ in a VIA™ Package
Rev 1.0
Page 34 of 40 03/2020
DCM5614xD0H36K3yzz
Data Transmission Faults Implementation
This section describes data transmission faults as implemented in the DCM.
Response to Host
Section
Description
NACK
Status Byte
FFh
CML
Status CML
Other Fault
Unsupported
Data
Notes
No response; PEC not
supported
10.8.1
Corrupted Data
10.8.2
Sending too few bits
X
X
10.8.3
Reading too few bits
X
X
10.8.4
Host sends or reads too few bytes
X
X
10.8.5
Host sends too many tytes
10.8.6
Reading too many bytes
10.8.7
Device busy
X
X
X
X
X
X
X
Device will ACK own address
BUSY bit in STATUS_BYTE
even if STATUS_WORD is set
X
Data Content Faults Implementation
This section describes data content faults as implemented in the DCM.
Section
Description
Response
to Host
Status Byte
NACK
CML
Other Fault
X
Status CML
Unsupported Unsupported
Command
Data
10.9.1
Inproperly set read bit in the
address byte
X
X
10.9.2
Unsupported command code
X
X
10.9.3
Invalid or unsupported data
X
X
10.9.4
Data out of range
X
X
10.9.5
Reserved bits
DCM™ in a VIA™ Package
Rev 1.0
Page 35 of 40 03/2020
Notes
X
No response; not a fault
DCM™ in a VIA™ Package
Rev 1.0
Page 36 of 40 03/2020
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DCM™ in a VIA™ Package
Rev 1.0
Page 38 of 40 03/2020
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8
9
3
4
5.171 [131.337]
DCM5614xD0H36K3yzz
DCM in VIA Package PCB (Board) Mount Package Recommended Hole Pattern
DCM5614xD0H36K3yzz
Revision History
Revision
Date
Description
Page Number(s)
1.0
03/04/20
Initial release
n/a
DCM™ in a VIA™ Package
Page 39 of 40
Rev 1.0
03/2020
DCM5614xD0H36K3yzz
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DCM™ in a VIA™ Package
Page 40 of 40
Rev 1.0
03/2020
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