NBM6123T46C15A6T0R

NBM6123T46C15A6T0R

  • 厂商:

    VICOR(怀格)

  • 封装:

    插件,61x25.1mm

  • 描述:

    DC/DC CONVERTER REV 2400W

  • 数据手册
  • 价格&库存
NBM6123T46C15A6T0R 数据手册
NBM™ Bus Converter NBM6123x46C15A6yzz ® C S US C NRTL US Non-Isolated, Fixed Ratio DC-DC Converter Features & Benefits Product Ratings • Up to 160A continuous secondary current • Up to 3600W/in3 power density • 98.2% peak efficiency • Parallel operation for multi-kW arrays • OV, OC, UV, short circuit and thermal protection • 6123 through-hole ChiP™ package ■■2.402 x 0.990 x 0.284in (61.00 x 25.14 x 7.21mm) • Bidirectional start up and steady state operation Typical Applications • DC Power Distribution • High End Computing Systems • Automated Test Equipment • Industrial Systems • High Density Power Supplies • Communications Systems • Transportation VPRI = 42V (36 – 46V) ISEC = up to 160A VSEC = 14V (12.0 – 15.3V) (no load) K = 1/3 Product Description The NBM6123x46C15A6yzz is a high efficiency Non-Isolated Bus Converter, operating from a 36 – 46VDC primary bus to deliver a non-isolated, ratiometric secondary voltage from 12.0 – 15.3VDC. The NBM6123x46C15A6yzz offers low noise, fast transient response, and industry leading efficiency and power density. In addition, it provides an AC impedance beyond the bandwidth of most downstream regulators, allowing input capacitance normally located at the input of a PoL regulator to be located at the primary side of the NBM. With a primary to secondary K factor of 1/3, that capacitance value can be reduced by a factor of 9x, resulting in savings of board area, material and total system cost. Leveraging the thermal and density benefits of Vicor’s ChiP packaging technology, the NBM offers flexible thermal management options with very low top and bottom side thermal impedances. Thermally-adept ChiP-based power components enable customers to achieve low cost power system solutions with previously unattainable system size, weight and efficiency attributes quickly and predictably. The NBM non-isolated topology allows start up and steady state operation in forward and reverse directions and provides bidirectional protections. However if the power train is disabled by any protection and VSEC is present, then a voltage equal to VSEC minus two diode drops will appear on the primary side. NBM™ Bus Converter Page 1 of 26 Rev 1.6 11/2017 NBM6123x46C15A6yzz Typical Applications NBM TM EN enable/disable switch VAUX FUSE +VSEC +VPRI SGND VPRI PGND PRIMARY SECONDARY CI_NBM_ELEC POL SOURCE_RTN NBM6123x46C15A6yzz + Point of Load NBM™ Bus Converter Page 2 of 26 Rev 1.6 11/2017 NBM6123x46C15A6yzz Pin Configuration 1 TOP VIEW 2 +VSEC A A’ +VSEC PGND1 B B’ PGND2 PGND1 C C’ PGND2 +VSEC D D’ +VSEC +VSEC E E’ +VSEC PGND1 F F’ PGND2 PGND1 G G’ PGND2 +VSEC H H’ +VSEC +VPRI I I’ TM +VPRI J J’ EN +VPRI K K’ VAUX +VPRI L L’ SGND 6123 ChiP Package Pin Descriptions Pin Number Signal Name Type Function I1, J1, K1, L1 +VPRI PRIMARY POWER I’2 TM OUTPUT J’2 EN INPUT K’2 VAUX OUTPUT L’2 SGND SIGNAL RETURN Signal return terminal only. Do not connect to PGND A1, D1, E1, H1, A’2, D’2, E’2, H’2 +VSEC SECONDARY POWER Positive secondary auto-transformer power terminal B1, C1, F1, G1 B’2, C’2, F’2, G’2 PGND * POWER RETURN Positive primary auto-transformer power terminal Temperature Monitor; Primary side referenced signals Enables and disables power supply; Primary side referenced signals Auxiliary Voltage Source; Primary side referenced signals Common negative primary and secondary auto-transformer power return terminal * For proper operation an external low impedance connection must be made between listed -PGND1 and PGND2 terminals. NBM™ Bus Converter Page 3 of 26 Rev 1.6 11/2017 NBM6123x46C15A6yzz Part Ordering Information Product Function Package Size Package Mounting Max Primary Input Voltage Range Identifier Max Secondary Voltage Secondary Output Current Temperature Grade Option NBM 6123 x 46 C 15 A6 y zz 61 = L 23 = W T = TH 00 = Analog Ctrl Non-isolated Bus Converter Module S = SMT 46V 15V No Load 36 – 46V 160A T = –40°C to 125°C 01 = PMBus Ctrl M = –55°C to ­125°C 0R = Reversible Analog Ctrl 0P = Reversible PMBus Ctrl All products shipped in JEDEC standard high profile (0.400” thick) trays (JEDEC Publication 95, Design Guide 4.10). Standard Models Product Function Package Size Package Mounting Max Primary Input Voltage Range Identifier Max Secondary Voltage Secondary Output Current Temperature Grade Option NBM 6123 T 46 C 15 A6 T 0R Absolute Maximum Ratings The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. Parameter Comments +VPRI_DC to –VPRI_DC Min Max Unit –1 60 V 1 V/µs 20 V 4.6 V 5.5 V 4.6 V VPRI_DC or VSEC_DC Slew Rate (Operational) +VSEC_DC to –VSEC_DC –1 TM to –VPRI_DC EN to –VPRI_DC –0.3 VAUX to –VPRI_DC NBM™ Bus Converter Page 4 of 26 Rev 1.6 11/2017 NBM6123x46C15A6yzz Electrical Specifications Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 46 V 15 V General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Primary Input Voltage Range (Continuous) VPRI µController PRI to SEC Input Quiescent Current 36 VPRI_DC VµC_ACTIVE IPRI_Q VPRI_DC voltage where µC is initialized, (i.e., VAUX = low, powertrain inactive) Disabled, EN low, VPRI_DC = 42V 8 TINTERNAL ≤ 100ºC 12 VPRI_DC = 42V, TINTERNAL = 25ºC PRI to SEC No Load Power Dissipation PRI to SEC Inrush Current Peak PPRI_NL IPRI_INR_PK 12.5 5 VPRI_DC = 42V 28 22 VPRI_DC = 36 – 46V 31 30 TINTERNAL ≤ 100ºC DC Primary Input Current Transformation Ratio Secondary Output Current (Continuous) Secondary Output Current (Pulsed) PRI to SEC Efficiency (Ambient) IPRI_IN_DC K ηAMB A At ISEC_OUT_DC = 160A, TINTERNAL ≤ 100ºC 53.9 Primary to secondary, K = VSEC_DC / VPRI_DC, at no load 1/3 10ms pulse, 25% duty cycle, ISEC_OUT_AVG ≤ 50% rated ISEC_OUT_DC VPRI_DC = 42V, ISEC_OUT_DC = 160A 97.4 VPRI_DC = 36V to 46V, ISEC_OUT_DC = 160A 97.1 VPRI_DC = 42V, ISEC_OUT_DC = 80A 97.5 98.2 96.9 97.4 160 A 176 A 98 % ηHOT VPRI_DC = 42V, ISEC_OUT_DC = 160A PRI to SEC Efficiency (Over Load Range) η20% 32A < ISEC_OUT_DC < 160A 90 RSEC_COLD VPRI_DC = 42V, ISEC_OUT_DC = 160A, TINTERNAL = –40°C 0.8 0.95 1.1 RSEC_AMB VPRI_DC = 42V, ISEC_OUT_DC = 160A 0.9 1.3 1.7 RSEC_HOT VPRI_DC = 42V, ISEC_OUT_DC = 160A, TINTERNAL = 100°C 1.5 1.75 2.0 FSW Frequency of the output voltage ripple = 2x FSW 1.14 1.20 1.26 VSEC_OUT_PP CSEC_EXT = 0μF, ISEC_OUT_DC = 160A, VPRI_DC = 42V, 20MHz BW Switching Frequency Secondary Output Voltage Ripple Secondary Output Leads Inductance (Parasitic) NBM™ Bus Converter Page 5 of 26 % % 110 TINTERNAL ≤ 100ºC Primary Input Leads Inductance (Parasitic) A V/V PRI to SEC Efficiency (Hot) PRI to SEC Output Resistance W 75 ISEC_OUT_DC ISEC_OUT_PULSE 19.5 VPRI_DC = 36 – 46V, TINTERNAL = 25 ºC VPRI_DC = 46V, CSEC_EXT = 3000μF, RLOAD_SEC = 20% of full load current mA mΩ MHz mV 205 LPRI_IN_LEADS Frequency 2.5MHz (double switching frequency), simulated lead model 3 nH LSEC_OUT_LEADS Frequency 2.5MHz (double switching frequency), simulated lead model 0.64 nH Rev 1.6 11/2017 NBM6123x46C15A6yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit General Powertrain PRIMARY to SECONDARY Specification (Forward Direction) Cont. Effective Primary Capacitance (Internal) CPRI_INT Effective Value at 42VPRI_DC 16.8 µF Effective Secondary Capacitance (Internal) CSEC_INT Effective Value at 14VSEC_DC 140 µF Rated Secondary Output Capacitance (External) CSEC_OUT_EXT Excessive capacitance may drive module into short circuit protection Rated Secondary Output Capacitance (External), Parallel Array Operation CSEC_OUT_AEXT CSEC_OUT_AEXT Max = N • 0.5 • CSEC_OUT_EXT MAX, where N = the number of units in parallel 3000 µF 1010 ms Protection PRIMARY to SECONDARY (Forward Direction) Auto Restart Time tAUTO_RESTART Start up into a persistent fault condition. Non-latching fault detection given VPRI_DC > VPRI_UVLO+ 940 Primary Overvoltage Lockout Threshold VPRI_OVLO+ 48 50 52 V Primary Overvoltage Recovery Threshold VPRI_OVLO– 46 48 50 V Primary Overvoltage Lockout Hysteresis VPRI_OVLO_HYST 2 V Primary Overvoltage Lockout Response Time tPRI_OVLO 30 µs Primary Undervoltage Lockout Threshold VPRI_UVLO– 28 30 32 V Primary Undervoltage Recovery Threshold VPRI_UVLO+ 30 32 34 V Primary Undervoltage Lockout Hysteresis VPRI_UVLO_HYST 2 V tPRI_UVLO 100 µs 30 ms 1 ms Primary Undervoltage Lockout Response Time From VPRI_DC = VPRI_UVLO+ to powertrain active, EN Primary Undervoltage Start Up Delay tPRI_UVLO+_DELAY floating (i.e., one time start up delay from application of VPRI_DC to VSEC_DC) Primary Soft Start Time tPRI_SOFT_START Secondary Output Overcurrent Trip Threshold ISEC_OUT_OCP Secondary Output Overcurrent Response Time Constant tSEC_OUT_OCP Secondary Output Short Circuit Protection Trip Threshold ISEC_OUT_SCP Secondary Output Short Circuit Protection Response Time tSEC_OUT_SCP Overtemperature Shutdown Threshold tOTP+ Overtemperature Recovery Threshold tOTP– Undertemperature Shutdown Threshold tUTP Undertemperature Restart Time NBM™ Bus Converter Page 6 of 26 tUTP_RESTART From powertrain active. Fast current limit protection disabled during soft start 177 Effective internal RC filter 200 240 4 ms 240 A 1 Temperature sensor located inside controller IC °C 110 Temperature sensor located inside controller IC; Protection not available for M-Grade units. Start up into a persistent fault condition. Non-latching fault detection given VPRI_DC > VPRI_UVLO+ Rev 1.6 11/2017 µs 125 105 A 3 115 °C –45 °C s NBM6123x46C15A6yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 15.3 V General Powertrain SECONDARY to PRIMARY Specification (Reverse Direction) Secondary Input Voltage Range, (Continuous) 12 VSEC_DC VSEC_DC = 14V, TINTERNAL = 25ºC SEC to PRI No Load Power Dissipation PSEC_NL DC Secondary Input Current ISEC_IN_DC Primary Output Current (Continuous) IPRI_OUT_DC Primary Output Current (Pulsed) IPRI_OUT_PULSE 5 VSEC_DC = 14V ηAMB 20 29 VSEC_DC = 12 – 15.3V, TINTERNAL = 25ºC 22 31 At IPRI_DC = 53.3A, TINTERNAL ≤ 100ºC 162 A 53.3 A 58.7 A 10ms pulse, 25% duty cycle, IPRI_OUT_AVG ≤ 50% rated IPRI_OUT_DC 97 98 VSEC_DC = 12V to 15.3V, IPRI_OUT_DC= 53.3A 96.7 % VSEC_DC = 14V, IPRI_OUT_DC = 26.7A 97.6 98.3 96.6 97 SEC to PRI Efficiency (Hot) ηHOT VSEC_DC = 14V, IPRI_OUT_DC = 53.3A SEC to PRI Efficiency (Over Load Range) η20% 10.66A < IPRI_OUT_DC < 53.3A 90 RPRI_COLD VSEC_DC = 14V, IPRI_OUT_DC = 53.3A, TINTERNAL = –40°C 10 12 14 RPRI_AMB VSEC_DC = 14V, IPRI_OUT_DC = 53.3A 12 16 20 RPRI_HOT VSEC_DC = 14V, IPRI_OUT_DC = 53.3A, TINTERNAL = 100°C 16 19 22 SEC to PRI Output Resistance Primary Output Voltage Ripple VPRI_OUT_PP CPRI_OUT_EXT = 0μF, IPRI_OUT_DC = 53.3A, VSEC_DC = 14V, 20MHz BW % % 330 Rev 1.6 11/2017 mΩ mV 615 TINTERNAL ≤ 100ºC NBM™ Bus Converter Page 7 of 26 W VSEC_DC = 12 – 15.3V VSEC_DC = 14V, IPRI_OUT_DC = 53.3A SEC to PRI Efficiency (Ambient) 12.5 NBM6123x46C15A6yzz Electrical Specifications (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit 300 µF Protection SECONDARY to PRIMARY (Reverse Direction) Excessive capacitance may drive module into short circuit protection when starting from Secondary to Primary Effective Primary Output Capacitance (External) CPRI_OUT_EXT Secondary Overvoltage Lockout Threshold VSEC_OVLO+ 16 16.7 17.4 V Secondary Overvoltage Recovery Threshold VPRI_OVLO– 15.3 16 16.7 V Secondary Overvoltage Lockout Response Time tPRI_OVLO Secondary Undervoltage Lockout Threshold VSEC_UVLO– 9.3 10 10.7 V Secondary Undervoltage Recovery Threshold VPRI_UVLO+ 10 10.7 11.4 V Secondary Undervoltage Lockout Response Time tSEC_UVLO 30 100 Primary Output Overcurrent Trip Threshold IPRI_OUT_OCP Powertrain is stopped but current can flow from Secondary to Primary through MOSFET body diodes Primary Output Overcurrent Response Time Constant tPRI_OUT_OCP Effective internal RC filter Primary Short Circuit Protection Trip Threshold IPRI_SCP Primary Short Circuit Protection Response Time tPRI_SCP NBM™ Bus Converter Page 8 of 26 µs Powertrain is stopped but current can flow from Secondary to Primary through MOSFET body diodes 59 66.7 4 80 80 A ms A 1 Rev 1.6 11/2017 µs µs NBM6123x46C15A6yzz 200 180 Secondary Output Current (A) 160 140 120 100 80 60 40 20 0 25 50 75 100 125 Case Temperature (°C) Top only at temperature Top and leads at temperature Leads at temperature Top, leads, & belly at temperature 3000 Secondary Output Current (A) Secondary Output Power (W) Figure 1 — Specified thermal operating area 2700 2400 2100 1800 1500 1200 900 600 300 0 36 37 38 39 40 41 42 43 44 45 46 200 180 160 140 120 100 80 60 40 20 0 36 37 38 Primary Input Voltage (V) PSEC_OUT_DC 39 PSEC_OUT_PULSE ISEC_OUT_DC Secondary Output Capacitance (% Rated CSEC_EXT_MAX) Figure 2 — Specified electrical operating area using rated RSEC_HOT 110 100 90 80 70 60 50 40 30 20 10 0 0 20 40 60 80 Secondary Output Current (% ISEC_OUT_DC) Figure 3 — Specified primary start up into load current and external capacitance NBM™ Bus Converter Page 9 of 26 40 41 42 43 44 Primary Input Voltage (V) Rev 1.6 11/2017 100 ISEC_OUT_PULSE 45 46 NBM6123x46C15A6yzz Signal Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Temperature Monitor • The TM pin is a standard analog I/O configured as an output from an internal µC. • The TM pin monitors the internal temperature of the controller IC within an accuracy of ±5°C. • µC 250kHz PWM output internally pulled high to 3.3V. SIGNAL TYPE STATE Start Up ATTRIBUTE Powertrain Active to TM Time TM Duty Cycle TM Current SYMBOL CONDITIONS / NOTES MIN TYP MAX 100 tTM 18.18 TMPWM ITM UNIT µs 68.18 % 4 mA Recommended External filtering DIGITAL OUTPUT Regular Operation TM Capacitance (External) CTM_EXT Recommended External filtering 0.01 µF TM Resistance (External) RTM_EXT Recommended External filtering 1 kΩ 10 mV / °C 1.27 V Specifications using recommended filter TM Gain TM Voltage Reference TM Voltage Ripple ATM VTM_AMB VTM_PP Internal temperature = 27ºC RTM_EXT = 1kΩ, CTM_EXT = 0.01µF, VPRI_DC = 42V, ISEC_DC = 160A 28 TINTERNAL ≤ 100ºC mV 40 Enable / Disable Control • The EN pin is a standard analog I/O configured as an input to an internal µC. • It is internally pulled high to 3.3V. • When held low, the NBM internal bias will be disabled and the powertrain will be inactive. • In an array of NBMs, EN pins should be interconnected to synchronize start up. • Unit must not be disabled if a load is present on +VPRI while in reverse operation. SIGNAL TYPE STATE Start Up ANALOG INPUT ATTRIBUTE EN to Powertrain Active Time EN Voltage Threshold Regular Operation EN Resistance (Internal) EN Disable Threshold SYMBOL tEN_START CONDITIONS / NOTES TYP MAX 10 Internal pull up resistor VEN_DISABLE_TH NBM™ Bus Converter Rev 1.6 Page 10 of 26 11/2017 UNIT ms 2.3 VEN_TH REN_INT MIN VPRI_DC > VPRI_UVLO+, EN held low both conditions satisfied for T > tPRI_UVLO+_DELAY V 1.5 kΩ 1 V NBM6123x46C15A6yzz Signal Characteristics (Cont.) Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Auxiliary Voltage Source • The VAUX pin is a standard analog I/O configured as an output from an internal µC. • VAUX is internally connected to µC output and internally pulled high to a 3.3V regulator with 2% tolerance, a 1% resistor of 1.5kΩ. • VAUX can be used as a “Ready to process full power” flag. This pin transitions VAUX voltage after a 2ms delay from the start of powertrain activating, signaling the end of softstart. • VAUX can be used as “Fault flag”. This pin is pulled low internally when a fault protection is detected. SIGNAL TYPE ANALOG OUTPUT STATE ATTRIBUTE SYMBOL Start Up Powertrain ­active to VAUX time tVAUX VAUX Voltage VVAUX VAUX Available Current IVAUX Regular Operation Fault VAUX Voltage Ripple VVAUX_PP VAUX Capacitance (External) CVAUX_EXT VAUX Resistance (External) RVAUX_EXT VAUX Fault Response Time tVAUX_FR CONDITIONS / NOTES MIN TYP MAX 2 Powertrain active to VAUX High 2.8 ms 3.3 V 4 mA 50 100 TINTERNAL ≤ 100ºC 0.01 VPRI_DC < VµC_ACTIVE From fault to VVAUX = 2.8V, CVAUX = 0pF Signal Ground • Signal ground is internally connect to PGND through a zero ohm resistor. • Internal SGND traces are not designed to support high current. NBM™ Bus Converter Rev 1.6 Page 11 of 26 11/2017 1.5 UNIT mV µF kΩ 10 µs NBM™ Bus Converter Rev 1.6 Page 12 of 26 11/2017 VAUX TM OUTPUT OUTPUT OUTPUT EN +VPRI +VSEC BIDIR INPUT VµC_ACTIVE STARTUP tVAUX VPRI_UVLO- VPRI_OVLO- OVERVOLTAGE tPRI_UVLO+_DELAY VPRI_UVLO+ VPRI_OVLO+ VNOM E > tPRI_UVLO+_DELAY tAUTO-RESTART tSEC_OUT_SCP SHUTDOWN E AG T T H L W G EN VO LO HI S EV T D D T RE I E U FF E LL ULL CU NP N-O UT I U R P P P Y R CI IN E E A R TU C BL ABL RT _D M I A O I R VP EN EN PR SH RT TA ENABLE CONTROL OVERCURRENT AG up LT ll O u N O P RV N- AL UT VE R P N O TU TER UT UT E YO N U T IN Z I NP P R L I O X N A I U Y IA D N C IT R AR VA _D IN CON TU RI & M I P V N µc SE PR E NBM6123x46C15A6yzz NBM Forward Direction Timing Diagram VAUX TM OUTPUT OUTPUT OUTPUT EN +VSEC +VPRI BIDIR INPUT NBM™ Bus Converter Rev 1.6 Page 13 of 26 11/2017 tVAUX STARTUP VPRI = +VSEC – (~1.4V) tPRI_UVLO+_DELAY VSEC_UVLO+ VµC_ACTIVE VSEC_UVLO- VSEC_OVLO- OVERVOLTAGE VSEC_OVLO+ VNOM > tPRI_UVLO+_DELAY GH HI NOT SUPPORTED CONDITION, PERMANENT DAMAGE MAY OCCUR OVERCURRENT tAUTO-RESTART W tPRI_OUT_OCP LO SHUTDOWN RED LINE: LOAD MUST NOT BE PRESENT TO PREVENT DAMAGE TO UNIT T EN T FF / EV PU N-O T D D T N I R I LE LE EN U T Y UR UL PUL RR IRC PU AR E T P U C N D I C T N AG LE LE C ER OR _D AB NAB CO OLT V EC E H N S O S S V E E V RT TA ES ENABLE CONTROL p E l-u AG ul T N P -O A L OL RV T R N RN E U U T TE TP OV E Y IZ OU N UT X IN L R P A Y I IN AU DA IT R -O V DC IN IMA URN ON C_ & C E c V S EN µ PR T SE NBM6123x46C15A6yzz NBM Reverse Direction Timing Diagram NBM6123x46C15A6yzz High Level Functional State Diagram Conditions that cause state transitions are shown along arrows. Sub-sequence activities listed inside the state bubbles. Application of input voltage to VPRI_DC VµC_ACTIVE < VPRI_DC < VPRI_UVLO+ STANDBY SEQUENCE Application of input voltage to VSEC_DC VµC_ACTIVE < VSEC_DC K < VPRI_UVLO+ VPRI_DC > VPRI_UVLO+ or VSEC_DC > VSEC_UVLO+ STARTUP SEQUENCE TM Low TM Low EN High EN High VAUX Low VAUX Low Powertrain Stopped Powertrain Stopped ENABLE falling edge, or OTP detected Fault Autorecovery FAULT SEQUENCE TM Low EN High VAUX Low tPRI_UVLO+_DELAY expired ONE TIME DELAY INITIAL STARTUP Input OVLO or UVLO, Output OCP, UTP, OVLO or UVLO, or Input OCP detected ENABLE falling edge, or OTP detected Input OVLO or UVLO, Output OCP, UTP, OVLO or UVLO, or Input OCP detected Powertrain Stopped Short Circuit detected SUSTAINED OPERATION TM PWM EN High VAUX High Powertrain Active Note: During reverse direction operation a load must not be present if the powertrain is in any stopped state while the supply voltage is present on +VSEC. NBM™ Bus Converter Rev 1.6 Page 14 of 26 11/2017 NBM6123x46C15A6yzz Application Characteristics PRI to SEC, Full Load Efficiency (%) PRI to SEC, Power Dissipation (W) Temperature controlled via top side cold plate, unless otherwise noted. All data presented in this section are collected from primary sourced units processing power in forward direction.See associated figures for general trend data. 20 18 16 14 12 10 8 6 36 37 38 39 40 41 42 43 44 45 46 98.5 98.0 97.5 97.0 -40 -20 0 Primary Input Voltage (V) TTOP SURFACE CASE: -40°C 25°C 80°C VPRI: 99 98 97 96 95 94 93 92 91 90 89 88 16 32 48 64 80 96 112 36V 42V 128 144 160 0 46V 48 64 80 PRI to SEC, Efficiency (%) 16 32 36V Figure 8 — Efficiency at TCASE = 25°C 42V 46V 48 64 80 96 112 128 144 160 36V 42V 144 160 46V 96 112 128 144 160 88 80 72 64 56 48 40 32 24 16 8 0 0 16 32 Secondary Output Current (A) VPRI : 100 Figure 7 — Power dissipation at TCASE = –40°C PRI to SEC, Power Dissipation 32 36V VPRI : 99 98 97 96 95 94 93 92 91 90 89 88 16 80 Secondary Output Current (A) Figure 6 — Efficiency at TCASE = –40°C 0 60 88 80 72 64 56 48 40 32 24 16 8 0 Secondary Output Current (A) VPRI : 40 Figure 5 — Full load efficiency vs. temperature; VPRI_DC PRI to SEC, Power Dissipation PRI to SEC, Efficiency (%) Figure 4 — No load power dissipation vs. VPRI_DC 0 20 Case Temperature (ºC) 42V 48 64 80 96 112 128 Secondary Output Current (A) 46V VPRI : 36V 42V Figure 9 — Power dissipation at TCASE = 25°C NBM™ Bus Converter Rev 1.6 Page 15 of 26 11/2017 46V 99 98 97 96 95 94 93 92 91 90 89 88 0 16 32 48 64 80 96 112 128 144 PRI to SEC, Power Dissipation PRI to SEC, Efficiency (%) NBM6123x46C15A6yzz 160 88 80 72 64 56 48 40 32 24 16 8 0 0 16 Secondary Output Current (A) 36V 42V VPRI: PRI to SEC, Output Resistance (mΩ) Figure 10 — Efficiency at TCASE = 80°C 1.5 1.0 0.5 -20 0 20 40 60 80 100 Case Temperature (°C) ISEC_OUT: 64 80 96 112 128 144 160 36V 42V 144 160 46V Figure 11 — Power dissipation at TCASE = 80°C 2.0 -40 48 Secondary Output Current (A) 46V Secondary Output Voltage Ripple (mV) VPRI: 32 120 100 80 60 40 20 0 0 16 32 48 64 80 96 112 128 Secondary Output Current (A) VPRI: 160A Figure 12 — RSEC vs. temperature; Nominal VPRI_DC ISEC_DC = 160A at TCASE = 80°C 140 42V Figure 13 — VSEC_OUT_PP vs. ISEC_DC ; No external CSEC_OUT_EXT. Board mounted module, scope setting: 20MHz analog BW NBM™ Bus Converter Rev 1.6 Page 16 of 26 11/2017 NBM6123x46C15A6yzz Figure 14 — Full load secondary voltage ripple, 270µF CPRI_IN_EXT; No external CSEC_OUT_EXT. Board mounted module, scope setting: 20MHz analog BW Figure 15 — 0A – 160A transient response: CPRI_IN_EXT = 270µF, no external CSEC_OUT_EXT Figure 16 — 160A – 0A transient response: CPRI_IN_EXT = 270µF, no external CSEC_OUT_EXT Figure 17 — Start up from application of VPRI_DC = 42V, 20% ISEC_OUT_DC, 100% CSEC_OUT_EXT Figure 18 — Start up from application of EN with pre-applied VPRI_DC = 42V, 20% ISEC_OUT_DC, 100% CSEC_OUT_EXT NBM™ Bus Converter Rev 1.6 Page 17 of 26 11/2017 NBM6123x46C15A6yzz General Characteristics Specifications apply over all line and load conditions, unless otherwise noted; boldface specifications apply over the temperature range of –40°C ≤ TINTERNAL ≤ 125°C (T-Grade); all other specifications are at TINTERNAL = 25ºC unless otherwise noted. Attribute Symbol Conditions / Notes Min Typ Max Unit Mechanical Length L 60.87 [2.396] 61.00 [2.402] 61.13 [2.407] mm [in] Width W 24.76 [0.975] 25.14 [0.990] 25.52 [1.005] mm [in] Height H 7.11 [0.280] 7.21 [0.284] 7.31 [0.288] mm [in] Volume Vol Weight W Lead Finish Without heatsink cm3 [in3] 11.06 [0.675] 41 [1.45] g [oz] Nickel 0.51 2.03 Palladium 0.02 0.15 Gold 0.003 0.051 –40 125 µm Thermal Operating Temperature TINTERNAL NBM6123T46C15A6T0R (T-Grade) Thermal Resistance Top Side θINT-TOP Estimated thermal resistance to maximum temperature internal component from isothermal top 1.36 °C/W Estimated thermal resistance to maximum temperature internal component from isothermal leads 1.36 °C/W Estimated thermal resistance to maximum temperature internal component from isothermal bottom 1.24 °C/W 34 Ws/°C Thermal Resistance Leads Thermal Resistance Bottom Side θINT-LEADS θINT-BOTTOM Thermal Capacity °C Assembly Storage Temperature ESD Withstand NBM6123T46C15A6T0R (T-Grade) –40 ESDHBM Human Body Model, “ESDA / JEDEC JDS-001-2012” Class I-C (1kV to
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