End of Life
For new designs, VIA PFM AC-DC Converters » are recommended.
For more information contact Vicor Applications Engineering: www.vicorpower.com/contact-us »
VI BRICK® PFM™
PF175B480C033FP-00
Actual Size:
1.92 x 1.91 x 0.37 in
48,7 x 48,6 x 9,5 mm
S
®
US
C
C
NRTL
US
Isolated AC-DC Converter with PFC
Features
Typical Applications
• Isolated AC-to-DC converter with PFC
• Telecom (WiMAX, Power Amplifiers, Optical Switches)
• Low profile
• Automatic Test Equipment (ATE)
• Power Density: 243 W/in3
• LED lighting
2
• High Efficiency Server Power
330 W in 3.67 in footprint
• Office equipment (Printers, Copiers, Projectors)
• High efficiency (~93%) over world-wide AC mains
°
• Industrial Equipment (Process Controllers, Material
Rectified 85 – 264 VAC
Handling, Factory Automation)
• Secondary-side energy storage
• Switch Mode Power Supplies (SMPS)
• Simplified mounting and thermal management
• SELV 48 V Output
° Efficient power distribution to POL converters
° 3,000 VAC / 4,242 VDC isolation
Product Overview
The VI BRICK® PFM Isolated AC-DC Converter with PFC is an AC-to-DC
converter, operating from a rectified universal AC input to generate an
isolated 48 Vdc output bus with power factor correction. With its ZVS
high frequency Adaptive Cell™ topology, the VI BRICK PFM converter
consistently delivers high efficiency across worldwide AC mains.
Modular PFM converters and downstream DC-DC VI BRICK products
support secondary-side energy storage and efficient power distribution
at 48 V, providing superior power system performance and connectivity from the wall plug to the point-of-load.
• PFC (THD) exceeds EN61000-3-2 requirements
• ZVS high frequency (MHz) switching
• Low profile, high density filtering
• 100°C baseplate operation
Major Specifications
VIN
85 – 264 VAC (rectified)
VOUT
48 VDC (isolated)
POUT
330 W
Nomenclature
Function
Input Voltage
Designator
P
1
F
7
5
Universal (85-264 Vac)
Package
Size
B
Output Voltage
Vout (V) (x10)
4
Grade
C=
T=
8
Temperature
Grade
0
Operating
-20 to 100°C
-40 to 100°C
C
Output Power
Pout (W) (÷10)
0
Storage
-40 to 125°C
-40 to 125°C
VI BRICK® PFM™
Rev 1.7
vicorpower.com
Page 1 of 20
11/2015
800 927.9474
3
3
Baseplate
Pin
Style
F
P
Revision
–
F = Slotted Flange
P = Through hole
0
0
End of Life
PF175B480C033FP-00
Typical Application: Universal AC Input, Quad Output, 300W Power Supply
PRM™
Regulator*
85 264 Vac
+OUT
+IN
Rectifier,
Filter,
Transient
Protection
Converter
-IN
3.3V 6A
Cool-Power®
ZVS Buck
1.8V 8A
VTM™
Transformer
1.0V 100A
48 V
+OUT
PFM™
24 V 7A
Cool-Power®
ZVS Buck
-OUT
PRM™
Regulator*
-OUT
*Vicor recommends the following PRM modules: PRM48JF480T500A00, PRM48JH480T250A00, PR036A480x012xP, PR045A480X040xP
1.0 ABSOLUTE MAXIMUM RATINGS
The Absolute Maximum Ratings below are stress ratings only.
Operation at or beyond these maximum ratings can cause permanent damage to device. Electrical specifications do not apply when operating
beyond rated operating conditions. Positive pin current represents current flowing out of the pin.
1.0 Absolute Maximum Ratings
PARAMETER
MIN
MAX
UNIT
NOTES
Input voltage (+In to -In)
Input voltage (+In to -In)
Input voltage slew rate
RSV1 to –IN
EN to –IN
RSV3 to –IN
Output voltage (+Out to -Out)
Output current
0
0
-25
-0.3
-0.3
-0.3
-0.5
0.0
600
385
25
5.3
5.3
5.3
57.0
10.2
Vpk
Vpk
V/µs
VDC
VDC
VDC
VDC
A
1 ms max
Continuous
Common Mode and Differential Mode
-55
-20
-40
-40
-40
125
100
100
125
125
°C
°C
°C
°C
°C
TEMPERATURE
Operating junction
Operating temperature
Storage temperature
DIELECTRIC WITHSTAND
Dielectric Withstand Input – Output
Dielectric Withstand Input – Base
Dielectric Withstand Output – Base
3000
1500
1500
VRMS
VRMS
VRMS
VI BRICK® PFM™
Rev 1.7
vicorpower.com
Page 2 of 20
11/2015
800 927.9474
Do not connect to this pin
5 V tolerant 3.3 V logic
Do not connect to this pin
Worst case semiconductor
C-Grade; baseplate
T-Grade; baseplate
C-Grade
T-Grade
End of Life
PF175B480C033FP-00
2.0 ELECTRICAL CHARACTERISTICS
Specifications apply over all line and load conditions, 50 Hz and 60 Hz line frequencies, TC= 25°C, unless otherwise noted.
Boldface specifications apply over the temperature range of the specified product grade. COUT is 6800 µF +/- 20% unless otherwise specified.
2.0 Electrical Characteristics
ATTRIBUTE
POWER INPUT SPECIFICATION
Input voltage range,
continuous operation
Input voltage range,
transient, non-operational (peak)
Input voltage cell reconfiguration
low-to-high threshold
Input voltage cell reconfiguration
high-to-low threshold
Input voltage slew rate
Input current (peak)
Source line frequency range
Power factor
Input inductance, maximum
Input capacitance, maximum
NO LOAD SPECIFICATION
Input power – no load, maximum
Input power – disabled, maximum
POWER OUTPUT SPECIFICATION
Output voltage set point
Output voltage, no load
SYMBOL
VIN
VIN
dVIN /dt
IINRP
fline
PF
LIN
TYP
85
1 ms
145
VIN-CR-
132
Common Mode and Differential Mode
-25
h
Output voltage ripple,
switching frequency
VOUT-PP-HF
Output voltage ripple
line frequency
Output capacitance (external)
VOUT-PP-LF
COUT-EXT
TON
Start-up setpoint aquisition time
Tss
Cell reconfiguration response time
TCR
Voltage deviation (transient)
%VOUT-TRANS
Recovery time
TTRANS
Line regulation
%VOUT-LINE
Load regulation
%VOUT-LOAD
Output current (continuous)
IOUT
VI BRICK® PFM™
Rev 1.7
vicorpower.com
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VRMS
VRMS
1.5
1.6
W
W
47.5
49
50.5
V
46
51.5
55
V
55
V
330
W
30
92
93.5
%
91
%
92
%
100
300
mV
3.8
5
V
12000
µF
400
1000
ms
400
5.5
500
11
8
500
1
1
6.9
ms
ms
%
ms
%
%
A
250
0.5
0.5
Full load
10% to 100% load
See Figure 1, SOA
148
1.1
6000
From VIN applied, EN floating
From EN pin release, VIN applied
Full load
Full load
V
µF
EN floating, see Figure 6
EN pulled low, see Figure 7
POUT
600
1.5
PNL
PQ
Output power
VRMS
1
CIN
VOUT-NL
264
V/µs
A
Hz
mH
47
Vin = 230 Vrms, 10% Load
Over all operating steady
state line conditions
Non-faulting abnormal line and load
transient conditions
See Figure 1, SOA
VIN = 230 V, full load,
exclusive of input rectifier losses
85 V < VIN < 264 V, full load,
exclusive of input rectifier losses
85 V < VIN < 264 V, 75% load,
exclusive of input rectifier losses
Over all operating steady-state line and
load conditions, 20 MHz BW, measured
at C3, Figure 29
Over all operating steady-state line and
load conditions, 20 MHz BW
UNIT
25
12
63
0.9
VOUT
MAX
135
Input power >100 W
Differential mode inductance, commonmode inductance may be higher. See
section 10.12, "Source Inductance
Considerations" on Page 19
After bridge rectifier, between +IN and - IN
VOUT
Output turn-on delay
MIN
VIN-CR+
Output voltage range (transient)
Efficiency
CONDITIONS / NOTES
End of Life
PF175B480C033FP-00
2.0 ELECTRICAL CHARACTERISTICS (CONT.)
2.0 Electrical Characteristics (Continued)
ATTRIBUTE
SYMBOL
CONDITIONS / NOTES
MIN
TYP
MAX
UNIT
10.2
A
13.5
µC
POWER OUTPUT SPECIFICATION
(CONTINUED)
Output current (transient)
20 ms duration,
average power ≤POUT, max
IOUT-PK
Output switching cycle charge
QTOT
Output inductance (parasitic)
LOUT-PAR
Output capacitance (internal)
Output capacitance (internal ESR)
POWERTRAIN PROTECTIONS
Input undervoltage turn-on
Input undervoltage turn-off
Input overvoltage turn-on
Input overvoltage turn-off
Output overvoltage threshold
Upper start / restart
temperature threshold (case)
Overtemperature shutdown
threshold (internal)
Overtemperature shutdown
threshold (case)
Undertemperature shutdown
threshold (case)
Lower start / restart temperature
threshold (case)
Overcurrent blanking time
Input overvoltage response time
Input undervoltage response time
Output overvoltage response time
Short circuit response time
Fault retry delay time
Output power limit
COUT-INT
RCOUT
Frequency @ 1 MHz,
simulated J-lead model
Effective value at nominal output voltage
VIN-UVLO+
VIN-UVLOVIN-OVLOVIN-OVLO+
VOUT-OVLO+
See Timing Diagram
See Timing Diagram
65
265
Instantaneous, latched shutdown
55.3
nH
7
0.5
µF
mΩ
74
71
270
273
56.6
83
283
59.0
VRMS
VRMS
VRMS
VRMS
V
TCASE-OTP-
100
°C
TJ-OTP+
130
°C
TCASE-OTP+
110
°C
TCASE-UTP-
T, C Grades
-61
°C
TCASE-UTP+
T, C Grades
-52
°C
TOC
TPOVP
TUVLO
TSOVP
TSC
TOFF
PPROT
Based on line frequency
400
460
Based on line frequency
Powertrain on
Powertrain on, operational state
See Timing Diagram
27
60
39
120
60
10
550
6
51
180
120
330
ms
µs
ms
µs
µs
s
W
Full Load Efficiency vs. Line Voltage
DC Safe Operating Area
420
94.0
6.00
360
93.5
5.00
300
4.00
240
3.00
180
2.00
120
1.00
60
0.00
0
Efficiency (%)
7.00
Output Power (W)
Output Current (A)
1
93.0
92.5
92.0
91.5
91.0
80
100
120
140
160
180
200
220
240
260
85 100 115 130 145 160 175 190 205 220 235 250 265
Input Voltage (VRMS)
Input Voltage (V)
Current
Power
Figure 1 — DC output safe operating area
TCASE:
100°C
25°C
Figure 2 — Full load efficiency vs. line voltage
VI BRICK® PFM™
Rev 1.7
vicorpower.com
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11/2015
800 927.9474
-40°C
End of Life
PF175B480C033FP-00
3.0 SIGNAL CHARACTERISTICS
Specifications apply over all line and load conditions, 50 Hz and 60 Hz line frequencies, TC= 25°C, unless otherwise noted.
Boldface specifications apply over the temperature range of the specified product grade. COUT is 6800 µF +/- 20% unless otherwise specified.
3.0 Signal Characteristics
• The EN pin enables and disables the PFM converter;
when held below 0.8 V the unit will be disabled.
• The EN pin can reset the PFM converter after a latching OVP event.
SIGNAL TYPE
STATE
Startup
DIGITAL INPUT
Standby
ATTRIBUTE
ENABLE : EN
• The EN pin voltage is 3.3 V during normal operation.
• The EN pin is referenced to the –IN pin of the converter.
SYMBOL
CONDITIONS / NOTES
EN enable threshold
EN disable time
EN disable threshold
VEN_EN
tEN_DIS
VEN_DIS
From any point in line cycle
EN resistance to disable
REN_EXT
Max allowable resistance to -IN required
to disable the module
MIN
TYP
MAX UNIT
2.31
9
16
0.99
V
ms
V
4.28
kΩ
RESERVED : RSV1, RSV3
No connections are required to these pins. In noisy enviornments, it is beneficial to add a 0.1 µF capacitor between each reserved pin and -IN.
VI BRICK® PFM™
Rev 1.7
vicorpower.com
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End of Life
PF175B480C033FP-00
4.0 FUNCTIONAL BLOCK DIAGRAM
+IN
Adaptive
Cell™
topology
Primary & Secondary
Powertrain
Q1T
Q3T
CIN-T
Top Cell
Cell
Configuration
Controller
Q2T
Q4T
S1
+OUT
S3
VIN-B
COUT-INT
-OUT
Q1B
Q3B
S2
CIN-B
Bottom Cell
Q2B
Q4B
-IN
3.3 V
Primary-side
Voltage Sense
VIN-B
RSV1
49.9 kΩ
Modulator
EN
RSV3
Powertrain
Enable
-IN
VEAO
-IN
-IN
Micro
controller
Auto Ranger
Control
Fault Latch &
Reset Logic
Enable
Microcontroller:
Fault monitoring
Output
OVP
Fault Monitoring
Output
and OCP/SCP
PFC
Input UVP
& OVP
Internal
OTP /
UTP
PFC Control
Error Amplifier
-IN
VEAO
Output Voltage
with Offset
Figure 3 — Functional block diagram
VI BRICK® PFM™
Rev 1.7
vicorpower.com
Page 6 of 20
11/2015
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-IN
Reference
Voltage with
Ripple Twice the
Supply
Frequency
End of Life
PF175B480C033FP-00
5.0 HIGH LEVEL FUNCTIONAL STATE DIAGRAM
Conditions that cause state transitions are shown along arrows. Sub-sequence activities are listed inside the state bubbles.
Application of
VIN
EN = True
and
No Faults
VIN > VIN-UVLO+
STARTUP
SEQUENCE
Line Frequency
Acquisition
tON Expiry
Powertrain: Stopped
RNG: Auto
STANDBY
EN = False
or
VIN Out of Range
Powertrain: Stopped
RNG: High
OPERATIONAL
VOUT Ramp Up (tss)
Regulates VOUT
EN = False
or
VIN Out of Range
Powertrain: Active
RNG: Auto
PFC: Auto
Overtemp,
Output Short,
or Overload
No Faults
NON LATCHED
FAULT
tOFF delay
Powertrain: Stopped
RNG: High
Output OVP
EN Falling Edge
LATCHED
FAULT
Powertrain: Stopped
RNG: High
Figure 4 — State diagram
VI BRICK® PFM™
Rev 1.7
vicorpower.com
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11/2015
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End of Life
PF175B480C033FP-00
6.0 TIMING DIAGRAMS
Module inputs are shown in blue; Module outputs are shown in brown;
Timing diagram assumes resistive load, adjusted as shown in the diagram, except in the case of output OVP.
1
Input Power
On & UV
Turn-on
2
3
10%
Full
Load
Load
Applied Applied
6
Range
Change
LO to HI
4
5
EN
EN
Forced High
Low
7
8
Input
Input
OV
OV
Turn-off Turn-on
VIN-OVLO+
9
Range
Change
HI to LO
10
Load
Dump
11
12
Load Input Power
Step
Off & UV
Turn-off
VIN-OVLOVIN-CR-
VIN-CR+
VIN-UVLO+
VIN-RMS
Input
VIN-UVLO-
≈30VRMS
EN
VOUT-NL
VOUT
tEN-DIS
tCR
tON
tCR
tPOVP
tON
tON
VOUT
tSS
tSS
Output
tUVLO
tTRANS
(2 places)
ILOAD
13
Input Power
ON & UV
Turn-on
14
Output OC
Fault
15
Output
OC
Recovery
16
Output
OVP
Fault
17
Toggle EN
(Output
OVP
Recovery)
18
Output
OVP
Fault
))
19
Recycle
Input
Power
(Output
OVP
Recovery)
21
Output
SC
Recovery
22
23
24
OT Fault
Line
Input
&
Drop-Out Power
Recovery
Off & UV
Turn-off
))
VIN-UVLO+
Input
20
Output
SC
Fault
VIN-UVLO+
VIN-UVLO-
VIN-RMS
))
))
))
))
))
))
EN
tOC
VOUT
tON
tOC
VOUT-OVLO+
tON
tON
tOC
tOFF+tON
))
))
tSS
Output
tOFF+tON
tOFF+tON
tSOVP
tSC
tOFF+tON
≥tOFF+tON
ILOAD
))
*
))
*
Figure 5 — Timing diagram - * Negative current is externally forced and shown for the purpose of OVP protection scenario.
VI BRICK® PFM™
Rev 1.7
vicorpower.com
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800 927.9474
End of Life
PF175B480C033FP-00
7.0 APPLICATION CHARACTERISTICS
The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data.
No Load Power Dissipation vs. Line,
Module Enabled - Nominal VOUT
3
No Load Power Dissipation vs. Line,
Module Disabled, PC = Low
Power Dissipation (W)
Power Dissipation (W)
3.0
2.5
2
1.5
1
0.5
2.5
2.0
1.5
1.0
0.5
0
85
100 115 130 145 160 175 190 205 220 235 250 265
Input Voltage (VRMS)
TCASE:
100°C
25°C
0.0
85
100 115 130 145 160 175 190 205 220 235 250 265
Input Voltage (V)
-40°C
Figure 6 – Typical no load power dissipation vs. VIN , module enabled.
Figure 7 – No load power dissipation trend vs. VIN , module disabled.
Figure 8 – Typical switching frequency output voltage ripple
waveform, TCASE = 30ºC, VIN = 230 V, IOUT = 6.9 A,
no external ceramic capacitance.
Figure 9 – Typical line frequency output voltage ripple waveform,
TCASE = 30ºC, VIN = 230 V, IOUT = 6.9 A, COUT = 6,800 µF.
Measured at C3, Fig 29.
Figure 10 – Typical output voltage transient response, TCASE = 30ºC,
VIN = 230 V, IOUT = 1.0 A to 6.7 A, COUT = 6,800 µF.
Figure 11 – Typical startup waveform, application of VIN ,
RLOAD = 7.1 Ω, COUT = 6,800 µF.
VI BRICK® PFM™
Rev 1.7
vicorpower.com
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11/2015
800 927.9474
End of Life
PF175B480C033FP-00
7.0 APPLICATION CHARACTERISTICS (CONTINUED)
The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data.
Figure 12 – Typical startup waveform, EN pin release, VIN = 240 V,
RLOAD = 7.1 Ω, COUT = 6,800 µF.
Figure 13 – Line drop out, 50 Hz, 0° phase, VIN = 230 V,
ILOAD = 6.8A, COUT = 6,800 µF.
Figure 14 – Line drop out, 50 Hz, 90° phase, VIN = 230 V,
ILOAD = 6.8A, COUT = 6,800 µF.
Figure 15 – Typical conducted emissions, full load, 3x0.47uF X caps
+IN to -IN, no CM filter. COUT = 6,800 µF, -Out grounded.
Input Current Harmonics
800
Current [mA]
700
600
500
400
300
200
100
0
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
230 V, 50 Hz
1/3x EN61000-3-2, Class A
EN61000-3-2, Class D
Figure 16 – Typical line current waveform, VIN = 120 V,
PLOAD = 330 W.
Figure 17 – Typical input current harmonics, full load vs. VIN.
VI BRICK® PFM™
Rev 1.7
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11/2015
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End of Life
PF175B480C033FP-00
7.0 APPLICATION CHARACTERISTICS (CONTINUED)
The following figures present typical performance at TC = 25ºC, unless otherwise noted. See associated figures for general trend data.
0.96
Efficiency (%)
0.92
0.90
0.88
0.86
0.84
0.82
40
94
36
92
32
90
28
88
24
86
20
84
16
82
12
80
8
78
4
76
0
0
0.80
0
0.5 1
1.5 2
2.5 3
3.5 4
4.5 5
5.5 6
0.5 1
6.5 7
100 V, 60 Hz
VIN:
120 V, 60 Hz
240 V, 50 Hz
3.5 4
4.5 5
5.5 6
6.5 7
100 V Power Diss
240 V Eff
115 V Eff
100 V Eff
115 V Power Diss
240 V Power Diss
Figure 19 – VIN to VOUT efficiency and power dissipation
vs. VIN and IOUT, TCASE = -40ºC.
Figure 18 – Typical power factor vs. VIN and IOUT.
Efficiency & Power Dissipation TCASE = 25°C
Efficiency & Power Dissipation TCASE = 100°C
40
96
40
94
36
94
36
92
32
92
32
90
28
90
28
88
24
88
24
86
20
86
20
84
16
84
16
82
12
82
12
80
8
80
8
78
4
78
4
76
0
76
0
0.5 1
1.5 2
2.5 3
3.5 4
4.5 5
5.5 6
Efficiency (%)
96
Power Dissipation (W)
Efficiency (%)
2.5 3
Load Current (A)
Load Current (A)
VIN:
1.5 2
6.5 7
0
0
0.5 1
1.5 2
Load Current (A)
VIN:
100 V Eff
100 V Power Diss
2.5 3
3.5 4
4.5 5
5.5 6
6.5 7
Load Current (A)
VIN:
240 V Eff
115 V Eff
115 V Power Diss
100
80
60
40
20
240 V Power Diss
Effective internal input (CIN_INT) capacitance
vs. applied voltage
3.0
Effective capacitance (μF)
120
240 V Eff
115 V Eff
115 V Power Diss
Figure 21 – VIN to VOUT efficiency and power dissipation
vs. VIN and IOUT , TCASE = 100ºC.
Powertrain Equivalent Input Resistance (rEQ_IN)
vs. Input Voltage
140
100 V Eff
100 V Power Diss
240 V Power Diss
Figure 20 – VIN to VOUT efficiency and power dissipation
vs. VIN and IOUT , TCASE = 25ºC.
Input Resistance (Ω)
Power Dissipation (W)
Power Factor
0.94
96
Power Dissipation (W)
Efficiency & Power Dissipation TCASE = -40°C
Power Factor vs. Load and VIN TCASE = 25°C
0.98
2.5
2.0
1.5
1.0
0.5
0.0
0
85
100 115 130 145 160 175 190 205 220 235 250 265
85 100 115 130 145 160 175 190 205 220 235 250 265
Input Voltage (V)
Input Voltage ( VRMS )
Parallel Mode (Low)
Series Mode (High)
Figure 22 – Dynamic input resistance vs. VIN , IOUT = 6.9 A.
Figure 23 – Effective input capacitance vs. VIN.
VI BRICK® PFM™
Rev 1.7
vicorpower.com
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11/2015
800 927.9474
End of Life
PF175B480C033FP-00
8.0 GENERAL CHARACTERISTICS
Specifications apply over all line and load conditions, TC = 25°C, unless otherwise noted.
8.0 General Characteristics
ATTRIBUTE
MECHANICAL
Length
Width
Height
Volume
Weight
Pin material
Underplate
SYMBOL
MIN
L
W
H
Vol
W
Any operating
condition
TC
TYP
MAX
48.6 / [1.91]
48.7 / [1.92]
9.50 / [0.37]
22.5 / [1.37]
57.5 / [2.03]
C10200 copper, full hard
Nickel
Pure matte tin,
whisker resistant chemistry
Pin finish
THERMAL
Operating baseplate (case)
temperature
Thermal resistance, baseplate
to sink, flat greased surface
Thermal resistance, baseplate
to sink, thermal pad (36964)
Thermal capacity
Thermal design
CONDITIONS / NOTES
C Grade
T Grade
UNIT
mm / [in]
mm / [in]
mm / [in]
cm3 / [in3]
g / [oz]
100
150
200
300
-20
-40
100
µin
°C
0.22
°C / W
0.19
°C / W
44.5
Ws / °C
See Section 10.9
ASSEMBLY
ESDHBM
ESD rating
ESDMM
ESDCDM
Human Body Model,
“JEDEC JESD 22-A114C.01”
Machine Model,
“JEDEC JESD 22-A115B”
Charged Device Model,
“JEDEC JESD 22-C101D”
1000
N/A
V
400
SOLDERING
See application note
Soldering Methods and Procedure
for Vicor Power Modules »
SAFETY & RELIABILITY
MTBF
Agency approvals / standards
Telecordia Issue 2 Method I Case 1;
Ground Benign, Controlled
MIL-HDBK-217
Plus Parts Count - 25°C
ground Benign, Stationary
cTUVus, UL /cUL,
EN, IEC 60950-1
CE, Low Voltage Directive;
2006/95/EC
2.51
MHrs
4.93
MHrs
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
EMI/EMC COMPLIANCE
Harmonics
EN61000-3-2: 2009,
Harmonic Current Emisions –
Class A
VI BRICK® PFM™
Rev 1.7
vicorpower.com
Page 12 of 20
11/2015
800 927.9474
End of Life
PF175B480C033FP-00
9.0 PRODUCT OUTLINE DRAWING AND RECOMMENDED PCB FOOTPRINT
9.1 Module Outline
Figure 24 — Product outline drawing;
Product outline drawings are available in .pdf and .dxf formats.
3D mechanical models are available in .pdf and .step formats.
See http://www.vicorpower.com/pfm for more details.
VI BRICK® PFM™
Rev 1.7
vicorpower.com
Page 13 of 20
11/2015
800 927.9474
End of Life
PF175B480C033FP-00
9.0 PRODUCT OUTLINE DRAWING AND RECOMMENDED PCB FOOTPRINT (CONT.)
9.2 PCB Mounting Specifications
Figure 25 — Recommended PCB pattern;
Product outline drawings are available in .pdf and .dxf formats.
3D mechanical models are available in .pdf and .step formats.
See http://www.vicorpower.com/pfm for more details.
VI BRICK® PFM™
Rev 1.7
vicorpower.com
Page 14 of 20
11/2015
800 927.9474
End of Life
PF175B480C033FP-00
10.0 PRODUCT DETAILS AND DESIGN GUIDELINES
10.1 Building Blocks and System Designs
Full Wave
Rectifier
EMI/TVS
Filter
Approximately
48 Vdc
+IN
+OUT
DC/DC
Converter
-OUT
-IN
LOAD
PFM™ +OUT
Converter
-OUT
85 V – 264 Vac
(Optional)
Figure 26 – 300 W Universal AC to DC Supply
The VI BRICK® PFM Isolated AC-DC Converter with PFC is a
high efficiency AC-to-DC converter, operating from a rectified
universal AC input to generate an isolated SELV 48 VDC output
bus with power factor correction. It is a component of an
AC to DC power supply system such as the one shown in
Figure 26 above.
The input to the PFM converter is a rectified, sinusoidal
AC source with a power factor maintained by the converter
with harmonics conforming to IEC 61000-3-2. Upstream
filtering enables compliance with the standards relevant
to the application (Surge, EMI, etc.).
The PFM converter uses secondary-side energy storage
(at the SELV 48 V bus) and optional PRM™ regulators
to maintain output hold up through line dropouts and
brownouts. Downstream regulators also provide tighter
voltage regulation, if required.
The PF175B480C033FP-00 is designed for standalone
operation; however, it may be part of a system that is
paralleled by downstream DC/DC converters. Please contact
Vicor Sales or refer to our website, www.vicorpower.com, for
higher power applications.
10.2 Power Factor Correction
The converter provides power factor correction over worldwide
AC mains. Power factor correction is disabled in low power
mode to improve efficiency. It is disabled in transient mode to
allow quicker recovery upon input transients. Load transients
that approach the line frequency should be filtered or avoided
as these may reduce PFC.
10.3 Small Signal Characteristics
Figure 28 shows the small signal model of the converter.
Because of its internal feedback loop and PFC modulation,
within its regulation bandwidth (dynamic response shown in
figure 10) the converter’s output can be effectively modeled
with two sources in series and a passive filter:
• A constant, 49 Vdc voltage generator.
• A dependent voltage source, VRIPPLE, which outputs
a variable amplitude sinewave at a frequency
twice the input line.
• A first order filter, ROUT COUT_INT.
+
+
VIN
49V
CIN_INT
rEQ_IN
+
ROUT
COUT_INT
+
RCOUT
VOUT
RLOAD
Vripple
-
-
COUT_EXT
-
Figure 28 – PF175B480C033FP-00 AC small signal model
10.1.1 Traditional PFC Topology
Full Wave
Rectifier
10.1.2 Adaptive Cell™ Topology
With its single stage Adaptive Cell™ topology, the PFM
converter enables consistently high efficiency conversion from
worldwide AC mains to a 48 V bus and efficient secondaryside power distribution.
EMI/TVS
Filter
Isolated
DC / DC 48 V Bus
Converter
Figure 27 – Traditional PFC AC to DC supply
To cope with input voltages across worldwide AC mains
(85-264 Vac), traditional AC-DC power supplies (Figure 27)
use 2 power conversion stages: 1) a PFC boost stage to step up
from a rectified input as low as 85 Vac to ~380 Vdc; and 2) a
DC-DC down converter from 380 Vdc to a 48 V bus.
The efficiency of the boost stage and of traditional power
supplies is significantly compromised operating from
worldwide AC lines as low as 85 Vac.
Output voltage stability is guaranteed as long as hold up
capacitance COUT and load fall within the specified ranges.
Input line stability needs to be verified at system design level.
Magnitude of the dynamic input impedance rEQ_IN is provided
in Figure 22. The input line impedance can be modeled as a
series RLINELLINE circuit. Ceramic decoupling capacitors will not
significantly damp the network because of their low ESR;
therefore in order to guarantee stability the following
conditions must be verified:
RLINE >
LLINE
(CIN_INT + CIN_EXT ) • rEQ_IN
RLINE