PFM™ in a VIA™ Package
AC-DC Converter
PFM4414xB6M48D0yAz
®
S
US
C
C
NRTL
US
Isolated AC-DC Converter with PFC
Features & Benefits
Product Ratings
• Universal input (85 – 264VAC)
• 48V output, regulated, isolated SELV
VIN = 85 – 264V
POUT = up to 400W
VOUT = 48V
IOUT = 8.33A
• 92% typical efficiency
• Built-in EMI filtering
Product Description
• Chassis-mount or board-mount packaging options
The PFM in a VIA Package is a highly advanced 400W AC-DC
converter operating from a rectified universal AC input which
delivers an isolated and regulated Safety Extra Low Voltage (SELV)
48V secondary output.
• Always-on, self-protecting converter control architecture
• SELV Output
This unique, ultra-low-profile module incorporates AC-DC
conversion, integrated filtering and transient surge protection in a
chassis-mount or PCB-mount form factor.
• Two temperature grades including operation to –40°C
• VIA Package
• Robust Mechanical Design
The PFM enables a versatile two-sided thermal strategy which
greatly simplifies thermal design challenges.
• Versatile thermal management capability
When combined with downstream Vicor DC-DC conversion
components and regulators, the PFM allows the Power Design
Engineer to employ a simple, low-profile design which will
differentiate his end-system without compromising on cost or
performance metrics.
• Safe and reliable secondary-side energy storage
• High MTBF
• 140W/in3 power density
• 4414 package
• AC Input Front-End Module provides external rectification
and transient protection (AIM™ sold separately)
Typical Applications
• Small cell base stations
• Telecom switching equipment
• LED lighting
Shown with required
companion component,
AIM
(see pages 2-3)
• Industrial power systems
Size:
4.35 x 1.40 x 0.37in
[110.55 x 35.54 x 9.40mm]
Part Ordering Information
Product
Function
Package
Length
Package
Width
Package
Type
Input
Voltage
Range
Ratio
Output
Voltage
(Range)
Max
Output
Power
Product Grade
PFM
44
14
x
B6
M
48
D0
y
PFM =
Power Factor
Module
Length in
Inches x 10
Width in
Inches x 10
B = Board VIA
V = Chassis VIA
Internal Reference
Rev 1.1
08/2018
Option Field
z
z
A0 = Chassis/Always On
C = –20 to 100°C
A4 = Short Pin/Always On
T = –40 to 100°C
A8 = Long Pin/Always On
PFM4414xB6M48D0yAz
Typical PCB-Mount Applications
J1
Inlet
85 –
264VAC
F1
M2
M1
+OUT
L
+OUT
+IN
AIM1714
MOV
N
–OUT
PFM4414
48V
+
_ 48 V 5 A
+
+
+
C1
C2
C3
–OUT
–IN
2 x Cool-Power®
ZVS Buck
Cool-Power®
ZVS Buck
+
_ 3.3 V 10 A
+
_ 1.8 V 8 A
The PCB terminal option allows mounting on an industry standard printed circuit board, with two different pin lengths. Vicor offers a
variety of downstream DC-DC converters driven by the 48V output of the PFM in a VIA package. The 48V output is usable directly by loads
that are tolerant of the PFC line ripple, such as fans, motors, relays, and some types of lighting. Use downstream DC-DC point-of-load
converters where more precise regulation is required.
Parts List for Typical PCB-Mount Applications
J1
Qualtek 703W IEC 320-C14 Power Inlet
F1
Littelfuse 0216008.MXP 8A 250VAC 5 x 20mm holder
M1
Vicor AIM™ AIM1714BB6MC7D5yzz
M2
Vicor PFM PFM4414BB6M48D0yzz
Nichicon UVR1J472MRD 4700µF 63V 3.4A 22 x 50mm bent 90° x 2 pcs
or
C1
CDE 380LX472M063K022 4700µF 63V 4.9A 30 x 30mm snap x 2 pcs
or
Sic Safco Cubisic LP A712121 10,000µF 63V 6.4A 45 x 75 x 12mm rectangular
or
CDE MLPGE1571 6800µF 63V 5.2A 45 x 50 x 12.5mm, 1 or 2pcs.
MOV
Littelfuse TMOV20RP300E VARISTOR 10kA 300V 250J 20mm
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Typical Chassis-Mount Applications
J1
F1
M1
L
M2
+OUT
+OUT
+IN
48V
Inlet
Fan
85 –
264VAC
AIM1714
MOV
N
–OUT
PFM4414
+
+
+
C1
C2
C3
–OUT
–IN
8
Relays
8
16
Dispensors
Controller
Coin Box
The PFM in a VIA package is available in chassis-mount option, saving the cost of a PCB and allowing access to both sides of the power
supply for cooling. The parts list below minimizes the number of interconnects required between necessary components, and selects
components with terminals traditionally used for point-to-point chassis wiring.
Parts List for Typical Chassis-Mount Applications
J1
Qualtek 719W or 723W IEC 320-C14 Power Inlet
F1
Littelfuse 0216008.MXP 8A 250VAC 5 x 20mm in a J1, or separate fuse holder
M1
Vicor AIM™ AIM1714VB6MC7D5y00
M2
Vicor PFM PFM4414VB6M48D0y00
C1
UCC E32D630HPN103MA67M 10,000µF, 63V 7.4A, 35 x 67mm screw terminal
or
Kemet ALS30A103DE063, 10,000µF 63V 10.8A 36 x 84mm screw terminal
MOV
Littelfuse TMOV20RP300E VARISTOR 10kA 300V 250 20mm
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Pin Configuration
TOP VIEW
+IN 1
3
–IN 2
4 –OUT
+OUT
PFM4414 VIA - Chassis Mount - Terminals Up
TOP VIEW
–IN 2
4 –OUT
+IN 1
3 +OUT
PFM4414 VIA - PCB Mount - Pins Down
Please note that these Pin drawings are not to scale.
Pin Descriptions
Pin Number
Signal Name
Type
1
+IN
INPUT POWER
Positive input power terminal
2
–IN
INPUT POWER
RETURN
Negative input power terminal
3
+OUT
OUTPUT POWER
Positive output power terminal
4
–OUT
OUTPUT POWER
RETURN
Negative output power terminal
Function
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
Min
Max
Unit
Input Voltage +IN to –IN
1ms max
0
600
VPK
Input Voltage (+IN to –IN)
Continuous, Rectified
0
275
VRMS
Output Voltage (+OUT to –OUT)
–0.5
58
VDC
Output Current
0.0
12.4
A
4 [0.45]
in.lbs [N.m]
Screw Torque
4 mounting, 2 input, 2 output
Operating Internal Temperature
T-Grade
–40
125
°C
Storage Temperature
T-Grade
–65
125
°C
Dielectric Withstand *
See note below
Input – Case
Basic Insulation
2121
VDC
Input – Output
Reinforced Insulation
(Internal ChiP™ tested at 4242VDC prior to assembly.)
2121
VDC
Output – Case
Functional Insulation
707
VDC
10.00
500
8.00
400
6.00
300
4.00
200
2.00
100
0.00
0
-60
-40
-20
0
20
40
60
Case Temperature (°C)
Current
Safe operating area
Rev 1.1
08/2018
Power
80
100
Output Power (W)
Output Current (A)
* Please see Dielectric Withstand section. See page 19.
PFM4414xB6M48D0yAz
Electrical Specifications
Specifications apply over all line and load conditions, 50Hz and 60Hz line frequencies, TINT = 25°C, unless otherwise noted; boldface specifications apply over
the temperature range of the specified product grade. COUT is 10,000µF ±20% unless otherwise specified.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
264
VRMS
Power Input Specification
Input Voltage Range,
Continuous Operation
VIN
Input Voltage Range,
Transient, Non-Operational (Peak)
VIN
1ms
600
V
Input Current (Peak)
IINRP
See Figure 8, start-up waveforms
12
A
Source Line Frequency Range
fline
63
Hz
Power Factor
PF
Input power >200W
Input Inductance, Maximum
LIN
Differential mode inductance, common-mode
inductance may be higher. See section
“Source Inductance Considerations” on page 15.
Input Capacitance, Maximum
CIN
After AIM™, between +IN and –IN
85
47
0.96
1
mH
1.5
µF
15
W
50
V
No Load Specification
Input Power – No Load, Maximum
PNL
Power Output Specification
Output Voltage Set Point
VOUT
Output voltage, No Load
VOUT-NL
VIN = 230VRMS, 100% load
46
Over all operating steady-state line conditions.
42
54
V
30
57.6
V
400
W
Output Voltage Range (Transient)
VOUT
Non-faulting abnormal line and
load transient conditions
Output Power
POUT
See SOA on Page 5
Efficiency
η
48
VIN = 230V, full load, exclusive of AIM losses
90.5
92.4
%
85V < VIN < 264V, full load, exclusive of
AIM losses
90.0
92.1
%
85V < VIN < 264V, full load,
exclusive of AIM losses
88.5
91.7
%
Output Voltage Ripple,
Switching Frequency
VOUT-PP-HF
Over all operating steady-state line and load
conditions, 20MHz BW, measured at output, Figure 5
200
2000
mV
Output Voltage Ripple
Line Frequency
VOUT-PP-LF
Over all operating steady-state line and load
conditions, 20MHz BW
3.0
7.0
V
Output Capacitance (External)
COUT-EXT
Allows for ±20% capacitor tolerance
15000
µF
6800
Output Turn-On Delay
TON
From VIN applied
500
1000
ms
Start-Up Set-Point Aquisition Time
TSS
Full load
500
1000
ms
TCR
Full load
5.5
11
ms
20
%
600
ms
Cell Reconfiguration Response Time
Voltage Deviation (Transient)
%VOUT-TRANS
–37.5
Recovery Time
TTRANS
Line Regulation
%VOUT-LINE
Full load
3
%
Load Regulation
%VOUT-LOAD
10% to 100% load
3
%
Output Current (Continuous)
Output Current (Transient)
IOUT
IOUT-PK
300
SOA
8.33
A
20ms duration, average power ≤POUT, max
12.5
A
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions, 50Hz and 60Hz line frequencies, TINT = 25°C, unless otherwise noted; boldface specifications apply over
the temperature range of the specified product grade. COUT is 10,000µF ±20% unless otherwise specified.
Attribute
Symbol
Conditions / Notes
Min
Typ
132
135
Max
Unit
Powertrain Protections
Input Undervoltage Threshold,
High Range
VUVLOH-
Input Undervoltage Recover,
High Range
VUVLOH+
Input Undervoltage Turn-On,
Low Range
VIN-UVLOL+
Input Undervoltage Turn-Off,
Low Range
VIN-UVLOL-
Input Overvoltage Turn-On
VIN-OVLO-
Input Overvoltage Turn-Off
VIN-OVLO+
See Timing Diagram
See Timing Diagram
145
148
VRMS
74
83
VRMS
65
71
VRMS
265
270
VRMS
58
273
287
VRMS
61
64
V
Output Overvoltage Threshold
VOUT-OVLO+
Upper Start / Restart
Temperature Threshold (Case)
TCASE-OTP-
Overtemperature Shutdown
Threshold (Internal)
TINT-OTP+
125
°C
Overtemperature Shutdown
Threshold (Case)
TCASE-OTP+
110
°C
Overcurrent Blanking Time
TOC
Instantaneous, latched shutdown
VRMS
100
Based on line frequency
400
°C
460
550
ms
Input Overvoltage Response Time
TPOVP
40
ms
Input Undervoltage Response Time
TUVLO
Based on line frequency
200
ms
Output Overvoltage Response Time
TSOVP
Powertrain on
30
ms
Short Circuit Response Time
TSC
Powertrain on, operational state
270
µs
Fault Retry Delay Time
TOFF
See Timing Diagram
10
s
Output Power Limit
PPROT
50% overload for 20ms typ allowed
Rev 1.1
08/2018
400
W
Output
Input
Rev 1.1
08/2018
ILOAD
VOUT
VIN-RMS
tON
≈30VRMS
VIN-UVLOL+
1
Input Power
On & UV
Turn-on
VOUT-NL
VOUT
tPOVP
tON
tSS
VIN-OVLO-
7
8
Input
Input
OV
OV
Turn-off Turn-on
VIN-OVLO+
tCR
6
Range
Change
LO to HI
VIN-UVLOH+
2
3
10%
Full
Load
Load
Applied Applied
tUVLO
VIN-UVLOH-
10
11
Load Input Power
Step
Off & UV
Turn-off
tTRANS
(2 places)
9
Load
Dump
PFM4414xB6M48D0yAz
Timing Diagram
Output
Input
Rev 1.1
08/2018
ILOAD
VOUT
VIN-RMS
tSS
tON
tOFF+tON
tOC
tOC
14
Output OC
Fault
VIN-UVLOL+
13
Input Power
ON & UV
Turn-on
tOFF+tON
tOC
15
Output
OC
Recovery
))
))
*
tSOVP
))
))
tON
VIN-UVLOL+
19
Recycle
Input
Power
(Output
OVP
Recovery)
VOUT-OVLO+
18
Output
OVP
Fault
tSC
tOFF+tON
20
Output
SC
Fault
tOFF+tON
21
Output
SC
Recovery
≥tOFF+tON
VIN-UVLOL-
22
23
24
OT Fault
Line
Input
&
Drop-Out Power
Recovery
Off & UV
Turn-off
PFM4414xB6M48D0yAz
Timing Diagram (Cont.)
PFM4414xB6M48D0yAz
Application Characteristics
12
No Load Power Dissipation (W)
93.5
Efficiency (%)
93.0
10
92.5
92.0
91.5
91.0
90.5
90.0
85
105
125
145
165
185
205
225
245
8
6
4
2
85
265
105
125
145
Input Line Voltage
–40°C
25°C
185
205
225
245
265
Input Line Voltage
80°C
-40°C
Figure 1 — Full load efficiency vs. line voltage
25°C
80°C
Figure 2 — Typical no load power dissipation vs. VIN ,
module enabled
1.00
800
0.98
700
0.96
Power Factor
Current (mA)
165
600
500
400
300
0.94
0.92
0.90
0.88
0.86
200
0.84
100
0.82
0.80
0
0
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
230V, 50Hz
1/3x EN61000-3-2, Class A
100
200
300
400
Output Power (W)
EN61000-3-2, Class D
VIN:
120V/60Hz
230V/50Hz
100V/50Hz
Figure 3 — Typical input current harmonics, full load vs. VIN using
typical applications circuit on pages 2 & 3
Figure 4 — Typical power factor vs. VIN and IOUT using
typical applications circuit on pages 2 & 3
Figure 5 — Typical switching frequency output voltage ripple
waveform, TCASE = 30ºC, VIN = 230V, IOUT = 8.3A, no
external ceramic capacitance, 20MHz BW
Figure 6 — Typical line frequency output voltage ripple waveform,
TCASE = 30ºC, VIN = 230V, IOUT = 8.3A,
COUT = 10,000µF. 20MHz BW
PFM™ in a VIA™ Package
Page 10 of 25
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Application Characteristics (Cont.)
Figure 7 — Typical output voltage transient response,
TCASE = 30ºC, VIN = 230V, IOUT = 8.3A, 2.1A
COUT = 10,000µF
Figure 8 — Typical start-up waveform, application of VIN ,
IOUT = 8.3A, COUT = 10,000µF
Figure 9 — 230V, 120V range change transient response,
IOUT = 8.3A, COUT = 10,000µF
Figure 10 — Line drop out, 230V 50Hz, 0° phase, IOUT = 8.3A,
COUT = 10,000µF
Figure 11 — Line drop out, 90° phase, VIN = 230V, IOUT = 8.3A,
COUT = 10,000µF
Figure 12 — Typical line current waveform, VIN = 120V,
60Hz IOUT = 8.3A, COUT = 10,000µF
PFM™ in a VIA™ Package
Page 11 of 25
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Application Characteristics (Cont.)
Det
Att 20 dB
100
QP Trd
ResBW
INPUT 2
9 kHz
Meas T
55022RED
20 ms Unit
1 MHz
1QP
2AV
22QPB
dB V
10 MHz
SGL
1QP
2AV
22AVB
50
40
40
30
30
13.Jul 2017 14:25
20
30 MHz
13.JUL.2017
14:25:07
13.Jul 2017 12:29
150 kHz
Date:
Figure 13 — Typical EMI spectrum, peak scan, 90% load,
VIN = 115V, COUT = 10,000µF using typical
chassis‑mount application circuit
30 MHz
13.JUL.2017
12:29:36
Figure 14 — Typical EMI spectrum, peak scan, 90% load,
VIN = 230V, COUT = 10,000µF using typical
chassis‑mount application circuit
94
40
92
35
92
35
90
30
90
30
88
25
88
25
86
20
86
20
84
15
84
15
82
10
82
10
80
5
80
5
78
0
0
1
2
VIN:
3
4
5
6
7
Load Current (A)
8
85V
115V
230V
Eff
85V
115V
230V
P Diss
Efficiency (%)
40
Power Dissipation (W)
94
0
9
50
92
45
90
40
88
35
86
30
84
25
82
20
80
15
10
78
VIN:
2
3
4
5
6
7
Load Current (A)
8
85V
115V
230V
Eff
85V
115V
230V
P Diss
9
Figure 17 — VIN to VOUT efficiency and power dissipation vs.
VIN and IOUT , TCASE = 80ºC
PFM™ in a VIA™ Package
Page 12 of 25
2
3
4
5
6
7
Load Current (A)
8
85V
115V
230V
Eff
85V
115V
230V
P Diss
9
Figure 16 — VIN to VOUT efficiency and power dissipation vs.
VIN and IOUT , TCASE = 25ºC
Power Dissipation (W)
94
1
1
VIN:
Figure 15 — VIN to VOUT efficiency and power dissipation vs.
VIN and IOUT , TCASE = –40ºC
0
0
78
Rev 1.1
08/2018
Power Dissipation (W)
150 kHz
Date:
22QPB
60
22AVB
50
Efficiency (%)
1 MHz
70
60
Efficiency (%)
55022RED
20 ms Unit
80
70
20
9 kHz
Meas T
90
SGL
80
QP Trd
ResBW
INPUT 2
100
10 MHz
90
Det
Att 20 dB
dB V
PFM4414xB6M48D0yAz
General Characteristics
Specifications apply over all line and load conditions, 50Hz and 60Hz line frequencies, TC = 25°C, unless otherwise noted; boldface specifications apply over
the temperature range of the specified Product Grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical
Length
L
110.30 [4.34]
110.55 [4.35] 110.80 [4.36]
mm [in]
Width
W
35.29 [1.39]
35.54 [1.40]
35.79 [1.41]
mm [in]
Height
H
9.019 [0.355]
9.40 [0.37]
9.781 [0.385]
mm [in]
Volume
Vol
Weight
W
Without heat sink
36.9 [2.25]
cm3 [in3]
148 [5.2]
g [oz]
Pin Material
C145 copper, half hard
Underplate
Low-stress ductile nickel
50
100
µin
Palladium
0.8
6
µin
Soft Gold
0.12
2
µin
C-Grade, see derating curve in SOA
–20
100
°C
T-Grade, see derating curve in SOA
–40
100
°C
Pin Finish
Thermal
Operating Case Temperature
TC
Thermal Resistance, Pin Side
θINT_PIN_SIDE
1.3
°C/W
θINT_NON_PIN_SIDE
1.7
°C/W
θHOU
0.57
°C/W
54
J/K
Thermal Resistance, Non-Pin Side
Thermal Resistance, Housing
Shell Thermal Capacity
Thermal Design
See Thermal Considerations on Page 17
Assembly
ESD Rating
ESDHBM
Human Body Model,
JEDEC JESD 22-A114C.01
ESDMM
Machine Model,
JEDEC JESD 22-A115B
N/A
ESDCDM
Charged Device Model,
JEDEC JESD 22-C101D
200
1,000
V
Safety
cTÜVus, EN60950-1 and IEC 60950-1
Agency Approvals / Standards
cURus, UL 60950-1 and CAN/CSA 60950-1
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
Touch Current measured in accordance
with IEC 60990 using measuring network
Figure 3 (PFM in a VIA package only)
PFM™ in a VIA™ Package
Page 13 of 25
Rev 1.1
08/2018
0.5
mA
PFM4414xB6M48D0yAz
General Characteristics (Cont.)
Specifications apply over all line and load conditions, 50Hz and 60Hz line frequencies, TC = 25°C, unless otherwise noted; boldface specifications apply over
the temperature range of the specified Product Grade.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
EMI/EMC Compliance
FCC Part 15, EN55022, CISPR22: 2006 +
A1: 2007, Conducted Emissions
Class B Limits - with –OUT
connected to GND
EN61000-4-5: 2006,
Surge Immunity
Level 3, Immunity Criteria A,
external TMOV and fuse, shown
on page 2 or 3, required
Reliability
Case
Reliability Assurance Relex Modeling, Studio 2007, v2]
Temp (°C)
Duty Cycle
Condition
MTBF (MHrs)
FIT
1
Telcordia Issue 2, Method I Case 1
25
100%
GB,GC
0.702
1424
2
MIL-HDBK-217FN2 Parts Count - 25°C Ground Benign,
Stationary, Indoors / Computer
25
100%
GB,GC
0.322
3102
3
Telcordia Issue 2, Method I Case 3
25
100%
GB,GC
2.43
412
PFM™ in a VIA™ Package
Page 14 of 25
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Product Details and Design Guidelines
Input Fuse Selection
PFM in a VIA package products are not internally fused in order
to provide flexibility in configuring power systems. Input line
fusing is recommended at system level, in order to provide thermal
protection in case of catastrophic failure. The fuse shall be
selected by closely matching system requirements with the
following characteristics:
Building Blocks and System Designs
L
+OUT
+IN
–OUT
nn
Recommended fuse: 216 Series Littelfuse 8A or lower current
rating (usually greater than the PFM maximum current at lowest
input voltage)
PFM4414
AIM1714
N
+OUT
–IN
–OUT
nn
Maximum voltage rating
(usually greater than the maximum possible input voltage)
Hold-Up Capacitor
nn
Ambient temperature
nn
Breaking capacity per application requirements
Figure 18 — 400W universal AC-DC supply
nn
Nominal melting I2t
The PFM in a VIA package is a high-efficiency AC-DC converter,
operating from a universal AC input to generate an isolated SELV
48VDC output bus with power factor correction. It is the key
component of an AC-DC power supply system such as the one
shown in Figure 18 above.
Source Inductance Considerations
The input to the PFM in a VIA package is a rectified sinusoidal
AC source with a power factor maintained by the module with
harmonics conforming to IEC 61000-3-2. Internal filtering enables
compliance with the standards relevant to the application (Surge,
EMI, etc.). See EMI/EMC Compliance standards on Page 14.
It is recommended that for a single PFM, the line source inductance
should be no greater than 1mH for a universal AC input of
100 – 240V. If the PFM will be operated at 240V nominal only,
the source impedance may be increased to 2mH. For either of the
preceding operating conditions it is best to be conservative and
stay below the maximum source inductance values. When multiple
PFM’s are used on a single AC line, the inductance should be no
greater than 1mH/N, where N is the number of PFM’s on the AC
branch circuit, or 2mH/N for 240VAC operation. It is important to
consider all potential sources of series inductance including and
not limited to, AC power distribution transformers, structure wiring
inductance, AC line reactors, and additional line filters. Non-linear
behavior of power distribution devices ahead of the PFM may
further reduce the maximum inductance and require testing to
ensure optimal performance.
The module uses secondary-side energy storage (at the SELV
48V bus) to maintain output hold up through line dropouts and
brownouts. Downstream regulators also provide tighter voltage
regulation, if required.
Traditional PFC Topology
Full Wave
Rectifier
The PFM Powertrain uses a unique Adaptive Cell Topology that
dynamically matches the powertrain architecture to the AC line
voltage. In addition the PFM uses a unique control algorithm to
reduce the AC line harmonics yet still achieve rapid response to
dynamic load conditions presented to it at the DC output terminals.
Given these unique power processing features, the PFM can expose
deficiencies in the AC line source impedance that may result in
unstable operation if ignored.
EMI/TVS
Filter
Isolated
48V Bus
DC / DC
Converter
Figure 19 — Traditional PFC AC-DC supply
To cope with input voltages across worldwide AC mains
(85 – 264VAC), traditional AC-DC power supplies (Figure 19)
use two power conversion stages: 1) a PFC boost stage to step up
from a rectified input as low as 85VAC to ~380VDC; and 2) a DC-DC
down converter from 380VDC to a 48V bus.
If the PFM is to be utilized in large arrays, the PFMs should be
spread across multiple phases or sources thereby minimizing the
source inductance requirements, or be operated at a line voltage
close to 240VAC. Vicor Applications should be contacted to assist
in the review of the application when multiple devices are to be
used in arrays.
The efficiency of the boost stage and of traditional power supplies
is significantly compromised operating from worldwide AC lines
as low as 85VAC.
Adaptive Cell™ Topology
With its single stage Adaptive Cell™ topology, the PFM in a VIA
package enables consistently high-efficiency conversion from
worldwide AC mains to a 48V bus and efficient secondary-side
power distribution.
PFM™ in a VIA™ Package
Page 15 of 25
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Fault Handling
Ruggedized Auto Range Functionality
Input Undervoltage (UV) Fault Protection
The input voltage range is determined at power up time, to cover
the input voltage range of either 85 – 132VRMS or 170 – 264VRMS,
called low range and high range. Once selected, dynamic range
changes are limited by the logic explained below.
The input voltage is monitored by the microcontroller to detect an
input under voltage condition. When the input voltage is less than
the UVLO threshold, a fault is detected. After a time tUVLO, the unit
shuts down. Faults lasting less than tUVLO may not be detected.
Such a fault does not go through an auto-restart cycle. Once the
input voltage rises above the UVLO threshold, the unit recovers
from the input UV fault, the powertrain resumes normal switching
after a time tON and the output voltage of the unit reaches the set
point voltage within a time tSS.
Overcurrent (OC) Fault Protection
As long as the fault persists, the module goes through an autorestart cycle with off time equal to tOFF + tON and on time equal to
tOC. Faults shorter than a time tOC may not be detected. Once the
fault is cleared, the module follows its normal start-up sequence
after a time tOFF.
Short Circuit (SC) Fault Protection
The module responds to a short circuit event within a time tSC. The
module then goes through an auto restart cycle, with an off time
equal to tOFF + tON and an on time equal to tSC, for as long as the
short circuit fault condition persists. Once the fault is cleared, the
unit follows its normal start-up sequence after a time tOFF. Faults
shorter than a time tSC may not be detected.
Temperature Fault Protection
The microcontroller monitors the temperature within the PFM.
If this temperature exceeds TINT-OTP+, an overtemperature fault
is detected, and the output voltage of the PFM falls. Once the
case temperature falls below TCASE-OTP-, after a time greater than
or equal to tOFF, the converter recovers and undergoes a normal
restart. For the C-grade version of the converter, this temperature
is 75°C. Faults shorter than a time tOTP may not be detected. If the
temperature falls below TCASE-UTP-, an undertemperature fault is
detected, and the output voltage of the unit falls. Once the case
temperature rises above TCASE-UTP, after a time greater than or equal
to tOFF, the unit recovers and undergoes a normal restart.
In low range, operation continues until the input either drops under
the UVLO threshold (in which case the converter turns off), or until
the input exceeds the range transition threshold.
The increase in input voltage can be temporary, as when handling a
surge on the input, or it could be permanent, as can happen in the
rare occasion when an input is turned on during a brown-out or
sag condition on a high-voltage system:
nn
If the increase is temporary, and the input returns under
range transition threshold within 0.8s, operation continues in
low range.
nn
If the input stays over the range transition threshold, the
converter changes to high range.
In high range, operation continue up to to the OVLO. A surge will
cause the power train to turn off on a short-term basis to protect
itself during the rise in input voltage, and it will return to operation
when the input returns to the operating range.
When the input crosses under the range transition threshold,
the input turns off as it considers this to be the high range UVLO
threshold. If the converter returns above the range transition
threshold within 50ms, the converter will resume operation in high
range. If the converter does not return to operating range, the
system will reset to the default power down condition, monitoring
the input and waiting to decide whether it should start up into low
range or high range.
Output Overvoltage Protection (OVP)
The microcontroller monitors the primary sensed output voltage to
detect output OVP. If the primary sensed output voltage exceeds
VOUT-OVLO+, a fault is latched, and the output voltage of the module
falls after a time tSOVP. Faults shorter than a time tSOVP may not be
detected. This type of fault is a latched fault and requires that the
input power be recycled to recover from the fault.
PFM™ in a VIA™ Package
Page 16 of 25
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Input Line Cycle Skipping
Output Filtering
This model does not have input line cycle skipping. As a result, the
regulation spec is guaranteed from no load to full load. Because of
this, this model does not present high peak to peak output voltage
under low load conditions, limiting perturbation that may affect
downstream regulators ability to regulate their outputs as tightly
as desired. The only sources of output voltage perturbation (from
largest to smallest amplitude) are:
The PFM in a VIA package requires an output bulk capacitor in
the range of 6,800µF to 15,000µF for proper operation of the
PFC front-end. A minimum 10,000µF is recommended for full
rated output. Capacitance can be reduced proportionally for
lower maximum loads.
nn
Discharge of output bulk caps during a dropout condition
The output voltage has the following two components of
voltage ripple:
1. Line frequency voltage ripple: 2 • fLINE Hz component
Surge transients that can cause similar dropout or short‑term
nn
range change
2. Switching frequency voltage ripple: 1MHz module switching
frequency component (see Figure 5).
nn
Input line cycle ripple, with amplitude proportional to
output current
nn
Switching frequency ripple, which can be reduced further with a
higher frequency filter stage if necessary
Noise-sensitive applications should still test to ensure they can
handle or safely ignore these AC transitions on the PFM output
bus, which are expected to be handled by the downstream
point‑of‑load regulators.
Line Frequency Filtering
Output line frequency ripple depends upon output bulk
capacitance. Output bulk capacitor values should be calculated
based on line frequency voltage ripple. High-grade electrolytic
capacitors with adequate ripple current ratings, low ESR and a
minimum voltage rating of 63V are recommended.
lPK
Hold-Up Capacitance
The PFM in a VIA package uses secondary-side energy storage (at
the SELV 48V bus) and downstream regulators to maintain output
hold up through line dropouts and brownouts. The module’s
output bulk capacitance can be sized to achieve the required hold
up functionality.
Figure 20 — Output current waveform
The following formula can be used to calculate hold-up capacitance
for a system comprised of PFM and a downstream regulator:
Where:
loutDC
lfLINE
Hold-up time depends upon the output power drawn from the
PFM in a VIA package based AC-DC front end and the input
voltage range of downstream DC-DC converters.
C = 2 • POUT • (0.005 + td) / (V22 – V12)
lPK/2
Based on the output current waveform, as seen in Figure 20, the
following formula can be used to determine peak-to-peak line
frequency output voltage ripple:
VPPL ~ 0.2 • POUT / (VOUT • fLINE • C )
Where:
C
PFM’s output bulk
capacitance in Farads
td
Hold-up time in seconds
POUT
PFM’s output power in Watts
V2
Output voltage of PFM’s
converter in Volts
V1
Downstream regulator undervoltage turn off (Volts)
–OR–
POUT / IOUT-PK, whichever is greater.
VPPL
Output voltage ripple peak-to-peak line frequency
POUT
Average output power
VOUT
Output voltage set point, nominally 48V
fLINE
Frequency of line voltage
C
Output bulk capacitance
IDC
Maximum average output current
IPK
Peak-to-peak line frequency output current ripple
In certain applications, the choice of bulk capacitance may be
determined by hold-up requirements and low frequency output
voltage filtering requirements. Such applications may use the
greater capacitance value determined from these requirements.
The ripple current rating for the bulk capacitors can be determined
from the following equation:
IRIPPLE ~ 0.8 • POUT / VOUT
Switching Frequency Filtering
This is included within the PFM in a VIA. No external filtering
is necessary for most applications. For the most noise-sensitive
applications, a common-mode choke followed by two caps to PE
GND will reduce switching noise further.
PFM™ in a VIA™ Package
Page 17 of 25
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
The PFM with PFC is designed such that it will comply with
EN55022 Class B for Conducted Emissions with the Vicor AIM™,
AIM1714xB6MC7D5yzz. The emissions spectrum is shown in
Figures 13 & 14. If the positive output is connected to earth ground
or both output terminals are to be left floating, a 4700pF 500V
capacitor on the –OUT terminal to ground is also recommended.
EMI performance is subject to a wide variety of external influences
such as PCB construction, circuit layout etc. As such, external
components in addition to those listed herein may be required in
specific instances to gain full compliance to the standards specified.
Radiated emissions require certification at the system level. For best
results, enclose the product in a steel enclosure. Filtering must be
considered for every conductor leaving the enclosure, which can
present itself as a potential transmission antenna.
In this case, the internal power dissipation is PDISS, θINT_PIN_SIDE and
θINT_NON_PIN_SIDE are thermal resistance characteristics of the VIA
module and the pin-side and non-pin-side surface temperatures
are represented as TC_PIN_SIDE, and TC_NON_PIN_SIDE. It interesting to
notice that the package itself provides a high degree of thermal
coupling between the pin-side and non-pin-side case surfaces
(represented in the model by the resistor θHOU). This feature enables
two main options regarding thermal designs:
nn
Single-side cooling: the model of Figure 21 can be simplified by
calculating the parallel resistor network and using one simple
thermal resistance number and the internal power dissipation
curves; an example for non-pin-side cooling only is shown in
Figure 22.
Transient Voltage Suppression
θINT
The PFM contains line transient suppression circuitry to meet
specifications for surge (i.e. EN61000-4-5) and fast transient
conditions (i.e. EN61000-4-4 fast transient/“burst”) when coupled
with an external TMOV as shown on pages 2 and 3.
The VIA package provides effective conduction cooling from
either of the two module surfaces. Heat may be removed from
the pin‑side surface, the non-pin-side surface or both. The extent
to which these two surfaces are cooled is a key component for
determining the maximum power that can be processed by a
PFM, as can be seen from specified thermal operating area on
Page 5. Since the PFM has a maximum internal temperature
rating, it is necessary to estimate this internal temperature based
on a system‑level thermal solution. To this purpose, it is helpful
to simplify the thermal solution into a roughly equivalent circuit
where power dissipation is modeled as a current source, isothermal
surface temperatures are represented as voltage sources and the
thermal resistances are represented as resistors. Figure 21 shows
the “thermal circuit” for the PFM in a VIA package.
In this case, θINT can be derived as following:
θINT =
PIN_SIDE
+
TC_PIN_SIDE
s
PIN_SIDE
+
s
Figure 21 — Double-sided cooling thermal model
PFM™ in a VIA™ Package
Page 18 of 25
(θ
INT_PIN_SIDE
+ θHOU) • θINT_NON_PIN_SIDE
θINT_PIN_SIDE + θHOU + θINT_NON_PIN_SIDE
nn
Double-side cooling: while this option might bring limited
advantage to the module internal components (given the
surface‑to-surface coupling provided), it might be appealing
in cases where the external thermal system requires allocating
power to two different elements, like for example heat sinks with
independent airflows or a combination of chassis/air cooling.
θHOU
θINT_NON_
s
Figure 22 — Single-sided cooling thermal model
–
PDISS
PIN_SIDE
s
Thermal Considerations
–
TC_NON_
TC_NON_
PDISS
When more than one PFM is used in a system, each PFM should
have its own fuse, TMOV and AIM in a VIA package.
θINT_PIN_SIDE
+
–
EMI Filtering and Transient Voltage Suppression
EMI Filtering
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Powering a Constant-Power Load
Dielectric Withstand
When the output voltage of the PFM in a VIA package module is
applied to the input of the downstream regulator, the regulator
turns on and acts as a constant-power load. When the module’s
output voltage reaches the input undervoltage turn on of the
regulator, the regulator will attempt to start. However, the
current demand of the downstream regulator at the undervoltage
turn‑on point and the hold-up capacitor charging current may
force the PFM in a VIA package into current limit. In this case, the
unit may shut down and restart repeatedly. In order to prevent
this multiple restart scenario, it is necessary to delay enabling a
constant-power load when powered up by the upstream PFM in
a VIA package until after the output set point of the PFM in a VIA
package is reached.
The chassis of the PFM is required to be connected to Protective
Earth when installed in the end application and must satisfy the
requirements of IEC 60950-1 for Class I products. Protective
earthing can be accomplished through dedicated wiring harness
(example: ring terminal clamped by mounting screw) or surface
contact (example: pressure contact on bare conductive chassis or
PCB copper layer with no solder mask).
This can be achieved by
1. Keeping the downstream constant-power load off during power
up sequence,
and
2. Turning the downstream constant-power load on after the
output voltage of the module reaches 48V steady state.
After the initial start up, the output of the PFM can be allowed
to fall to 30V during a line dropout at full load. In this case, the
circuit should not disable the downstream regulator if the input
voltage falls after it is turned on; therefore, some form of hysteresis
or latching is needed on the enable signal for the constant‑power
load. The output capacitance of the PFM in a VIA package should
also be sized appropriately for a constant-power load to prevent
collapse of the output voltage of the module during line dropout
(see Hold-up Capacitance on Page 17). A constant-power load can
be turned off after completion of the required hold up time during
the power-down sequence or can be allowed to turn off when it
reaches its own undervoltage shutdown point.
The PFM contains an internal safety approved isolating component
(ChiP™) that provides the Reinforced Insulation from Input
to Output. The isolating component is individually tested for
Reinforced Insulation from Input to Output at 3000VAC or 4242VDC
prior to the final assembly of the PFM in a VIA package.
When the VIA assembly is complete the Reinforced Insulation can
only be tested at Basic Insulation values as specified in the electric
strength Test Procedure noted in clause 5.2.2 of IEC 60950-1.
Test Procedure Note from IEC 60950-1
“For equipment incorporating both REINFORCED INSULATION and
lower grades of insulation, care is taken that the voltage applied
to the REINFORCED INSULATION does not overstress BASIC
INSULATION or SUPPLEMENTARY INSULATION.”
The timing diagram in Figure 23 shows the output voltage of the
PFM in a VIA package and the downstream regulator’s enablepin
voltage and output voltage of the PRM regulator for the power up
and power down sequence. It is recommended to keep the time
delay approximately 10 to 20ms.
VIA PFM
VOUT
48V – 3%
PRM UV
Turn on
Downstream
Regulator
tDELAY
Enable
Downstream
Regulator
VOUT
tHOLD-UP
Figure 23 — PRM enable hold-off waveforms
PFM™ in a VIA™ Package
Page 19 of 25
Rev 1.1
08/2018
PFM4414xB6M48D0yAz
Summary
The final package assembly contains basic insulation from input
to case, reinforced insulation from input to output, and functional
insulation from output to case.
The output of the PFM in a VIA package complies with the
requirements of SELV circuits so only functional insulation is
required from the output (SELV) to case (PE) because the case
is required to be connected to protective earth in the final
installation. The construction of the PFM in a VIA package can be
summarized by describing it as a “Class II” component installed in
a “Class I” subassembly. The reinforced insulation from input to
output can only be tested at a basic insulation value of 2121VDC on
the completely assembled VIA package.
ChiP Isolation
Input
Output
SELV
RI
Figure 24 — PFM in a ChiP™ package before final assembly in the
VIA package
VIA PFM Isolation
VI ChiP
Input
Output
VIA Input Circuit
SELV
VIA Output Circuit
RI
BI
PE
FI
Figure 25 — PFM in a VIA package after final assembly
PFM™ in a VIA™ Package
Page 20 of 25
Rev 1.1
08/2018
PFM™ in a VIA™ Package
Page 21 of 25
.11
2.90
Product outline drawing; product outline drawings are available in .pdf and .dxf formats.
3D mechanical models are available in .pdf and .step formats.
Rev 1.1
08/2018
1.65 [41.93]
1.61 [40.93]
1.61 [40.93]
2.17 [55.12]
4414 PFM 3kV
4914 PFM
1.61 [40.93]
4414 BCM - OUT RETURN TO CASE
4414 PFM
1.61 [40.93]
4414 BCM
4414 UHV BCM
1.02 [25.96]
3814 BCM - OUT RETURN TO CASE
1.757 [44.625]
1.658 [42.110]
1.757 [44.625]
1.718 [43.625]
1.277 [32.430]
1.757 [44.625]
1.277 [32.430]
1.277 [32.430]
1.150 [29.200]
1.61 [40.93]
1.02 [25.96]
3714 DCM
.788 [20.005]
DIM ‘A’
1.61 [40.93]
3414 DCM
DIM ‘B’
DIM 'C'
86(7PP@
127(6
1.40
35.54
USE TYCO LUG #696049-1 OR EQUIVALENT
FOR PRODUCTS WITH - OUT RETURN TO CASE,
USE TYCO LUG #2-36161-6 OR EQUIVALENT
FOR ALL OTHER PRODUCTS.
OUTPUT
INSERT
(41817)
TO BE
REMOVED
PRIOR
TO USE
PFM4414xB6M48D0yAz
PFM in a VIA Package Chassis-Mount Package Mechanical Drawing
PFM™ in a VIA™ Package
Page 22 of 25
Rev 1.1
08/2018
SEATING
PLANE
.11
2.90
.947±.025
24.058±.635
.112±.025
2.846±.635
1.171
29.750
.37±.015
9.40±.381
2
1
DIM 'F'
±.025 [.635]
.080
2.032
(2) PL.
DIM 'A'
11
10
BOTTOM SIDE
DIM 'F'
±.025 [.635]
.010 [.254]
DIM 'C'
(COMPONENT SIDE)
TOP VIEW
DIM 'B'
13
12
.150
3.810
(2) PL.
.15
3.86
(TYP)
4
3
1.65 [41.93]
1.61 [40.93]
1.61 [40.93]
2.17 [55.12]
4414 UHV BCM
4414 PFM
4414 PFM 3kV
4914 PFM
.156±.025
3.970±.635
.859±.025
21.810±.635
1.757 [44.625]
1.658 [42.110]
1.757 [44.625]
1.150 [29.200]
DIM 'C'
4.91 [124.75]
4.35 [110.55]
4.35 [110.55]
4.35 [110.55]
4.35 [110.55]
3.75 [95.13]
3.38 [85.93]
DIM 'D'
4.517 [114.741]
3.957 [100.517]
3.957 [100.517]
3.957 [100.517]
3.957 [100.517]
3.350 [85.092]
2.988 [75.897]
1.40
35.54
DIM 'F'
1.999 [50.777]
1.439 [36.554]
1.439 [36.554]
1.479 [37.554]
1.439 [36.554]
1.439 [36.554]
1.439 [36.554]
6HH3LQ&RQILJXUDWLRQDQG3LQ'HVFULSWLRQVHFWLRQVIRUSLQGHVLJQDWLRQV
8QOHVVRWKHUZLVHVSHFLILHGGLPHQVLRQVDUH,QFK>PP@
127(6
1.757 [44.625]
1.61 [40.93]
4414 BCM
.186±.020
4.720±.508
LONG PINS
(4) PL.
.107±.020
[2.713±.508]
SHORT PINS
(4) PL.
SEATING
PLANE
1.718 [43.625]
1.61 [40.93]
3714 DCM
DIM 'B'
3414 DCM
.788 [20.005]
DIM 'A'
1.61 [40.93]
PRODUCT
PFM4414xB6M48D0yAz
PFM in a VIA Package PCB-Mount Package Mechanical Drawing
PFM™ in a VIA™ Package
Page 23 of 25
1.171±.003
29.750±.076
.947±.003
24.058±.076
.112±.003
2.846±.076
Rev 1.1
08/2018
.172±.003
4.369±.076
PLATED THRU
.064 [1.626]
ANNULAR RING
(4) PL.
DIM 'D'
±.003 [.076]
1.61 [40.93]
2.17 [55.12]
4914 PFM
(COMPONEBT SIDE)
12
1.61 [40.93]
4414 PFM
4414 PFM 3kV
13
1.65 [41.93]
4414 UHV BCM
DIM 'B'
±.003 [.076]
1.757 [44.625]
1.61 [40.93]
4414 BCM
RECOMMENED HOLE PATTERN
10
11
6HH3LQ&RQILJXUDWLRQDQG3LQ'HVFULSWLRQVHFWLRQVIRUSLQGHVLJQDWLRQV
8QOHVVRWKHUZLVHVSHFLILHGGLPHQVLRQVDUH,QFK>PP@
127(6
1
2
.120±.003
3.048±.076
PLATED THRU
.030 [.762]
ANNULAR RING
(2) PL.
DIM 'F'
±.003 [.076]
1.718 [43.625]
1.61 [40.93]
3714 DCM
DIM 'B'
3414 DCM
3
4
1.757 [44.625]
1.658 [42.110]
1.757 [44.625]
1.150 [29.200]
.788 [20.005]
DIM 'A'
1.61 [40.93]
PRODUCT
DIM 'C'
4.91 [124.75]
4.35 [110.55]
4.35 [110.55]
4.35 [110.55]
4.35 [110.55]
3.75 [95.13]
3.38 [85.93]
DIM 'D'
.190±.003
4.826±.076
PLATED THRU
.030 [.762]
ANNULAR RING
(2) PL.
.859±.003
21.810±.076
DIM 'F'
1.999 [50.777]
1.439 [36.554]
1.439 [36.554]
1.479 [37.554]
1.439 [36.554]
1.439 [36.554]
1.439 [36.554]
.156±.003
3.970±.076
4.517 [114.741]
3.957 [100.517]
3.957 [100.517]
3.957 [100.517]
3.957 [100.517]
3.350 [85.092]
2.988 [75.897]
PFM4414xB6M48D0yAz
PFM in a VIA Package PCB-Mount Package Recommended Land Pattern
PFM4414xB6M48D0yAz
Revision History
Revision
Date
1.0
11/06/17
Initial release
1.1
08/31/18
Updated mechanical specifications
Updated mechanical drawings
PFM™ in a VIA™ Package
Page 24 of 25
Description
Page Number(s)
n/a
Rev 1.1
08/2018
13
21 – 23
PFM4414xB6M48D0yAz
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor
makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves
the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by
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Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Visit http://www.vicorpower.com/ac-dc/converters/isolated-ac-dc-converter-pfc for the latest product information.
Vicor’s Standard Terms and Conditions and Product Warranty
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, and Product Warranty which are available on Vicor’s webpage
(http://www.vicorpower.com/termsconditionswarranty) or upon request.
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VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
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herein, life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b) support or sustain life and
whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to
result in a significant injury to the user. A critical component is any component in a life support device or system whose failure to perform
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Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the
products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property
rights is granted by this document. Interested parties should contact Vicor’s Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
Patents Pending.
Contact Us: http://www.vicorpower.com/contact-us
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
www.vicorpower.com
email
Customer Service: custserv@vicorpower.com
Technical Support: apps@vicorpower.com
©2017 – 2018 Vicor Corporation. All rights reserved. The Vicor name is a registered trademark of Vicor Corporation.
All other trademarks, product names, logos and brands are property of their respective owners.
PFM™ in a VIA™ Package
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