PI3325-00-BGMZ

ZVS Regulators PI332x-00 14 – 42VIN ZVS Buck Regulator Product Description Features & Benefits The PI332x-00 is a family of high‑input‑voltage, wide‑input‑range DC-DC ZVS Buck regulators integrating controller, power switches and support components all within a high‑density System‑in-Package (SiP). • High‑Efficiency HV ZVS Buck Topology The integration of a high-performance Zero-Voltage Switching (ZVS) topology, within the PI332x-00 series, increases point‑of‑load performance providing best‑in‑class power efficiency. The PI332x-00 requires only an external inductor, two voltage selection resistors and minimal capacitors to form a complete DC‑DC switch‑mode buck regulator. • Parallel capable with single‑wire current sharing • Wide input voltage range of 14 – 42V • Power-up into pre-biased load • Input Over/Undervoltage Lockout (OVLO/UVLO) • Output Overvoltage Protection (OVP) • Overtemperature Protection (OTP) • Fast and slow current limits Device Output Voltage IOUT Max • Differential amplifier for output remote sensing Set Range PI3323-00 3.3V 2.2 – 4.0V 22A • –40 to 120°C operating range (TINT), -LGIZ models PI3325-00 5.0V 4.0 – 6.5V 20A • –55 to 120°C operating range (TINT), -LGMZ models • User‑adjustable soft start & tracking Applications • HV to PoL Buck Regulator Applications • Computing, Communications, Industrial, Automotive Equipment Package Information • 10 x 14 x 2.56mm LGA SiP Note: Product images may not highlight current product markings. ZVS Regulators Page 1 of 34 Rev 1.7 05/2021 PI332x-00 Contents Order Information 3 Application Description 27 Thermal, Storage and Handling Information 3 Output Voltage Set Point 27 Absolute Maximum Ratings 3 Soft Start Adjust and Tracking 27 Functional Block Diagram 4 Inductor Pairing 28 Pin Description 5 Parallel Operation 28 Package Pinout 6 Filter Considerations 28 PI332x-00 Common Electrical Characteristics 7 VDR Bias Regulator 29 PI3323-00 (3.3VOUT ) Electrical Characteristics 8 PI3325-00 (5.0VOUT ) Electrical Characteristics Functional Description Layout Guidelines 30 15 LGA Recommended PCB Footprint and Stencil 31 22 LGA Package Drawings 32 ENABLE (EN) 22 Revision History 33 Remote Sensing 22 Warranty 34 Soft Start 22 Output Voltage Selection 22 Output Current Limit Protection 22 Input Undervoltage Lockout 22 Input Overvoltage Lockout 23 Output Overvoltage Protection 23 Overtemperature Protection 23 Pulse Skip Mode (PSM) 23 Variable Frequency Operation 23 Thermal Characteristics 23 SiP Power Dissipation as Percentage of Total System Losses ZVS Regulators Page 2 of 34 26 Rev 1.7 05/2021 PI332x-00 Order Information Product Nominal Output Voltage Rated Output Current 3.3V 22A PI3323-00-LGIZ PI3323-00-LGMZ PI3325-00-LGIZ PI3325-00-LGMZ 5.0V 20A Temperature Range Package Transport Media 10 x 14mm LGA TRAY –40 to 120°C –55 to 120°C –40 to 120°C –55 to 120°C Thermal, Storage and Handling Information Name Rating Storage Temperature –65 to 150°C Internal Operating Temperature -LGIZ –40 to 120°C -LGMZ –55 to 120°C Soldering Temperature for 20 seconds 245°C MSL Rating 3 ESD Rating, JESD22-A114F, JESD22-C101F 2kV HBM; 1kV CDM, respectively Absolute Maximum Ratings Name Rating VIN –0.7 to 55V VS1 –0.7VDC to 55V VOUT –0.5 to 25V SGND ±100mA TRK –0.3 to 5.5V, ±30mA VDR, SYNCI, SYNCO, PWRGD, EN, COMP, EAO, EAIN, VDIFF, VSN, VSP, TESTx –0.3 to 5.5V, ±5mA Notes: Stresses beyond these limits may cause permanent damage to the device. Operation at these conditions or conditions beyond those listed in the Electrical Specifications table is not guaranteed. All voltages are referenced to PGND unless otherwise noted. ZVS Regulators Page 3 of 34 Rev 1.7 05/2021 PI332x-00 Functional Block Diagram VS1 VIN Q2 Q1 VDR Power Control SYNCO SYNCI PWRGD EN TESTx VOUT + - VSP VSN VDIFF VCC ZVS Control + EAIN CEAIN-INT VREF EAO Digital Parametric Trim RZI CHF COMP TRK PGND 0Ω SGND Simplified block diagram ZVS Regulators Page 4 of 34 Rev 1.7 05/2021 PI332x-00 Pin Description Name Location I/O Description VS1 Block 1 Power Switching Node: and ZVS sense for power switches. VIN Block 3 Power Input Voltage: and sense for UVLO, OVLO and feed forward ramp. VDR 5K I/O Gate Driver VCC: Internally generated 5.1V. May be used as a bias supply for low power external loads. See Application Description for important considerations. SYNCI 4K I Synchronization Input: Synchronize to the falling edge of external clock frequency. SYNCI is a high impedance digital input node and should always be connected to SGND when not in use. The PI332x-00 family is not optimized for external synchronization functionality. Refer to Application Description of Parallel Operation for details. SYNCO 3K O Synchronization Output: Outputs a high signal at the start of each clock cycle for the longer of ½ of the minimum period or the on time of the high-side power MOSFET. TEST1 2K I/O Test Connections: Use only with factory guidance. Connect to SGND for proper operation. TEST2 1K I/O Test Connections: Use only with factory guidance. Connect to SGND for proper operation. TEST3 1J I/O Test Connections: Use only with factory guidance. Connect to SGND for proper operation. TEST4 1H I/O Test Connections: Use only with factory guidance. Connect to SGND for proper operation. TEST5 1E I/O Test Connections: Use only with factory guidance. Connect to SGND for proper operation. PWRGD 1G O Power Good: High impedance when regulator is operating and VOUT is in regulation. Otherwise pulls to SGND. EN 1F I/O Enable Input: Regulator enable control. When asserted active or left floating: regulator is enabled. Otherwise regulator is disabled. SGND Block 5 TRK 1C I Soft Start and Track Input: An external capacitor may be connected between TRK pin and SGND to increase the rise time of the internal reference during soft start. COMP 1B O Compensation Capacitor: Connect capacitor for control loop dominant pole. See Error Amplifier section for details. A default CCOMP of 4.7nF is used in the example. EAO 1A O Error Amp Output: External connection for additional compensation and current sharing. EAIN 2A I Error Amp Inverting Input: Connection for the main Vout feedback divider tap VDIFF 3A O Independent Amplifier Output: Active only when module is enabled. VSN 4A I Independent Amplifier Inverting Input: If unused connect in unity gain. VSP 5A I Independent Amplifier Non-Inverting Input: If unused connect to SGND. VOUT 6A,B Power Direct VOUT Connect: for per-cycle internal clamp node and feed-forward ramp. PGND Block2 Power Power Ground: VIN and VOUT power returns. ZVS Regulators Page 5 of 34 Signal Ground: Internal logic ground for EA, TRK, SYNCI, SYNCO communication returns. SGND and PGND are star connected within the regulator package. Rev 1.7 05/2021 PI332x-00 Package Pinout 1 EA0 COMP TRK SGND TEST5 EN PWRG0 TEST4 TEST3 TEST2 2 EAIN SGND SGND SGND SGND PGND PGND PGND PGND TEST1 3 VDIFF SGND SGND SGND SGND PGND PGND PGND PGND SYNC0 4 VSN SGND PGND PGND PGND PGND PGND PGND PGND SYNC1 5 VSP PGND PGND PGND PGND PGND PGND PGND PGND VDR 6 VOUT VOUT PGND PGND PGND PGND PGND PGND PGND PGND 8 VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN 9 VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN 10 VIN VIN VIN VIN VIN VIN VIN VIN VIN VIN PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND VS1 VS1 VS1 VS1 VS1 VS1 VS1 VS1 VS1 VS1 7 11 12 13 14 10x14mm SiP Pin Block Name Group of pins VIN A8-10, B8-10, C8-10, D8-10, E8-10, F8-10, G8-10, H8-10, J8-10, K8-10 VS1 A14, B14, C14, D14, E14, F14, G14, H14, J14, K14 PGND A12, B12, C12, D12, E12, F12, G12, H12, J12, K12 PGND B5, C4-6, D4-6, E4-6, F2-6, G2-6, H2-6, J2-6, K6 VOUT A6, B6 SGND B2-4, C2-3, D1-3, E2-3 ZVS Regulators Page 6 of 34 Rev 1.7 05/2021 PI332x-00 PI332x-00 Common Electrical Characteristics Specifications apply for –40°C < TINT < 120°C for -LGIZ, –55°C < TJ < 115°C for -LGMZ VIN = 24V, EN = High, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit Open Loop Gain [b] 96 120 140 dB Small Signal Gain-Bandwidth [b] 5 7 12 MHz 0.5 1 mV 2.5 V Differential Amp Input Offset Common Mode Input Range –0.1 Differential Mode Input Range 2 V Input Bias Current –1 1 µA Output Current –1 1 mA Maximum VOUT IVDIFF = –1mA Minimum VOUT IVDIFF = –1mA Capacitive Load Range for Stability [b] 4.85 V 0 Slew Rate 20 mV 50 pF 11 V/µs PWRGD VOUT Rising Threshold VPG_HI% 78 84 90 % VOUT_DC VOUT Falling Threshold VPG_LO% 75 81 87 % VOUT_DC PWRGD Output Low VPG_SAT 0.4 V Sink = 4mA VDR Voltage Setpoint VVDR VIN_DC > 10V External Loading IVDR See Application Description for details 4.9 5.05 0 5.2 V 2 mA Enable High Threshold VEN_HI 0.9 1.0 1.1 V Low Threshold VEN_LO 0.7 0.8 0.9 V Threshold Hysteresis VEN_HYS 100 200 300 mV Pull Up Voltage Level for Source Current VEN_PU Pull Up Current IEN_PU_POS 2 V 50 µA MIL-HDBK-217, 25°C, Ground Benign: GB 14.6 MHrs Telcordia SR-332, 25°C, Ground Benign: GB 201 MHrs VIN > 8V, excluding tFR_DLY Reliability MTBF [a] All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI332x evaluation board with 3 x 3” dimensions and four-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to Output Ripple plots. [e] Refer to Load Current vs. Ambient Temperature curves. [f] Refer to Switching Frequency vs. Load current curves. ZVS Regulators Page 7 of 34 Rev 1.7 05/2021 PI332x-00 PI3323-00 (3.3VOUT) Electrical Characteristics Specifications apply for –40°C < TINT < 120°C for -LGIZ, –55°C < TJ < 115°C for -LGMZ VIN = 24V, EN = High, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit 14 24 42 V Input Specifications Input Voltage VIN_DC Input Current IIN_DC Input Current At Output Short (Fault Condition Duty Cycle) IIN_Short VIN = 24V, TCASE = 25°C, IOUT = 22A Short at terminals 3.35 A 5 mA Input Quiescent Current IQ_VIN Disabled 0.94 Input Quiescent Current IQ_VIN Enabled, no load, TCASE = 25°C 3.2 Input Voltage Slew Rate VIN_SR [b] Input capacitance, Internal CIN_INT Effective value VIN = 24V, 25°C 1.6 mA mA 1 0.7 V/µs µF Output Specifications EAIN Voltage Total Regulation Output Voltage Trim Range VEAIN VOUT_DC [b] 0.975 [b] [c] 2.2 Line Regulation ΔVOUT / ΔVIN Load Regulation ΔVOUT / ΔIOUT At 25°C, 2A < IOUT < 20A Output Voltage Ripple At 25°C, 14V < VIN < 42V [d] VOUT_AC IOUT = 20A, COUT = 8 x 100µF, 20MHz BW Output Current IOUT_DC [e] Current Limit IOUT_CL Typical current limit based on nominal 230nH inductor. Maximum Array Size Output Current, Array of 2 Output Current, Array of 3 NPARALLEL 0.990 1.005 3.3 4.0 % 0.10 % 67 mVP-P 22 25.1 [b] IOUT_DC_ARRAY2 Total array capability, IOUT_DC_ARRAY3 Total array capability, [b] see applications section for details see applications section for details V 0.10 0 [b] V A A 3 Modules 0 [g] A 0 [g] A 12.9 13.8 V 1.21 1.75 V Protection Input UVLO Start Threshold VUVLO_START Input UVLO Stop Hysteresis VUVLO_HYS 0.85 1.25 µs Input OVLO Stop Threshold VOVLO 44 47 V Input OVLO Start Hysteresis VOVLO_HYS 0.5 0.9 Input OVLO Response Time tf Input UVLO Response Time Output Overvoltage Protection, Relative VOVP_REL Output Overvoltage Protection, Absolute VOVP_ABS Hysteresis active when OVLO present for at least tFR_DLY Above set VOUT 4.3 [a] 1.3 V 1.25 µs 20 % 4.7 V All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI332x evaluation board with 3 x 3” dimensions and four-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to Output Ripple plots. [e] Refer to Load Current vs. Ambient Temperature curves. [f] Refer to Switching Frequency vs. Load current curves. [g] Contact factory applications for array derating and layout best practices to minimize sharing errors. ZVS Regulators Page 8 of 34 Rev 1.7 05/2021 PI332x-00 PI3323-00 (3.3VOUT) Electrical Characteristics (Cont.) Specifications apply for –40°C < TINT < 120°C for -LGIZ, –55°C < TJ < 115°C for -LGMZ VIN = 24V, EN = High, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit 470 500 530 kHz Timing Switching Frequency Fault Restart Delay fs [f] While in Discontinuous Conduction Mode (DCM) only, SYNCI grounded tFR_DLY 30 ms Synchronization Input (SYNCI) Synchronization Frequency Range fSYNCI SYNCI Threshold VSYNCI –50% and +10% relative to set switching frequency (fS), while in DCM operating mode only. [c] and [f] 250 550 2.5 kHz V Synchronization Output (SYNCO) SYNCO High VSYNCO_HI Source 1mA SYNCO Low VSYNCO_LO Sink 1mA 4.5 V SYNCO Rise Time tSYNCO_RT 20pF load 10 ns SYNCO Fall Time tSYNCO_FT 20pF load 10 ns 0.5 V Soft Start, Tracking and Error Amplifier TRK Active Range (Nominal) VTRK 0 1.4 V TRK Enable Threshold VTRK_OV 20 40 60 mV TRK to EAIN Offset VEAIN_OV 40 80 120 mV ITRK 30 50 70 µA Charge Current (Soft Start) Discharge Current (Fault) ITRK_DIS TRK Capacitance, Internal CTRK_INT Soft-Start Time tSS VTRK = 0.5V 8.7 mA 47 CTRK_EXT = 0µF 0.6 0.94 nF 1.6 ms Error Amplifier Transconductance GMEAO 5.06 mS PSM Skip Threshold PSMSKIP 0.6 V EAIN Capacitance, Internal CEAIN_INT 56 pF [b] Error Amplifier Output Impedance ROUT Internal Compensation Capacitor CHF 1 56 pf Internal Compensation Resistor RZI 5 kΩ [a] MΩ All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI332x evaluation board with 3 x 3” dimensions and four-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to Output Ripple plots. [e] Refer to Load Current vs. Ambient Temperature curves. [f] Refer to Switching Frequency vs. Load current curves. ZVS Regulators Page 9 of 34 Rev 1.7 05/2021 PI332x-00 PI3323-00 (3.3VOUT) Electrical Characteristics (Cont.) 10 95 9 Power Dissipation (W) 97 Efficiency (%) 93 91 89 87 85 83 81 79 77 2 4 6 8 10 12 14 16 18 20 8 7 6 5 4 3 2 1 0 22 2 4 6 8 VIN: 24V 14V VIN: 42V 95 10 93 9 91 89 87 85 83 81 79 77 4 6 8 10 12 14 16 18 20 2 1 4 6 8 VIN: 10 12 14 16 18 24V 14V 42V Figure 5 — System power dissipation, low trim, board temperature = 25°C Power Dissipation (W) Efficiency (%) 22 3 42V 91 89 87 85 83 81 79 77 12 14 16 18 20 8 7 6 5 4 3 2 1 0 22 2 4 6 24V Figure 3 — System efficiency, high trim, board temperature = 25°C 8 10 12 14 16 18 Load Current (A) Load Current (A) 14V 20 4 9 VIN: 22 5 2 93 10 20 42V 6 10 8 22 7 95 6 20 8 97 4 18 0 22 Figure 2 — System efficiency, low trim, board temperature = 25°C 2 16 Load Current (A) 24V 14V 14 24V 14V Load Current (A) VIN: 12 Figure 4 — System power dissipation, nominal trim, board temperature = 25°C Power Dissipation (W) Efficiency (%) Figure 1 — System efficiency, nominal trim, board temperature = 25°C 2 10 Load Current (A) Load Current (A) VIN: 42V 14V 24V Figure 6 — System power dissipation, high trim, board temperature = 25°C ZVS Regulators Rev 1.7 Page 10 of 34 05/2021 42V PI332x-00 PI3323-00 (3.3VOUT) Electrical Characteristics (Cont.) 10 95 9 Power Dissipation (W) 97 Efficiency (%) 93 91 89 87 85 83 81 79 77 2 4 6 8 10 12 14 16 18 20 8 7 6 5 4 3 2 1 0 22 2 4 6 8 VIN: 24V 14V VIN: 42V 95 10 93 9 91 89 87 85 83 81 79 77 4 6 8 10 12 14 16 18 20 2 1 4 6 8 VIN: 10 12 14 16 18 24V 14V 42V Figure 11 — System power dissipation, low trim, board temperature = 90°C Power Dissipation (W) Efficiency (%) 22 3 42V 91 89 87 85 83 81 79 77 12 14 16 18 20 8 7 6 5 4 3 2 1 0 22 2 4 6 24V Figure 9 — System efficiency, high trim, board temperature = 90°C 8 10 12 14 16 18 Load Current (A) Load Current (A) 14V 20 4 9 VIN: 22 5 2 93 10 20 42V 6 10 8 22 7 95 6 20 8 97 4 18 0 22 Figure 8 — System efficiency, low trim, board temperature = 90°C 2 16 Load Current (A) 24V 14V 14 24V 14V Load Current (A) VIN: 12 Figure 10 — System power dissipation, nominal trim, board temperature = 90°C Power Dissipation (W) Efficiency (%) Figure 7 — System efficiency, nominal trim, board temperature = 90°C 2 10 Load Current (A) Load Current (A) VIN: 42V 14V 24V 42V Figure 12 — System power dissipation, high trim, board temperature = 90°C ZVS Regulators Rev 1.7 Page 11 of 34 05/2021 PI332x-00 PI3323-00 (3.3VOUT) Electrical Characteristics (Cont.) 10 95 9 Power Dissipation (W) 97 Efficiency (%) 93 91 89 87 85 83 81 79 77 2 4 6 8 10 12 14 16 18 20 8 7 6 5 4 3 2 1 0 22 2 4 6 8 VIN: 24V 14V VIN: 42V 12 14 16 18 20 22 24V 14V 20 22 20 22 42V Figure 16 — System power dissipation, nominal trim, board temperature = –40°C 96 94 92 90 10 Power Dissipation (W) Efficiency (%) Figure 13 — System efficiency, nominal trim, board temperature = –40°C 88 86 84 82 80 78 76 74 2 4 6 8 10 12 14 16 18 20 9 8 7 6 5 4 3 2 1 0 22 2 4 6 8 Load Current (A) VIN: 24V 14V 10 12 14 16 18 Load Current (A) VIN: 42V Figure 14 — System efficiency, low trim, board temperature = –40°C 24V 14V 42V Figure 17 — System power dissipation, low trim, board temperature = –40°C 99 97 95 93 10 Power Dissipation (W) Efficiency (%) 10 Load Current (A) Load Current (A) 91 89 87 85 83 81 79 77 2 4 6 8 10 12 14 16 18 20 9 8 7 6 5 4 3 2 1 0 22 2 4 6 Load Current (A) VIN: 14V 24V Figure 15 — System efficiency, high trim, board temperature = –40°C 8 10 12 14 16 18 Load Current (A) VIN: 42V 14V 24V 42V Figure 18 — System power dissipation, high trim, board temperature = –40°C ZVS Regulators Rev 1.7 Page 12 of 34 05/2021 PI332x-00 PI3323-00 (3.3VOUT) Electrical Characteristics (Cont.) CH2 CH1 CH2 CH1 CH1 IOUT: 5A/div CH2 VOUT: 200mV/div CH1 VOUT: 50mV/div CH2 IIN: 1A/div Timebase: 200µs/div Figure 19 — Transient response: 50 – 100% load, at 1A/µs. nominal line, nominal trim, COUT = 8 x 100µF ceramic Figure 22 — Output short circuit, nominal line CH1 CH1 Timebase: 2µs/div Frequency (kHz) Figure 20 — Output voltage ripple: nominal line, nominal trim, 100% load, COUT = 8 x 100µF ceramic 0 2 4 6 8 10 12 14 16 18 20 CH1 VOUT: 20mV/div 22 Load Current (A) VIN: 14V 24V 22 20 18 16 14 12 Notes: 1. SiP is based on VS1 and VIN paths only. 2. Inductor is based on two leads and base with inclusion of GEL 30 interface resistance (0.15mm thick; 3.5W/m-K thermal conductivity). 10 8 6 4 2 0 20 40 60 80 100 120 Temperature of Isothermal PCB (ºC) 42V Figure 21 — Switching frequency vs. load, nominal trim Timebase: 2µs/div Figure 23 — Output voltage ripple: nominal line, nominal trim, 50% load, COUT = 8 x 100µF ceramic Maximum Output Current (A) CH1 VOUT: 20mV/div 525 500 475 450 425 400 375 350 325 300 275 250 225 200 Timebase: 4ms/div Figure 24 — System thermal specified operating area: max IOUT at nominal trim vs. temperature at locations noted ZVS Regulators Rev 1.7 Page 13 of 34 05/2021 PI332x-00 PI3323-00 (3.3VOUT) Electrical Characteristics (Cont.) 18 CH1 GMOD (S) 16 14 CH2 12 CH3 10 8 4 6 8 10 12 14 16 18 20 CH4 22 Output Current (A) VIN : 14V 24V CH1 VIN: 10V/div CH2 TRK: 2V/div 42V Figure 25 — Small-signal modulator gain vs. VEAO, nominal trim CH3 VOUT: 2V/div Timebase: 2.00ms/div CH4 EN: 2V/div Figure 27 — Start up from VIN applied, nominal line, nominal trim, typical timing, PI3323 shown CH1 6 rEQ_OUT (Ω) 5 4 CH2 3 2 CH3 1 0 4 6 8 10 12 14 16 18 20 CH4 22 Output Current (A) VIN : 14V 24V Figure 26 — rEQ_OUT vs VEAO, nominal trim CH1 VIN: 10V/div CH2 EN: 2V/div 42V CH3 VOUT: 2V/div Timebase: 400µs/div CH4 PWRGD: 2V/div Figure 28 — Start up from EN, VIN pre-applied, nominal line, nominal trim, typical timing, PI3323 shown ZVS Regulators Rev 1.7 Page 14 of 34 05/2021 PI332x-00 PI3325-00 (5.0VOUT) Electrical Characteristics Specifications apply for –40°C < TINT < 120°C for -LGIZ, –55°C < TJ < 115°C for -LGMZ VIN = 24V, EN = High, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit 14 24 42 V Input Specifications Input Voltage VIN_DC Input Current IIN_DC Input Current At Output Short (Fault Condition Duty Cycle) IIN_Short VIN = 24V, TCASE = 25°C, IOUT = 20A Short at terminals 4.41 A 5 mA Input Quiescent Current IQ_VIN Disabled 0.94 Input Quiescent Current IQ_VIN Enabled, no load, TCASE = 25°C 4.2 Input Voltage Slew Rate VIN_SR [b] Input capacitance, Internal CIN_INT Effective value VIN = 24V, 25°C 1.6 mA mA 1 0.7 V/µs µF Output Specifications EAIN Voltage Total Regulation Output Voltage Trim Range VEAIN VOUT_DC [b] 0.975 [b] [c] 4.0 Line Regulation ΔVOUT / ΔVIN Load Regulation ΔVOUT / ΔIOUT At 25°C, 2A < IOUT < 20A Output Voltage Ripple At 25°C, 14V < VIN < 42V [d] VOUT_AC IOUT = 20A, COUT = 12 x 47µF, 20MHz BW Output Current IOUT_DC [e] Current Limit IOUT_CL Typical current limit based on nominal 230nH inductor. Maximum Array Size Output Current, Array of 2 Output Current, Array of 3 NPARALLEL 0.990 1.005 5.0 6.5 % 0.10 % 55.7 mVP-P 20 24 [b] IOUT_DC_ARRAY2 Total array capability, IOUT_DC_ARRAY3 Total array capability, [b] see applications section for details see applications section for details V 0.10 0 [b] V A A 3 Modules 0 [g] A 0 [g] A 12.9 13.8 V 1.21 1.75 V Protection Input UVLO Start Threshold VUVLO_START Input UVLO Stop Hysteresis VUVLO_HYS 0.85 1.25 µs Input OVLO Stop Threshold VOVLO 44 47 V Input OVLO Start Hysteresis VOVLO_HYS 0.5 0.9 Input OVLO Response Time tf Input UVLO Response Time Output Overvoltage Protection, Relative VOVP_REL Output Overvoltage Protection, Absolute VOVP_ABS Hysteresis active when OVLO present for at least tFR_DLY Above set VOUT [a] 6.7 1.3 V 1.25 µs 20 % 7.37 V All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI332x evaluation board with 3 x 3” dimensions and four-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to Output Ripple plots. [e] Refer to Load Current vs. Ambient Temperature curves. [f] Refer to Switching Frequency vs. Load current curves. [g] Contact factory applications for array derating and layout best practices to minimize sharing errors. ZVS Regulators Rev 1.7 Page 15 of 34 05/2021 PI332x-00 PI3325-00 (5.0VOUT) Electrical Characteristics (Cont.) Specifications apply for –40°C < TINT < 120°C for -LGIZ, –55°C < TJ < 115°C for -LGMZ VIN = 24V, EN = High, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit 564 600 636 kHz Timing Switching Frequency Fault Restart Delay fs [f] While in Discontinuous Conduction Mode (DCM) only, SYNCI grounded tFR_DLY 30 ms Synchronization Input (SYNCI) Synchronization Frequency Range fSYNCI SYNCI Threshold VSYNCI –50% and +10% relative to set switching frequency (fS), while in DCM operating mode only. [c] and [f] 300 660 2.5 kHz V Synchronization Output (SYNCO) SYNCO High VSYNCO_HI Source 1mA SYNCO Low VSYNCO_LO Sink 1mA 4.5 V SYNCO Rise Time tSYNCO_RT 20pF load 10 ns SYNCO Fall Time tSYNCO_FT 20pF load 10 ns 0.5 V Soft Start, Tracking and Error Amplifier TRK Active Range (Nominal) VTRK 0 1.4 V TRK Enable Threshold VTRK_OV 20 40 60 mV TRK to EAIN Offset VEAIN_OV 40 80 120 mV ITRK 30 50 70 µA Charge Current (Soft Start) Discharge Current (Fault) ITRK_DIS TRK Capacitance, Internal CTRK_INT Soft-Start Time tSS VTRK = 0.5V 8.7 mA 47 CTRK_EXT = 0µF 0.6 0.94 nF 1.6 ms Error Amplifier Transconductance GMEAO 7.6 mS PSM Skip Threshold PSMSKIP 0.8 V EAIN Capacitance, Internal CEAIN_INT 56 pF [b] Error Amplifier Output Impedance ROUT Internal Compensation Capacitor CHF 56 pf Internal Compensation Resistor RZI 5 kΩ [a] 1 MΩ All parameters reflect regulator and inductor system performance. Measurements were made using a standard PI332x evaluation board with 3 x 3” dimensions and four-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization, and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to Output Ripple plots. [e] Refer to Load Current vs. Ambient Temperature curves. [f] Refer to Switching Frequency vs. Load current curves. ZVS Regulators Rev 1.7 Page 16 of 34 05/2021 PI332x-00 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 11 Power Dissipation (W) Efficiency (%) PI3325-00 (5VOUT) Electrical Characteristics (Cont.) 2 4 6 8 10 12 14 16 18 10 9 8 7 6 5 4 3 2 1 20 2 4 6 VIN: 14V 24V VIN: 42V 10 12 14 16 18 20 14V 24V 18 20 18 20 42V Figure 32 — System power dissipation, nominal trim, board temperature = 25°C 96 95 94 93 92 91 90 89 88 87 86 85 84 83 11 Power Dissipation (W) Efficiency (%) Figure 29 — System efficiency, nominal trim, board temperature = 25°C 2 4 6 8 10 12 14 16 18 10 9 8 7 6 5 4 3 2 1 20 2 4 6 VIN: 14V 24V 8 10 12 14 16 Load Current (A) Load Current (A) VIN: 42V Figure 30 — System efficiency, low trim, board temperature = 25°C 14V 24V 42V Figure 33 — System power dissipation, low trim, board temperature = 25°C 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 11 Power Dissipation (W) Efficiency (%) 8 Load Current (A) Load Current (A) 2 4 6 8 10 12 14 16 18 10 9 8 7 6 5 4 3 2 1 20 2 4 6 VIN: 14V 24V Figure 31 — System efficiency, high trim, board temperature = 25°C 8 10 12 14 16 Load Current (A) Load Current (A) VIN: 42V 14V 24V 42V Figure 34 — System power dissipation, high trim, board temperature = 25°C ZVS Regulators Rev 1.7 Page 17 of 34 05/2021 PI332x-00 96 95 94 93 92 91 90 89 88 87 86 85 84 83 11 Power Dissipation (W) Efficiency (%) PI3325-00 (5VOUT) Electrical Characteristics (Cont.) 2 4 6 8 10 12 14 16 18 10 9 8 7 6 5 4 3 2 1 20 2 4 6 VIN: 14V 24V VIN: 42V 10 12 14 16 18 20 14V 24V 18 20 18 20 42V Figure 38 — System power dissipation, nominal trim, board temperature = 90°C 96 95 94 93 92 91 90 89 88 87 86 85 84 83 11 Power Dissipation (W) Efficiency (%) Figure 35 — System efficiency, nominal trim, board temperature = 90°C 2 4 6 8 10 12 14 16 18 10 9 8 7 6 5 4 3 2 1 20 2 4 6 VIN: 14V 24V 8 10 12 14 16 Load Current (A) Load Current (A) VIN: 42V Figure 36 — System efficiency, low trim, board temperature = 90°C 14V 24V 42V Figure 39 — System power dissipation, low trim, board temperature = 90°C 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 11 Power Dissipation (W) Efficiency (%) 8 Load Current (A) Load Current (A) 10 9 8 7 6 5 4 3 2 1 2 4 6 8 10 12 14 16 18 20 2 4 6 VIN: 14V 24V Figure 37 — System efficiency, high trim, board temperature = 90°C 8 10 12 14 16 Load Current (A) Load Current (A) VIN: 42V 14V 24V 42V Figure 40 — System power dissipation, high trim, board temperature = 90°C ZVS Regulators Rev 1.7 Page 18 of 34 05/2021 PI332x-00 97 10 95 9 Power Dissipation (W) Efficiency (%) PI3325-00 (5VOUT) Electrical Characteristics (Cont.) 93 91 89 87 85 83 8 7 6 5 4 3 2 1 0 81 2 4 6 8 10 12 14 16 18 2 20 4 6 VIN: 14V 24V VIN: 42V 10 12 14 16 18 20 14V 24V 18 20 18 20 42V Figure 44 — System power dissipation, nominal trim, board temperature = –40°C 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 11 Power Dissipation (W) Efficiency (%) Figure 41 — System efficiency, nominal trim, board temperature = –40°C 10 9 8 7 6 5 4 3 2 1 2 4 6 8 10 12 14 16 18 20 2 4 6 14V 24V 8 10 12 14 16 Load Current (A) Load Current (A) VIN: VIN: 42V Figure 42 — System efficiency, low trim, board temperature = –40°C 14V 24V 42V Figure 45 — System power dissipation, low trim, board temperature = –40°C 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 11 Power Dissipation (W) Efficiency (%) 8 Load Current (A) Load Current (A) 10 9 8 7 6 5 4 3 2 1 2 4 6 8 10 12 14 16 18 2 20 4 6 14V 24V Figure 43 — System efficiency, high trim, board temperature = –40°C 10 12 14 16 Load Current (A) Load Current (A) VIN: 8 VIN: 42V 14V 24V 42V Figure 46 — System power dissipation, high trim, board temperature = –40°C ZVS Regulators Rev 1.7 Page 19 of 34 05/2021 PI332x-00 PI3325-00 (5VOUT) Electrical Characteristics (Cont.) CH1 CH2 CH2 CH1 CH1 IOUT: 5A/div CH2 VOUT: 200mV/div CH1 VOUT: 500mV/div CH2 IIN: 1A/div Timebase: 200µs/div Figure 47 — Transient response: 50 – 100% load, at 1A/µs. nominal line, nominal trim, COUT = 12 x 47µF ceramic Figure 50 — Output short circuit, nominal line CH1 CH1 Timebase: 2µs/div Frequency (kHz) Figure 48 — Output voltage ripple: nominal line, nominal trim, 100% load, COUT = 12 x 47µF ceramic 0 2 4 6 8 10 12 14 16 18 CH1 VOUT: 20mV/div 20 Load Current (A) VIN: 14V 24V 22 20 18 16 14 12 Notes: 1. SiP is based on VS1 and VIN paths only. 2. Inductor is based on two leads and base with inclusion of GEL 30 interface resistance (0.15mm thick; 3.5W/m-K thermal conductivity). 10 8 6 4 2 0 20 40 60 80 100 120 Temperature of Isothermal PCB (ºC) 42V Figure 49 — Switching frequency vs. load, nominal trim Timebase: 2µs/div Figure 51 — Output voltage ripple: nominal line, nominal trim, 50% load, COUT = 12 x 47µF ceramic Maximum Output Current (A) CH1 VOUT: 20mV/div 625 600 575 550 525 500 475 450 425 400 375 350 325 300 Timebase: 4ms/div Figure 52 — System thermal specified operating area: max IOUT at nominal trim vs. temperature at locations noted ZVS Regulators Rev 1.7 Page 20 of 34 05/2021 PI332x-00 PI3325-00 (5VOUT) Electrical Characteristics (Cont.) 20 Output Current (A) 18 16 CH1 14 12 CH2 10 8 CH3 6 4 2 0.8 1.2 1.6 VIN : 14V 2 2.4 24V 42V CH4 2.8 VEAO (V) CH1 VIN: 10V/div CH2 TRK: 2V/div Figure 53 — Output current vs. VEAO, nominal trim CH3 VOUT: 2V/div Timebase: 2.00ms/div CH4 EN: 2V/div Figure 56 — Start up from VIN applied, nominal line, nominal trim, typical timing, PI3325 shown 20 CH1 18 GMOD (S) 16 14 12 CH2 10 8 CH3 6 4 2 0.8 1.2 1.6 2.0 2.4 24V 42V CH4 2.8 VEAO (V) VIN : 14V CH1 VIN: 10V/div CH2 TRK: 2V/div Figure 54 — Small signal modulator gain vs. VEAO, nominal trim Figure 57 — Start up from EN, VIN pre-applied, nominal line, nominal trim, typical timing, PI3325 shown 50 45 rEQ_OUT (Ω) 40 35 30 25 20 15 10 5 0 0.8 1.2 1.6 2.0 2.4 24V 42V 2.8 VEAO (V) VIN : 14V CH3 VOUT: 2V/div Timebase: 400µs/div CH4 PWRGD: 2V/div Figure 55 — rEQ_OUT vs VEAO, nominal trim ZVS Regulators Rev 1.7 Page 21 of 34 05/2021 PI332x-00 Functional Description Soft Start The PI332x-00 is a family of highly integrated ZVS Buck regulators. The PI332x-00 has an output voltage that can be set within a prescribed range shown in Table 1. Performance and maximum output current are characterized with a specific external power inductor (see Table 3). The PI332x-00 includes an internal soft-start capacitor to control the rate of rise of the output voltage. See the Electrical Characteristics Section for the default value. Connecting an external capacitor from the TRK pin to SGND will increase the start‑up ramp period. See, “Soft Start Adjustment and Track,” in the Applications Description section for more details. Output Voltage Selection L1 VIN VIN CIN PGND ZVS Buck VDR SYNCO SYNCI PWRGD EN TESTx VOUT VS1 VOUT COUT VSP VSN VDIFF The PI332x-00 output voltage is set with REA1 and REA2 as shown in Figure 58. Table 1 defines the allowable operational voltage ranges for the PI332x-00 family. Refer to the Output Voltage Set Point Application Description for details. REA1 TRK Output Voltage EAIN Device EAO REA2 COMP Nominal Range PI3323-00 3.3V 2.2 – 4.0V PI3325-00 5.0V 4.0 – 6.5V SGND CCOMP Table 1 — PI332x-00 family output voltage ranges Figure 58 — ZVS Buck with required components For basic operation, Figure 58 shows the connections and components required. No additional design or settings are required. ENABLE (EN) EN is the enable pin of the converter. The EN Pin is referenced to SGND and permits the user to turn the regulator on or off. The EN default polarity is a positive logic assertion. If the EN pin is left floating or asserted high, the converter output is enabled. Pulling EN pin below VEN_LO with respect to SGND will disable the regulator output. Remote Sensing If remote sensing is required, the PI332x-00 product family is equipped with a general purpose op-amp. This amplifier can allow full differential remote sense by configuring it as a differential follower and connecting the VDIFF pin to the EAIN pin. Output Current Limit Protection The PI332x-00 has a current limit protection, which prevents the output from sourcing current higher than the regulator’s maximum rated current. If the output current exceeds the Current Limit (IOUT_CL) for 1024μs, a slow current limit fault is initiated and the regulator is shutdown which eliminates output current flow. After Fault Restart Delay (tFR_DLY ), a soft-start cycle is initiated. This restart cycle will be repeated indefinitely until the excessive load is removed. The PI332x-00 also has short circuit protection which can rapidly stop switching to protect against catastrophic failure of an external component such as a saturated inductor. If short‑circuit protection is triggered the PI332x-00 will complete the current cycle and stop switching. The module will attempt to soft start after Fault Restart Delay (tFR_DLY ). Input Undervoltage Lockout If VIN falls below the input Undervoltage Lockout (UVLO) threshold, but remains high enough to power the internal bias supply, the PI332x-00 will complete the current cycle and stop switching. The system will soft start once the input voltage is reestablished and after the Fault Restart Delay. ZVS Regulators Rev 1.7 Page 22 of 34 05/2021 PI332x-00 Input Overvoltage Lockout Pulse Skip Mode (PSM) If VIN exceeds the input Overvoltage Lockout (OVLO) threshold (VOVLO), while the controller is running, the PI332x-00 will complete the current cycle and stop switching. If VIN remains above OVLO for at least tFR_DLY, then the input voltage is considered reestablished once VIN goes below VOVLO -VOVLO_HYS. If VIN goes below OVLO before tFR_DLY elapses, then the input voltage is considered reestablished once VIN goes below VOVLO. The system will soft start once the input voltage is reestablished and after the Fault Restart Delay. PI332x-00 features a Pulse Skip Mode (PSM) to achieve high efficiency at light loads. The regulators are set up to skip pulses if EAO falls below a PSM threshold (PSMSKIP). Depending on conditions and component values, this may result in single pulses or several consecutive pulses followed by skipped pulses. Skipping cycles significantly reduces gate drive power and improves light load efficiency. The regulator will leave PSM once the EAO rises above the Pulse Skip Mode threshold. Output Overvoltage Protection Variable Frequency Operation The PI332x-00 family is equipped with output Overvoltage Protection (OVP) to prevent damage to input voltage sensitive devices. If the output voltage exceeds VOVP-REL or VOVP-ABS, the regulator will complete the current cycle and stop switching. The system will resume operation once the output voltage falls below the OVP threshold and after Fault Restart Delay. Each PI332x-00 is preprogrammed to a base operating frequency, with respect to the power stage inductor (see Table 2), to operate at peak efficiency across line and load variations. At low‑line and high‑load applications, the base frequency will decrease to accommodate these extreme operating ranges. By stretching the frequency, the ZVS operation is preserved throughout the total input line voltage range therefore maintaining optimum efficiency. Overtemperature Protection Thermal Characteristics The PI332x features an overtemperature protection (OTP), which will not engage until after the product is operated above the maximum rated temperature. The OTP circuit is only designed to protect against catastrophic failure due to excessive temperatures and should not be relied upon to ensure the device stays within the recommended operating temperature range. Thermal shut down terminates switching and discharges the soft-start capacitor. The PI332x will restart after the excessive temperature has decreased by 30°C. Figure 59(a) and 59(c) thermal impedance models that can predict the maximum temperature of the hottest component for a given operating condition. This model assumes that all customer PCB connections are at one temperature, which is PCB equivalent Temperature TPCB °C. The SiP model can be simplified as shown in Figure 59(b). which assumes all PCB nodes are at the same temperature. ZVS Regulators Rev 1.7 Page 23 of 34 05/2021 PI332x-00 Maximum SiP Internal Temperature TINT ( oC ) SiP Power Dissipaon PDSiP (W) Thermal Resistance SiP Case Top θINT-TOP oC / W SiP Case Top Temperature TTOP oC Thermal Resistances θINT-VIN o SiP PCB Pads C/W SiP PCB Pad Temperatures TVIN o C θINT-VS1 o C/W θINT-PGND1 o C/W θINT-PGND2 o C/W θINT-SGND o C/W TVS1 o C TPGND1 o C TPGND2 o C TSGND o C (a) Maximum SiP Internal Temperature TINT ( oC ) SiP Power Dissipaon PDSIP (W) Thermal Resistance SiP Case Top θINT-TOP oC / W Thermal Resistance SiP PCB Equivalent θ INT-PCB oC / W Case Top Temperature TTOP oC SiP PCB Common Temperature TPCB oC (b) Maximum Inductor Internal Temperature TINT ( oC ) Inductor Power Dissipaon PDIND (W) Thermal Resistance Inductor Case Top θINT-TOP oC / W Thermal Resistance Inductor Case Boom θINT-BOTTOM oC / W Thermal Resistances Inductor PCB Pads Inductor Case Top Temperature TTOP oC Inductor Case Boom Temperature TBOTTOM oC Inductor PCB Pad Temperatures θINT-LEAD1 o C/W θINT-LEAD2 o C/W θINT-TAB o C/W TVS1 o C TVOUT o C TTAB o C (c) Figure 59 — PI332x-00 thermal model (a), SiP simplified version (b) and inductor thermal model (c) ZVS Regulators Rev 1.7 Page 24 of 34 05/2021 PI332x-00 Where the symbol in Figure 59(a) and (b) is defined as the following: θINT-TOP the thermal impedance from the hottest component inside the SiP to the top side θINT-PCB the thermal impedance from the hottest component inside the SiP to the customer PCB, assuming all pins are at one temperature. θINT-VIN the thermal impedance from the hottest component inside the SiP to the circuit board VIN pads. θINT-VS1 the thermal impedance from the hottest component inside the SiP to the circuit board VS1 pads. θINT-PGND1 the thermal impedance from the hottest component inside the SiP to the circuit board at the PGND1 pads. PGND1 is pins 12A-K. θINT-PGND2 the thermal impedance from the hottest component inside the SiP to the circuit board at the PGND2 pads . PGND2 is pins 2F-J, 3F-J, 4C-J, 5B-J and 6C-K. θINT-SGND the thermal impedance from the hottest component inside the SiP to the circuit board at the SGND pads. Where the symbol in Figure 59(c) is defined as the following: θINT-TOP the thermal impedance from the hot spot to the top surface of the core. θINT-BOT the thermal impedance from the hot spot to the bottom surface of the core. θINT-TAB the thermal impedance from the hot spot to the metal mounting tab on the core body, if applicable. θINT-LEAD1 the thermal impedance from the hot spot to one of the mounting leads. Since the leads are the same thermal impedance, there is no need to specify by explicit pin number. θINT-LEAD2 the thermal impedance from the hot spot to the other mounting lead. The following equation can predict the junction temperature based on the heat load applied to the SiP and the known ambient conditions with the simplified thermal circuit model: TINT = PD + TTOP θINT-TOP 1 + θINT-TOP Product System PI332x-00 + TPCB θINT-PCB 1 (1) θINT-PCB Simplified SiP Thermal Impedances Detailed SiP Thermal Impedances θINT-TOP (°C / W) θINT-PCB (°C / W) θINT-TOP (°C / W) θINT-VIN (°C / W) θINT-VS1 (°C / W) θINT-PGND1 (°C / W) θINT-PGND2 (°C / W) θINT-SGND (°C / W) 110 1.7 110 3.4 4.8 33 33 91 Table 2 — PI332x-00 SiP thermal impedance Product System PI332x-00 Inductor Part Number FP2207R1-R230-R Effective Thermal Impedances θINT-TOP (°C / W) θINT-LEAD1, θINT-LEAD2 (°C / W) θINT-BOTTOM (°C / W) (°C / W) 11 9.4 6.8 N/A Table 3 — Inductor effective thermal model parameters ZVS Regulators Rev 1.7 Page 25 of 34 05/2021 θINT-TAB PI332x-00 SiP Power Dissipation as Percentage of Total System Losses SiP Dissipation (% Total Loss) 100 90 80 70 60 50 14 18 22 26 30 34 38 42 VIN (V) IOUT: