PI3543-00-EVAL1

ZVS Regulators PI354x-00 36 – 60VIN ZVS Buck Regulator & LED Driver Product Description Features & Benefits The PI354x-00 is a family of high input voltage, wide input range DC-DC ZVS Buck regulators integrating controller, power switches, and support components all within a high‑density System‑in‑Package (SiP). The PI354x-00 products are designed to operate within an SELV compliant system with steady state operation limited to 60V. The PI354x-00 products allow for transient voltage conditions up to 70V before shut down is triggered. The integration of a high-performance Zero-Voltage Switching (ZVS) topology, within the PI354x-00 series, increases point of load performance providing best in class power efficiency. The PI354x-00 requires only an external inductor, two voltage selection resistors and minimal capacitors to form a complete DC‑DC switching mode buck regulator. • High-Efficiency HV ZVS Buck Topology Device Output Voltage • Wide input voltage range of 36 – 60V • Tolerant of transient events up to 70VIN • Constant voltage or constant current operation • Constant current error amplifier and reference • Power-up into pre-biased load • Parallel capable up to 3 regulators • Two-phase interleaving • Input Over/Undervoltage Lockout (OVLO/UVLO) • Output Overvoltage Protection (OVP) IOUT Max Set Range PI3542-00-LGIZ 2.5V 2.2 – 3.0V 10A PI3543-00-LGIZ 3.3V 2.6 – 3.6V 10A PI3545-00-LGIZ 5.0V 4.0 – 5.5V 10A PI3546-00-LGIZ 12V 6.5 – 14V 9A • Overtemperature Protection (OTP) • Fast and slow current limits • Differential amplifier for output remote sensing • User adjustable soft-start & tracking • –40 to 125°C operating range (TJ) PI354x-00 Family can operate in constant voltage output for typical buck regulation applications in addition to constant current output for LED lighting and battery charging applications. Applications • HV to PoL Buck Regulator Applications • Computing, Communications, Industrial, Automotive Accessories • Constant Current Output Operation: „ LED Lighting „ Battery Charging Package Information • 10 x 10 x 2.6mm LGA SiP Note: Product images may not highlight current product markings. ZVS Regulators Page 1 of 39 Rev 2.4 10/2021 PI354x-00 Contents Order Information 3 Thermal, Storage and Handling Information 3 Parallel Operation Absolute Maximum Ratings 3 Synchronization 26 Functional Block Diagram 4 Interleaving 26 Pin Description 5 Output Voltage Set Point 27 Package Pinout 6 Soft-Start Adjust and Tracking 27 Large Pin Blocks 6 Inductor Pairing 27 PI354x-00 Common Electrical Characteristics 7 Thermal De-Rating 28 PI3542-00 (2.5VOUT ) Electrical Characteristics 9 Small Signal Model – Constant Voltage Mode 28 PI3543-00 (3.3VOUT ) Electrical Characteristics 13 Error Amplifier 28 PI3545-00 (5.0VOUT ) Electrical Characteristics 17 Lighting Mode (LGH) 29 PI3546-00 (12.0VOUT ) Electrical Characteristics 21 LGH Amplifier Small Signal Model 30 Functional Description 25 Filter Considerations 32 ENABLE (EN) 25 VDR Bias Regulator 33 Remote Sensing 25 System Design Considerations 33 Switching Frequency Synchronization 25 Layout Guidelines 34 Output Voltage Selection 25 Recommended PCB Footprint and Stencil 36 Output Current Limit Protection 25 LGA Package Drawings 37 Input Undervoltage Lockout 25 Revision History 38 Input Overvoltage Lockout 26 Warranty 39 Output Overvoltage Protection 26 Overtemperature Protection 26 Pulse Skip Mode (PSM) 26 Variable Frequency Operation 26 ZVS Regulators Page 2 of 39 Application Description Rev 2.4 10/2021 26 26 PI354x-00 Order Information Part Number Output Range IOUT Max Package Transport Media Set Range PI3542-00-LGIZ 2.5V 2.2 – 3.0V 10A 10 x 10mm LGA TRAY PI3543-00-LGIZ 3.3V 2.6 – 3.6V 10A 10 x 10mm LGA TRAY PI3545-00-LGIZ 5.0V 4.0 – 5.5V 10A 10 x 10mm LGA TRAY PI3546-00-LGIZ 12V 6.5 – 14V 9A 10 x 10mm LGA TRAY Thermal, Storage and Handling Information Name Rating Storage Temperature –65°C to 150°C Internal Operating Temperature –40°C to 125°C Soldering Temperature for 20 seconds 245°C MSL Rating 3 ESD Rating 2kV HBM, 1kV CDM Absolute Maximum Ratings Name Rating VIN –0.7V to 75V VS1 –0.7VDC to 75V VOUT –0.5V to 25V SGND ±100mA TRK –0.3V to 5.5V / ±30mA VDR, SYNCI, SYNCO, PWRGD, EN, LGH, COMP, EAO, EAIN, VDIFF, VSN, VSP, TESTx –0.3V to 5.5V / ±5mA Notes: Stresses beyond these limits may cause permanent damage to the device. Operation at these conditions or conditions beyond those listed in the Electrical Specifications table is not guaranteed. All voltage nodes are referenced to PGND unless otherwise noted. ZVS Regulators Page 3 of 39 Rev 2.4 10/2021 PI354x-00 Functional Block Diagram VS1 VIN Q2 Q1 VDR Power Control + - EN TESTx VSP VSN VDIFF LGH + VLGH-REF VCC ZVS Control SYNCO SYNCI PWRGD VOUT + EAIN VREF EAO Digital Parametric Trim COMP TRK PGND 0Ω SGND Simplified block diagram ZVS Regulators Page 4 of 39 Rev 2.4 10/2021 PI354x-00 Pin Description Name Location I/O VS1 Block 2 (See Pkg Pin-Out dwg) Power Switching node: and ZVS sense for power switches. VIN Block 1 Power Input voltage: and sense for UVLO, OVLO and feed forward ramp. VDR 1E I/O Gate Driver VCC : Internally generated 5.1V. May be used as reference or low-power bias supply for external loads. See Application Description for Important considerations. SYNCI 1D I Synchronization input: Synchronize to the falling edge of external clock frequency. SYNCI is a high‑impedance digital input node and should always be connected to SGND when not in use. SYNCO 1C O Synchronization output: Outputs a high signal for ½ of the minimum period for synchronization of other regulators. TESTx 1B, 1A, 2B, 2A I/O Test Connections: Use only with factory guidance. Connect to SGND for proper operation. PWRGD 3A O Power Good: High impedance when regulator is operating and VOUT is in regulation. Otherwise pulls to SGND. EN 4A I Enable Input: Regulator enable control. When asserted active or left floating: regulator is enabled. Otherwise regulator is disabled. TRK 5A I Soft-start and track input: An external capacitor may be connected between TRK pin and SGND to decrease the rate of rise during soft-start. LGH 6A I Lighting (LGH)/Constant Current (CC) Sense Input: Input with a 100mV threshold. Used for lighting and constant current type applications.When not using the constant current mode (CC mode), the LGH pin should be connected to SGND. COMP 8A O Compensation Capacitor: Connect capacitor for control loop dominant pole. See Error Amplifier section for details. A default CCOMP of 4.7nF is used in the example EAO 9A O Error amp output: External connection for additional compensation and current sharing. EAIN 10A I Error Amp Inverting Input: Connection for the feedback divider tap. VDIFF 10B O Independent Amplifier Output: Active only when module is enabled. VSN 10C I Independent Amplifier Inverting Input: If unused, connect in unity gain VSP 10D I Independent Amplifier Non-Inverting Input: If unused, connect in SGND VOUT 9E, 10E Power SGND Block 4 - PGND Block 3 Power ZVS Regulators Page 5 of 39 Description Direct VOUT Connect: for per-cycle internal clamp node and feed-forward ramp. Signal ground: Internal logic ground for EA, TRK, SYNCI, SYNCO communication returns. SGND and PGND are star connected within the regulator package. Power ground: VIN and VOUT power returns. Rev 2.4 10/2021 PI354x-00 Package Pinout PIN 1 INDEX A B 1 TEST 2 TEST 1 2 TEST 4 TEST 3 3 PWRGD 4 EN 5 C D E F G H SYNCO SYNCI VDR PGD PGD PGD VS1 PGD PGD PGD PGD PGD PGD VS1 PGD PGD PGD PGD PGD PGD VS1 SGD PGD PGD PGD PGD PGD PGD VS1 TRK SGD PGD PGD PGD PGD PGD PGD VS1 6 LGH SGD SGD PGD PGD PGD PGD PGD VS1 7 SGD SGD SGD PGD PGD PGD PGD PGD VS1 8 COMP SGD SGD PGD PGD 9 EAO SGD SGD SGD VOUT VIN VIN VIN VIN 10 EAIN VDIFF VSN VSP VOUT VIN VIN VIN VIN TOP THROUGH VIEW OF PRODUCT PI354X Large Pin Blocks Pin Block Name Group of pins VIN K9-10, J9-10, H9-10, G9-10 VS1 K1-7 PGND H1-7, G1-7,F1-7, E2-8, D2-8, C2-5 SGND D9, C6-9, B4-9, A7 ZVS Regulators Page 6 of 39 Rev 2.4 10/2021 J K PI354x-00 PI354x-00 Common Electrical Characteristics Specifications apply for –40°C < TJ < 125°C, VIN = 48V, EN = High, VVDR = 5.1V ±2%, L1 = 340nH [a] unless other conditions are noted. Parameter Symbol Conditions Min Typ Max Unit Open Loop Gain 96 120 140 dB Small Signal Gain-Bandwidth 5 7 12 MHz Offset ­–1 0.5 1 mV 2.5 V 2 V 1 µA Differential Amp Common Mode Input Range –0.1 Differential Mode Input Range Input Bias Current –1 Maximum VOUT IDIFF = ­–1mA VVDR – 0.2 V Minimum VOUT Capacitive Load Range for Stability 0 20 mV 50 pF Slew Rate Rising 11 V/µs Slew Rate Falling 11 V/µs Sink/Source Current –1 1 mA 107 mV Current Source Function (LGH) LGH Reference VLGH-REF 95 Input Offset 100 0.5 Gain-Bandwidth Product mV 3 MHz Internal Feedback Capacitance 20 pF Gain 10 V/V Intermediate Reference 1 V Transconductance 1 mS Output Current Capability Sink current only 1 mA PWRGD PWRGD Rising Threshold PWRGD Falling Threshold PWRGD Output Low PWRGD Sink Current VPG_HI% [b] VPG_LO% [b] VPG_SAT Sink = 4mA IPG_SAT [b] 79 85 91 % VOUT_DC 77 83 89 % VOUT_DC 0.4 V [b] 4 [a] All mA parameters reflect regulator and inductor system performance. Measurements were made using a standard PI354x evaluation board with 2.5 x 4in dimensions and 4-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to output ripple plots. [e] Refer to Load current vs. ambient temperature curves. [f] Refer to switching frequency vs. load current curves. ZVS Regulators Page 7 of 39 Rev 2.4 10/2021 PI354x-00 PI354x-00 Common Electrical Characteristics (Cont.) Specifications apply for –40°C < TJ < 125°C, VIN = 48V, EN = High, VVDR = 5.1V ±2%, L1 = 340nH [a] unless other conditions are noted. Parameter Symbol Conditions Min Typ Max Unit Enable High Threshold VEN_HI 0.9 1 1.1 V Low Threshold VEN_LO 0.7 0.8 0.9 V Threshold Hysteresis VEN_HYS 100 200 300 mV Enable Pull-Up Voltage VEN_PU 2 V Source Current IEN_SO 50 µA VDR Voltage Setpoint VVDR VIN_DC > 10V 4.8 External Loading IVDR See Application Description for details 5.1 0 5.4 V 2 mA 35.8 V Protection Input UVLO Start Threshold VUVLO_START Input UVLO Stop Hysteresis VUVLO_HYS 33.8 Input UVLO Response Time 34.8 2.5 V 1.25 us Input OVLO Stop Threshold VOVLO Input OVLO Start Hysteresis VOVLO_HYS 1.3 V Input OVLO Response Time tf 1.25 µs 20 % Output Overvoltage Protection VOVP 70 Above set VOUT V Sync In (SYNCI) Synchronization Frequency Range ∆fSYNCI SYNCI Threshold VSYNCI Relative to set switching frequency [c] 50 110 VVDR / 2 % V Sync Out (SYNCO) SYNCO High VSYNCO_HI Source 1mA VVDR –0.5 V SYNCO Low VSYNCO_LO Sink 1mA SYNCO Rise Time tSYNCO_RT 20pF load 10 SYNCO Fall Time tSYNCO_FT 20pF load 10 0.5 [a] All V ns ns parameters reflect regulator and inductor system performance. Measurements were made using a standard PI354x evaluation board with 2.5 x 4in dimensions and 4-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to output ripple plots. [e] Refer to load current vs. ambient temperature curves. [f] Refer to switching frequency vs. load current curves. ZVS Regulators Page 8 of 39 Rev 2.4 10/2021 PI354x-00 PI3542-00 (2.5VOUT) Electrical Characteristics Specifications apply for –40°C < TJ < 125°C, VIN = 48V, EN = High, VVDR = 5.1V ±2%, L1 = 340nH [a] unless other conditions are noted. Parameter Symbol Conditions Min Typ Max Unit 36 48 60 V 70 V Input Specifications Input Voltage Input Voltage, Transient Input Current Input Current At Output Short (Fault Condition Duty Cycle) VIN_DC VIN_TRANS IIN_DC IIN_Short Input Quiescent Current IQ_VIN Input Voltage Slew Rate VIN_SR < 1% duty cycle,entire transient duration < 10ms VIN = 48V, TC = 25°C, IOUT = 10A 0.597 A Short at terminals 3.1 mA Disabled 0.75 Enabled (no load) 1.4 mA 1 V/µs Output Specifications EAIN Voltage Total Regulation Output Voltage Trim Range VEAIN VOUT_DC [b] [b] [c] 0.985 1.00 1.015 V 2.2 2.5 3.0 V Line Regulation ∆VOUT /∆VIN @ 25°C, 36V < VIN < 60V 0.10 % Load Regulation ∆VOUT /∆IOUT @ 25°C, 0.5A < IOUT < 10A 0.10 % 47 mVp-p Output Voltage Ripple VOUT_AC IOUT = 10A, COUT = 6 x 100µF, 20MHz BW [d] Output Current IOUT_DC [e] Maximum Array Size NParallel 0 10 A 3 Modules Output Current, Array of 2 IOUT_DC-ARRAY2 Total array capability, see applications section for details 0 17.7 A Output Current, Array of 3 IOUT_DC-ARRAY2 Total array capability, see applications section for details 0 25.4 A Current Limit IOUT_CL Typ limit based on nominal 340nH inductor. 12 A Timing Switching Frequency Fault Restart Delay fS [f] 48V IN to 2.5VOUT, 3A out, L1 = 340nH ­±1% tFR_DLY - 400 30 [a] All - kHz ms parameters reflect regulator and inductor system performance. Measurements were made using a standard PI354x evaluation board with 2.5 x 4in dimensions and 4-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to output ripple plots. [e] Refer to load current vs. ambient temperature curves. [f] Refer to switching frequency vs. load current curves. ZVS Regulators Page 9 of 39 Rev 2.4 10/2021 PI354x-00 PI3542-00 (2.5VOUT) Electrical Characteristics (Cont.) Specifications apply for –40°C < TJ < 125°C, VIN = 48V, EN = High, VVDR = 5.1V ±2%, L1 = 340nH [a] unless other conditions are noted. Parameter Symbol Conditions Min Typ Max Unit 1.4 V Soft Start, Tracking and Error Amplifier TRK Active Range (Nominal) VTRK 0 TRK Enable Threshold VTRK_OV 20 40 60 mV TRK to EAIN Offset VEIAN_OV 50 80 110 mV 70 50 30 µA Charge Current (Soft-Start) Discharge Current (Fault) Soft-Start Time VTRK = 0.5V, EAO shorted to EAIN ITRK ITRK_DIS VTRK = 0.5V tSS CTRK = 0µF 10 0.6 0.94 mA 1.6 ms Error Amplifier Trans-Conductance GMEAO [b] 5.1 mS PSM Skip Threshold PSMSKIP [b] 0.8 V ROUT [b] CHF [b] 56 pf RZI [b] 5 kΩ Error Amplifier Output Impedance Internal Compensation Capacitor Internal Compensation Resistor [a] All 1 MΩ parameters reflect regulator and inductor system performance. Measurements were made using a standard PI354x evaluation board with 2.5 x 4in dimensions and 4-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to output ripple plots. [e] Refer to load current vs. ambient temperature curves. [f] Refer to switching frequency vs. load current curves. ZVS Regulators Rev 2.4 Page 10 of 39 10/2021 PI354x-00 PI3542-00 (2.5VOUT) Electrical Characteristics (Cont.) 90 Efficiency (%) 85 80 36VIN 48VIN 60VIN 75 70 65 60 0 1 2 3 4 5 6 7 8 9 10 IOUT (A) Figure 1 — Regulator efficiency Figure 4 — Output ripple: 48VIN, 2.5VOUT at 10A. VOUT = 20mV/Div, 2.0µs/Div; COUT = 6 x 100µF ceramic 450 Frequency (kHz) 425 400 375 36VIN 48VIN 60VIN 350 325 300 275 250 0 1 2 3 4 5 6 7 8 9 10 IOUT (A) Figure 2 — Transient response: 5A to 10A, at 1A/µs. 48VIN to 2.5VOUT, COUT = 6 x 100µF ceramic Figure 5 — Switching frequency vs. load current Figure 3 — Output short circuit @ VIN = 48V Figure 6 — Output ripple: 48VIN, 2.5VOUT at 5A. VOUT = 20mV/Div, 2.0µs/Div; COUT = 6 x 100µF ceramic ZVS Regulators Rev 2.4 Page 11 of 39 10/2021 PI354x-00 12 12 10 10 Output Current DC Amps Output Load Current (A) PI3542-00 (2.5VOUT) Electrical Characteristics (Cont.) 8 36VIN 48VIN 60VIN 6 4 8 6 4 2 2 0 0 0 50 75 100 125 1.5 IOUT @ VIN = 36V 2 2.5 3 IOUT @ VIN = 48V IOUT @ VIN = 60V Figure 7 — Load current vs. ambient temperature, 0LFM Figure 10 — Output current vs. error voltage VEAO 8 12 7 Modulator Gain (S) Output Load Current (A) 1 VEAO (V) Ambient Temperature (°C) 10 8 36VIN 48VIN 60VIN 6 4 6 5 4 3 2 1 2 0 0 0 50 75 100 125 1 2 VEAO (V) gMOD @ VIN = 36V Ambient Temperature (°C) 3 gMOD @ VIN = 48V gMOD @ VIN = 60V Figure 8 — Load current vs. ambient temperature, 200LFM Figure 11 — Modulator gain vs. error voltage VEAO Output Resistance Ohms - DCM 12 Output Load Current (A) 0.5 10 8 36VIN 48VIN 60VIN 6 4 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 35 30 25 20 15 10 5 0 0 2 1 2 3 VEAO Volts DC 0 50 75 100 125 Ambient Temperature (°C) Figure 9 — Load current vs. ambient temperature, 400LFM rEQ_OUT_DCM @ VIN = 36V rEQ_OUT_CrCM @ VIN = 36V rEQ_OUT_DCM @ VIN = 48V rEQ_OUT_CrCM @ VIN = 48V rEQ_OUT_DCM @ VIN = 60V rEQ_OUT_CrCM @ VIN = 60V Figure 12 — Output Equivalent Resistance vs.Error Voltage VEAO ZVS Regulators Rev 2.4 Page 12 of 39 10/2021 PI354x-00 PI3543-00 (3.3VOUT) Electrical Characteristics Specifications apply for –40°C < TJ < 125°C, VIN = 48V, EN = High, VVDR = 5.1V ±2%, L1 = 420nH [a] unless other conditions are noted. Parameter Symbol Conditions Min Typ Max Unit 36 48 60 V 70 V Input Specifications Input Voltage Input Voltage, Transient Input Current Input Current At Output Short (Fault Condition Duty Cycle) VIN_DC VIN_TRANS IIN_DC IIN_Short Input Quiescent Current IQ_VIN Input Voltage Slew Rate VIN_SR < 1% duty cycle,entire transient duration < 10ms VIN = 48V, TC = 25°C, IOUT = 10A 0.762 Short at terminals 3 Disabled 0.75 Enabled (no load) 1.6 A - mA mA 1 V/µs Output Specifications EAIN Voltage Total Regulation Output Voltage Trim Range VEAIN VOUT_DC [b] [b] [c] 0.985 1.00 1.015 V 2.6 3.3 3.6 V Line Regulation ∆VOUT /∆VIN @ 25°C, 36V < VIN < 60V 0.10 % Load Regulation ∆VOUT /∆IOUT @ 25°C, 0.5A < IOUT < 10A 0.10 % 62 mVp-p Output Voltage Ripple VOUT_AC IOUT = 10A, COUT = 6 x 100µF, 20MHz BW [d] Output Current IOUT_DC [e] Maximum Array Size NParallel 0 Output Current, Array of 2 IOUT_DC-ARRAY2 Total array capability, see applications section for details 0 Output Current, Array of 3 IOUT_DC-ARRAY2 Total array capability, see applications section for details 0 Current Limit IOUT_CL Typ limit based on nominal 420nH inductor 10 A 3 Modules 17.7 A 25.4 A 11.5 A Timing Switching Frequency Fault Restart Delay fS [f] 48V IN to 3.3VOUT, 6A out, L1 = 420nH ­±1% tFR_DLY [a] All - 400 30 - kHz ms parameters reflect regulator and inductor system performance. Measurements were made using a standard PI354x evaluation board with 2.5 x 4in dimensions and 4-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to output ripple plots. [e] Refer to load current vs. ambient temperature curves. [f] Refer to switching frequency vs. load current curves. ZVS Regulators Rev 2.4 Page 13 of 39 10/2021 PI354x-00 PI3543-00 (3.3VOUT) Electrical Characteristics (Cont.) Specifications apply for –40°C < TJ < 125°C, VIN = 48V, EN = High, VVDR = 5.1V ±2%, L1 = 420nH [a] unless other conditions are noted. Parameter Symbol Conditions Min Typ Max Unit 1.4 V Soft Start, Tracking and Error Amplifier TRK Active Range (Nominal) VTRK 0 TRK Enable Threshold VTRK_OV 20 40 60 mV TRK to EAIN Offset VEIAN_OV 50 80 110 mV 70 50 30 µA Charge Current (Soft-Start) Discharge Current (Fault) Soft-Start Time Error Amplifier Trans-Conductance PSM Skip Threshold Error Amplifier Output Impedance Internal Compensation Capacitor Internal Compensation Resistor VTRK = 0.5V, EAO shorted to EAIN ITRK ITRK_DIS VTRK = 0.5V tSS CTRK = 0µF 10 0.6 0.94 mA 1.6 ms GMEAO [b] 5.1 mS PSMSKIP [b] 0.8 V ROUT [b] CHF [b] 56 pf RZI [b] 6 kΩ [a] All 1 MΩ parameters reflect regulator and inductor system performance. Measurements were made using a standard PI354x evaluation board with 2.5 x 4in dimensions and 4-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to output ripple plots. [e] Refer to load current vs. ambient temperature curves. [f] Refer to switching frequency vs. load current curves. ZVS Regulators Rev 2.4 Page 14 of 39 10/2021 PI354x-00 PI3543-00 (3.3VOUT) Electrical Characteristics (Cont.) 95 Efficiency (%) 90 85 36VIN 48VIN 60VIN 80 75 70 0 1 2 3 4 5 6 7 8 9 10 IOUT (A) Figure 13 — Regulator efficiency Figure 16 — Output ripple: 48VIN, 3.3VOUT at 10A. VOUT = 20mV/Div, 2.0µs/Div; COUT = 6 x 100µF ceramic Frequency (kHz) 400 350 36VIN 48VIN 60VIN 300 250 0 1 2 3 4 5 6 7 8 IOUT (A) Figure 14 — Transient response: 5A to 10A, at 1A/µs. 48VIN to 3.3VOUT, COUT = 6 x 100µF ceramic Figure 17 — Switching frequency vs. load current Figure 15 — Output short circuit @ VIN = 48V Figure 18 — Output ripple: 48VIN, 3.3VOUT at 5A. VOUT = 20mV/Div, 2.0µs/Div; COUT = 6 x 100µF ceramic ZVS Regulators Rev 2.4 Page 15 of 39 10/2021 9 10 PI354x-00 PI3543-00 (3.3VOUT) Electrical Characteristics (Cont.) 12 10 10 Output Current DC Amps Output Load Current (A) 12 8 36VIN 48VIN 60VIN 6 4 8 6 4 2 2 0 0 0 50 75 100 1 125 3 4 IOUT @ VIN = 48V IOUT @ VIN = 36V Ambient Temperature (°C) IOUT @ VIN = 60V Figure 19 — Load current vs. ambient temperature, 0LFM Figure 22 — Output current vs. error voltage VEAO 12 8 7 10 Modulator Gain (S) Output Load Current (A) 2 VEAO (V) 8 36VIN 48VIN 60VIN 6 4 2 6 5 4 3 2 1 0 0 50 75 100 125 0 1 2 3 4 VEAO (V) Ambient Temperature (°C) gMOD @ VIN = 36V gMOD @ VIN = 48V gMOD @ VIN = 60V Figure 20 — Load current vs. ambient temperature, 200LFM Figure 23 — Modulator gain vs. error voltage VEAO Output Resistance Ohms - DCM Output Load Current (A) 12 10 8 36VIN 48VIN 60VIN 6 4 3.5 120 3 100 2.5 80 2 60 1.5 40 1 20 0.5 0 2 0 0 1 2 3 4 VEAO Volts DC 0 50 75 100 125 Ambient Temperature (°C) Figure 21 — Load current vs. ambient temperature, 400LFM rEQ_OUT_DCM @ VIN = 36V rEQ_OUT_CrCM @ VIN = 36V rEQ_OUT_DCM @ VIN = 48V rEQ_OUT_CrCM @ VIN = 48V rEQ_OUT_DCM @ VIN = 60V rEQ_OUT_CrCM @ VIN = 60V Figure 24 — Output equivalent resistance vs. error voltage VEAO ZVS Regulators Rev 2.4 Page 16 of 39 10/2021 PI354x-00 PI3545-00 (5.0VOUT) Electrical Characteristics Specifications apply for –40°C < TJ < 125°C, VIN = 48V, EN = High, VVDR = 5.1V ±2%, L1 = 420nH [a] unless other conditions are noted. Parameter Symbol Conditions Min Typ Max Unit 36 48 60 V 70 V Input Specifications Input Voltage Input Voltage, Transient Input Current Input Current At Output Short (Fault Condition Duty Cycle) VIN_DC VIN_TRANS IIN_DC IIN_Short Input Quiescent Current IQ_VIN Input Voltage Slew Rate VIN_SR < 1% duty cycle,entire transient duration < 10ms VIN = 48V, TC = 25°C, IOUT = 10A 1.126 Short at terminals 3.2 Disabled 0.75 Enabled (no load) 1.8 A - mA mA 1 V/µs Output Specifications EAIN Voltage Total Regulation Output Voltage Trim Range VEAIN VOUT_DC [b] [b] [c] Line Regulation ∆VOUT /∆VIN @ 25°C, 36V < VIN < 60V Load Regulation ∆VOUT /∆IOUT @ 25°C, 0.5A < IOUT < 10A Output Voltage Ripple VOUT_AC IOUT = 10A, COUT = 6 x 47µF, 20MHz BW Output Current IOUT_DC [e] Maximum Array Size NParallel 0.985 1.00 1.015 V 4.0 5.0 5.5 V [d] 0.10 % 0.10 % 62.4 mVp-p 0 10 A 3 Modules Output Current, Array of 2 IOUT_DC-ARRAY2 Total array capability, see applications section for details 0 17.7 A Output Current, Array of 3 IOUT_DC-ARRAY2 Total array capability, see applications section for details 0 25.4 A Current Limit IOUT_CL Typ limit based on nominal 420nH inductor. 12 A Timing Switching Frequency Fault Restart Delay fS [f] 48V IN to 5VOUT, 3A out, L1 = 420nH ­±1% tFR_DLY [a] All - 600 30 - kHz ms parameters reflect regulator and inductor system performance. Measurements were made using a standard PI354x evaluation board with 2.5 x 4in dimensions and 4-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to output ripple plots. [e] Refer to load current vs. ambient temperature curves. [f] Refer to switching frequency vs. load current curves. ZVS Regulators Rev 2.4 Page 17 of 39 10/2021 PI354x-00 PI3545-00 (5.0VOUT) Electrical Characteristics (Cont.) Specifications apply for –40°C < TJ < 125°C, VIN = 48V, EN = High, VVDR = 5.1V ±2%, L1 = 420nH [a] unless other conditions are noted. Parameter Symbol Conditions Min Typ Max Unit 1.4 V Soft Start, Tracking and Error Amplifier TRK Active Range (Nominal) VTRK 0 TRK Enable Threshold VTRK_OV 20 40 60 mV TRK to EAIN Offset VEIAN_OV 50 80 110 mV 70 50 30 µA Charge Current (Soft-Start) Discharge Current (Fault) Soft-Start Time VTRK = 0.5V, EA0 shorted to EAIN ITRK ITRK_DIS VTRK = 0.5V tSS CTRK = 0µF 10 0.6 0.94 mA 1.6 ms GMEAO [b] 5.1 mS PSMSKIP [b] 0.8 V Error Amplifier Output Impedance ROUT [b] Internal Compensation Capacitor CHF [b] 56 pf Internal Compensation Resistor RZI [b] 6 kΩ Error Amplifier Trans-Conductance PSM Skip Threshold [a] All 1 MΩ parameters reflect regulator and inductor system performance. Measurements were made using a standard PI354x evaluation board with 2.5 x 4in dimensions and 4-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to output ripple plots. [e] Refer to load current vs. ambient temperature curves. [f] Refer to switching frequency vs. load current curves. ZVS Regulators Rev 2.4 Page 18 of 39 10/2021 PI354x-00 PI3545-00 (5.0VOUT) Electrical Characteristics (Cont.) 95 Efficiency (%) 90 85 36VIN 48VIN 60VIN 80 75 70 0 1 2 3 4 5 6 7 8 9 10 IOUT (A) Figure 25 — Regulator efficiency at 25°C Figure 28 — Output ripple: 48VIN, 5.0VOUT at 10A. VOUT = 20mV/Div, 2.0µs/Div; COUT = 6 x 47µF ceramic Frequency (kHz) 600 550 36VIN 48VIN 60VIN 500 450 400 0 1 2 3 4 5 6 7 8 IOUT (A) Figure 26 — Transient response: 5A to 10A, at 1A/µs. 48VIN to 5.0VOUT COUT = 6 x 47µF ceramic Figure 29 — Switching frequency vs. load current Figure 27 — Output short circuit @ VIN = 48V Figure 30 — Output ripple: 48VIN, 5.0VOUT at 5A. VOUT = 20mV/Div, 2.0µs/Div; COUT = 6 x 47µF ceramic ZVS Regulators Rev 2.4 Page 19 of 39 10/2021 9 10 PI354x-00 PI3545-00 (5.0VOUT) Electrical Characteristics (Cont.) 12 10 10 Output Current DC Amps Output Load Current (A) 12 8 36VIN 48VIN 60VIN 6 4 8 6 4 2 2 0 0 0 50 75 100 1 1.5 2 2.5 3 V(EAO) Volts 125 IOUT @ VIN = 36V Ambient Temperature (°C) IOUT @ VIN = 48V IOUT @ VIN = 60V Figure 31 — Load current vs. ambient temperature, 0LFM Figure 34 — Output current vs. error voltage VEAO 8 12 7 10 Modulator Gain (S) Output Load Current (A) 0.5 8 36VIN 48VIN 60VIN 6 4 6 5 4 3 2 1 2 0 0 0 50 75 100 1 125 Ambient Temperature (°C) 2 VEAO Volts gMOD @ VIN = 36V 3 gMOD @ VIN = 48V gMOD @ VIN = 60V Figure 32 — Load current vs. ambient temperature, 200LFM Figure 35 — Modulator gain vs. error voltage VEAO Output Resistance Ohms - DCM Output Load Current (A) 12 10 8 36VIN 48VIN 60VIN 6 4 4.5 45 4 40 3.5 35 3 30 2.5 25 2 20 1.5 15 1 10 5 0.5 0 0 2 0 0 50 75 100 125 Ambient Temperature (°C) Figure 33 — Load current vs. ambient temperature, 400LFM 1 VEAO Volts DC 2 3 rEQ_OUT_DCM @ VIN = 36V rEQ_OUT_CrCM @ VIN = 36V rEQ_OUT_DCM @ VIN = 48V rEQ_OUT_CrCM @ VIN = 48V rEQ_OUT_DCM @ VIN = 60V rEQ_OUT_CrCM @ VIN = 60V Figure 36 — Output equivalent resistance vs. error voltage VEAO ZVS Regulators Rev 2.4 Page 20 of 39 10/2021 PI354x-00 PI3546-00 (12.0VOUT) Electrical Characteristics Specifications apply for –40°C < TJ < 125°C, VIN = 48V, EN = High, VVDR = 5.1V ±2%, L1 = 900nH [a] unless other conditions are noted. Parameter Symbol Conditions Min Typ Max Unit 36 48 60 V 70 V Input Specifications Input Voltage Input Voltage, Transient Input Current Input Current At Output Short (Fault Condition Duty Cycle) VIN_DC VIN_TRANS IIN_DC IIN_Short Input Quiescent Current IQ_VIN Input Voltage Slew Rate VIN_SR < 1% duty cycle,entire transient duration < 10ms VIN = 48V, TC = 25°C, IOUT = 9A 2.33 Short at terminals 3.3 Disabled 0.75 Enabled (no load) 2.6 A - mA mA 1 V/µs Output Specifications EAIN Voltage Total Regulation Output Voltage Trim Range VEAIN VOUT_DC [b] [b] [c] 0.985 1.00 1.015 V 6.5 12 14 V Line Regulation ∆VOUT /∆VIN @ 25°C, 36V < VIN < 60V 0.10 % Load Regulation ∆VOUT /∆IOUT @ 25°C, 0.5A < IOUT < 9A 0.10 % 114 mVp-p Output Voltage Ripple VOUT_AC IOUT = 9A, COUT = 6 x 10µF, 20MHz BW [d] Output Current IOUT_DC [e] Maximum Array Size NParallel 0 9 A 3 Modules Output Current, Array of 2 IOUT_DC-ARRAY2 Total array capability, see applications section for details 0 15.9 A Output Current, Array of 3 IOUT_DC-ARRAY2 Total array capability, see applications section for details 0 22.9 A Current Limit IOUT_CL Typ limit based on nominal 900nH inductor. 10.5 A Timing Switching Frequency Fault Restart Delay fS [f] 48V IN to 12VOUT, 2A out, L1 = 900nH ­±1% tFR_DLY [a] All - 800 30 - kHz ms parameters reflect regulator and inductor system performance. Measurements were made using a standard PI354x evaluation board with 2.5 x 4in dimensions and 4-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to output ripple plots. [e] Refer to load current vs. ambient temperature curves. [f] Refer to switching frequency vs. load current curves. ZVS Regulators Rev 2.4 Page 21 of 39 10/2021 PI354x-00 PI3546-00 (12.0VOUT) Electrical Characteristics (Cont.) Specifications apply for –40°C < TJ < 125°C, VIN = 48V, EN = High, VVDR = 5.1V ±2%, L1 = 900nH [a] unless other conditions are noted. Parameter Symbol Conditions Min Typ Max Unit 1.4 V Soft Start, Tracking and Error Amplifier TRK Active Range (Nominal) VTRK 0 TRK Enable Threshold VTRK_OV 20 40 60 mV TRK to EAIN Offset VEIAN_OV 50 80 110 mV 70 50 30 µA Charge Current (Soft-Start) Discharge Current (Fault) Soft-Start Time VTRK = 0.5V, EA0 shorted to EAIN ITRK ITRK_DIS VTRK = 0.5V tSS CTRK = 0µF 10 0.6 0.94 mA 1.6 ms Error Amplifier Trans-Conductance GMEAO [b] 7.6 mS PSM Skip Threshold PSMSKIP [b] 0.8 V Error Amplifier Output Impedance ROUT [b] Internal Compensation Capacitor CHF [b] 56 pf Internal Compensation Resistor RZI [b] 5 kΩ [a] All 1 MΩ parameters reflect regulator and inductor system performance. Measurements were made using a standard PI354x evaluation board with 2.5 x 4in dimensions and 4-layer, 2oz copper. Refer to inductor pairing table within Application Description section for specific inductor manufacturer and value. [b] Regulator is assured to meet performance specifications by design, test correlation, characterization and/or statistical process control. Output voltage is determined by an external feedback divider ratio. [c] Output current capability may be limited and other performance may vary from noted electrical characteristics when V OUT is not set to nominal. [d] Refer to output ripple plots. [e] Refer to Load current vs. ambient temperature curves. [f] Refer to switching frequency vs. load current curves. ZVS Regulators Rev 2.4 Page 22 of 39 10/2021 PI354x-00 PI3546-00 (12.0VOUT) Electrical Characteristics (Cont.) Efficiency (%) 100 95 36VIN 48VIN 60VIN 90 85 0 1 2 3 4 5 6 7 8 9 IOUT (A) Figure 37 — Regulator efficiency Figure 40 — Output ripple: 48VIN, 12.0VOUT at 9A. VOUT = 50mV/Div, 2.0µs/Div; COUT = 6 x 10µF ceramic 850 Frequency (kHz) 800 750 700 650 36VIN 48VIN 60VIN 600 550 500 450 400 350 0 1 2 3 4 5 6 7 8 9 IOUT (A) Figure 38 — Transient response: 5A to 10A, at 1A/µs. 48VIN to 12.0VOUT, COUT = 6 x 10µF ceramic Figure 41 — Switching frequency vs. load current Figure 39 — Output short circuit @ VIN = 48V Figure 42 — Output ripple: 48VIN, 12.0VOUT at 4.5A. VOUT = 10mV/Div, 2.0µs/Div; COUT = 6 x 10µF ceramic ZVS Regulators Rev 2.4 Page 23 of 39 10/2021 10 PI354x-00 10 12 9 10 8 Output Current DC Amps Output Load Current (A) PI3546-00 (12.0VOUT) Electrical Characteristics (Cont.) 7 6 36VIN 48VIN 60VIN 5 4 8 6 4 3 2 2 0 1 0 0 50 75 100 125 IOUT @ VIN = 36V 3 4 IOUT @ VIN = 48V IOUT @ VIN = 60V Figure 43 — Load current vs. ambient temperature, 0LFM Figure 46 — Output current vs. error voltage VEAO 10 7 9 6 8 Modulator Gain (S) Output Load Current (A) 2 V(EAO) Volts Ambient Temperature (°C) 7 6 36VIN 48VIN 60VIN 5 4 3 2 5 4 3 2 1 1 0 1 0 50 75 100 0 125 1 2 3 4 VEAO Volts Ambient Temperature (°C) gMOD @ VIN = 36V gMOD @ VIN = 48V gMOD @ VIN = 60V Figure 44 — Load current vs. ambient temperature, 200LFM Figure 47 — Modulator gain vs. error voltage VEAO 35 9 9 8 Output Resistance Ohms - DCM Output Load Current (A) 10 10 8 7 6 36VIN 48VIN 60VIN 5 4 3 7 25 6 20 5 4 15 3 10 2 5 1 2 0 1 0 30 0 1 2 3 4 0 VEAO Volts DC 50 75 100 125 Ambient Temperature (°C) Figure 45 — Load current vs. ambient temperature, 400LFM rEQ_OUT_DCM @ VIN = 36V rEQ_OUT_CrCM @ VIN = 36V rEQ_OUT_DCM @ VIN = 48V rEQ_OUT_CrCM @ VIN = 48V rEQ_OUT_DCM @ VIN = 60V rEQ_OUT_CrCM @ VIN = 60V Figure 48 — Output equivalent resistance vs. error voltage VEAO ZVS Regulators Rev 2.4 Page 24 of 39 10/2021 PI354x-00 Functional Description The PI354x-00 is a family of highly integrated ZVS Buck regulators. The PI354x-00 has an output voltage that can be set within a prescribed range shown in Table 1. Performance and maximum output current are characterized with a specific external power inductor (see Table 2). VIN CIN VIN PGND VDR SYNCO SYNCI PWRGD EN TESTx SGND PI354X VS1 VOUT VSN VSP VDIFF LGH EAIN EAO COMP TRK L1 VOUT COUT no longer 180 degrees. Also when the switching frequency of a module is reduced due to an external clock source driving SYNCI, the current limit threshold may be significantly reduced. Soft-Start The PI354x-00 includes an internal soft-start capacitor to control the rate of rise of the output voltage. See the Electrical Characteristics Section for the default value. Connecting an external capacitor from the TRK pin to SGND will increase the start‑up ramp period. See, “Soft Start Adjustment and Track,” in the Applications Description section for more details. Output Voltage Selection The PI354x-00 output voltage can be selected by connecting a resistor from EAIN pin to SGND and a resistor from Vout to the EAIN pin as shown in Figure 49. Table 1 defines the allowable operational voltage ranges for the PI354x-00 family. Device Figure 49 — ZVS Buck with required components For basic operation, Figure 49 shows the connections and components required. No additional design or settings are required. ENABLE (EN) EN is the enable pin of the converter. The EN Pin is referenced to SGND and permits the user to turn the regulator on or off. The EN default polarity is a positive logic assertion. If the EN pin is left floating or asserted high, the converter output is enabled. Pulling EN pin below 0.8VDC with respect to SGND will disable the regulator output. Remote Sensing If remote sensing is required, the PI354x-00 product family is equipped with an undedicated differential amplifier. This amplifier can allow full differential remote sense by configuring it as a differential follower and connecting the VDIFF pin to the EAIN pin. Switching Frequency Synchronization The SYNCO pin provides a 5V level clock that can be used to monitor the internal clock of the regulator, or synchronize other regulators to it. The start of the switching cycles will coincide with the rising edge of SYNCO, and SYNCO will remain high for ½ the period of the preset switching frequency (fS), or T1, whichever is longer. The SYNCI input allows the controller to synchronize its internal clock to an external clock source. The SYNCI pin should be connected to SGND through a 0Ω resistor when not in use and should never be left floating. The controller can synchronize to frequencies between 50% and 110% of the preset switching frequency (fS). When using SYNCI, the PI354x-00 phase synchronizes to the falling edge of the applied clock on SYNCI. When SYNCI is driven from a second module’s SYNCO, there is an effective 180 degrees of phase shift between the start of the switching cycles, provided the modules are switching at the preset switching frequency. At higher loads when pulse stretching occurs and the operating frequency is lowered, the phase shift is Output Voltage Nom. Range PI3542-00-LGIZ 2.5V 2.2 – 3.0V PI3543-00-LGIZ 3.3V 2.6 – 3.6V PI3545-00-LGIZ 5.0V 4.0 – 5.5V PI3546-00-LGIZ 12V 6.5 – 14.0V Table 1 — PI354x-00 family output voltage ranges Output Current Limit Protection PI354x-00 has two methods implemented to protect from output short or over current condition. Slow Current Limit protection: prevents the output from sourcing current higher than the regulator’s maximum rated current. If the output current exceeds the Current Limit (IOUT_CL) for 1024µs, a slow current limit fault is initiated and the regulator is shut down, which eliminates output current flow. After Fault Restart Delay (tFR_DLY ), a soft-start cycle is initiated. This restart cycle will be repeated indefinitely until the excessive load is removed. Fast Current Limit protection: PI354x-00 monitors the regulator inductor current pulse-by-pulse to prevent the output from supplying very high current due to sudden low-impedance short. If the regulator senses a high inductor current pulse, it will initiate a fault and stop switching until Fault Restart Delay ends and then initiate a soft-start cycle. Input Undervoltage Lockout If VIN falls below the input Undervoltage Lockout (UVLO) threshold, but remains high enough to power the internal bias supply, the PI354x-00 will complete the current cycle and stop switching. The system will soft start once the input voltage is reestablished and after the Fault Restart Delay. ZVS Regulators Rev 2.4 Page 25 of 39 10/2021 PI354x-00 Input Overvoltage Lockout Variable Frequency Operation If VIN exceeds the input Overvoltage Lockout (OVLO) threshold (VOVLO), while the controller is running, the PI354x-00 will complete the current cycle and stop switching. The system will soft start after the Fault Restart Delay once VIN recovers. The PI354x products permit input voltage positive transient excursions beyond VIN_DC maximum, up to VIN-TRANS maximum. In this case, the input voltage is allowed to be outside the VIN_DC range for up to 10ms, with no more than a 1% duty cycle. Note that any excursion beyond the VIN_DC maximum must still adhere to the maximum slew rate VIN_SR. Each PI354x-00 is preprogrammed to a base operating frequency, with respect to the power stage inductor (see Table 2), to operate at peak efficiency across line and load variations. At low-line and high‑load applications, the base frequency will decrease to accommodate these extreme operating ranges. By stretching the frequency, the ZVS operation is preserved throughout the total input line voltage range therefore maintaining optimum efficiency. Output Overvoltage Protection Application Description The PI354x-00 family is equipped with output Overvoltage Protection (OVP) to prevent damage to input voltage sensitive devices. If the output voltage exceeds 20% of its set regulated value, the regulator will complete the current cycle and stop switching. The system will resume operation once the output voltage falls below the OVP threshold and after Fault Restart Delay. Overtemperature Protection The PI354x features an over temperature protection (OTP), which will not engage until after the product is operated above the maximum rated temperature. The OTP circuit is only designed to protect against catastrophic failure due to excessive temperatures and should not be relied upon to ensure the device stays within the recommended operating temperature range. Thermal shut down terminates switching and discharges the soft-start capacitor. As the temperature falls the PI354x will restart, and this will always occur before the product returns to rated temperature range. Pulse Skip Mode (PSM) PI354x-00 features a PSM to achieve high efficiency at light loads. The regulators are setup to skip pulses if EAO falls below a PSM threshold. Depending on conditions and component values, this may result in single pulses or several consecutive pulses followed by skipped pulses. Skipping cycles significantly reduces gate drive power and improves light load efficiency. The regulator will leave PSM once the EAO rises above the Skip Mode threshold. VIN CIN SYNCI #2 SYNCO #2 R1 EN #2 VIN PGND VDR PI354X SYNCO SYNCI (#1) PWRGD EN TESTx SGND VS1 VOUT VSN VSP VDIFF LGH EAIN EAO COMP TRK L1 VOUT COUT EAO #2 TRK #2 VIN CIN To R1 SYNCO #1 EN #1 VIN PGND VDR PI354X SYNCO SYNCI (#2) PWRGD EN TESTx SGND VS1 VOUT VSN VSP VDIFF LGH EAIN EAO COMP TRK L1 COUT EAO #1 Parallel Operation PI354x-00 can be connected in parallel to increase the output capability of a single output rail. When connecting modules in parallel, each EAO, TRK, EAIN and EN pin should be connected together. Current sharing will occur automatically in this manner so long as each inductor is the same value. A common viewing chain may be used to sense the output voltage. Refer to the Electrical Characteristics table for maximum array size and array rated output current. Current sharing may be considered independent of synchronization and/or interleaving. Modules do not have to be interleaved or synchronized to share current. Synchronization PI354x-00 units may be synchronized to an external clock by driving the SYNCI pin. The synchronization frequency must not be higher than the programmed maximum value FSW. This is the switching frequency during DCM of operation. The minimum synchronization frequency is FSW /2. In order to ensure proper power delivery during synchronization, the user should refer to the switching frequency vs. output current curves for the load current, output voltage and input voltage operating point. The synchronization frequency should not be lower than that determined by the curve or reduced output power will result. The power reduction is approximately the ratio between required frequency and synchronizing frequency. If the required frequency is 1MHz and the sync frequency is 600kHz, the user should expect a 40% reduction in output capability. Interleaving Interleaving is primarily done to reduce output ripple and the required number of output capacitors by introducing phase current cancellation. The PI354x-00 has a fixed delay that is proportional to to the maximum value of FSW shown in the data sheet. When connecting two units as shown in Figure 50, they will operate at 180 degrees out of phase when the converters switching frequency is equal to FSW. If the converter enters CrCM and the switching frequency is lower than FSW, the phase delay will no longer be 180 degrees and ripple cancellation will begin to decay. Interleaving when the switching frequency is reduced to lower than 80% of the programmed maximum value is not recommended. TRK #1 Figure 50 — PI354x-00 parallel operations ZVS Regulators Rev 2.4 Page 26 of 39 10/2021 PI354x-00 Output Voltage Set Point The PI354x-00 family of Buck Regulators utilizes an internal reference (VREF). The output voltage setting is accomplished using external resistors as shown in Figure 51. Select R2 to be at or around 1kΩ for best noise immunity. Use Equations 1 and 2 to determine the proper value based on the desired output voltage. VOUT 1 VOUT 2 (a) Parent VOUT VOUT 2 VOUT + VLGH-REF + RZI LGH (b) R1 t EAIN VREF EAO R2 Figure 52 — PI354x-00 tracking methods CHF For Direct Tracking, choose the PI354x-00 with the highest output voltage as the parent and connect the parent to the TRK pin of the other PI354x-00 regulators through a divider (Figure 53) with the same ratio as the child’s feedback divider. COMP Figure 51 — External resistor divider network VOUT = VREF R1 = R2 • • R1 + R2 R2 Parent VOUT (1) (VOUT – VREF ) (2) VREF TRK Child where VREF = VEAIN R2 SGND Soft-Start Adjust and Tracking Figure 53 — Voltage divider connections for direct tracking The TRK pin offers a means to increase the regulator’s soft-start time or to track with additional regulators. The soft-start slope is controlled by an internal capacitor and a fixed charge current to provide a Soft-Start Time tSS for all PI354x-00 regulators. By adding an additional external capacitor to the TRK pin, the soft‑start time can be increased further. The following Equation can be used to calculate the proper capacitor for a desired soft-start times: CTRK = (tTRK • ITRK ) – 47 • 10 R1 PI34xx -9 (3) Where, tTRK is the soft-start time and ITRK is a 50µA internal charge current (see Electrical Characteristics for limits). There is typically either proportional or direct tracking implemented within a design. For proportional tracking between several regulators at start up, simply connect all PI354x-00 device TRK pins together. This type of tracking will force all connected regulators to start up and reach regulation at the same time (see Figure 52a). All connected PI354x-00 regulator soft-start slopes will track with this method. Direct tracking timing is demonstrated in Figure 52b. All tracking regulators should have their Enable (EN) pins connected together to work properly. Inductor Pairing The PI354x-00 utilizes an external inductor. This inductor has been optimized for maximum efficiency performance. Product specifications are guaranteed by use of the specific, approved inductor(s) listed in the inductor pairing table. Use of any other inductor shall void product specifications and warranty. Table 2 details the specific inductor value and part number utilized for each PI354x-00. Device Inductor (nH) Inductor Part Number Manufacturer PI3542-00 340 FPT1006-340-R Eaton PI3543-00 420 HCV1206-R42-R Eaton PI3545-00 PI3546-00 420 900 PA5119.421NLT Pulse HCV1206-R42-R Eaton PA5119.421NLT Pulse HCV1206-R90-R Eaton PA5119.901NLT Pulse Table 2 — PI354x-00 inductor pairing ZVS Regulators Rev 2.4 Page 27 of 39 10/2021 PI354x-00 Thermal de-rating curves are provided that are based on component temperature changes versus load current, input voltage and air flow. It is recommended to use these curves as a guideline for proper thermal de-rating. These curves represent the entire system and are inclusive to both the Picor regulator and the external inductor. Maximum thermal operation is limited by either the MOSFETs or inductor depending upon line and load conditions. Thermal measurements were made using a standard PI354x-00 Evaluation board which is 2.5 x 4 inches in area and uses 4-layer, 2oz copper. Thermal measurements were made on the three main power devices, the two internal MOSFETs and the external inductor, with air flows of 0, 200, and 400LFM. The Control-Output transfer function (also known as the small signal modulator gain) has a single pole response determined by the parallel combination of RLOAD and rEQ and the output capacitor COUT. Equation 5 determines the frequency of the modulator pole: FP_MOD = 1 2•π • RLOAD • rEQ RLOAD + rEQ (5) • COUT Figure 55 depicts the small signal response of the modulator when perturbing EAO and measuring the differential gain and phase from EAO to VOUT. Small Signal Model – Constant Voltage Mode 20 The PI354x-00 product family is a variable frequency CCM/DCM ZVS Buck Regulator. The small signal model for this powertrain is that of a voltage controlled current source which has a trans‑conductance that varies depending on the operating mode. When the converter is operating at its normal frequency, it is in discontinuous mode. As the load increases to the point at which the boundary between discontinuous and continuous modes is reached, the powertrain changes frequency to remain in critical conduction mode. This mode of operation allows the PI354x-00 product family to have a very simple compensation scheme, as the control to output transfer function always has a slope of –1. In addition, when critical conduction is reached, the voltage controlled current source becomes nearly ideal with a high output equivalent resistance. Gain - dBV Phase-Degrees 0 20 Gain-dBV 0 40 20 60 40 Phase-Degrees Thermal De-Rating 80 100 60 1 10 100 1000 Frequency- Hz 10000 100000 Figure 55 — PI354x-00 control-output gain/phase example VOUT gMOD rEQ COUT RLOAD + VEAO Figure 54 — PI354x-00 small-signal model control-output Error Amplifier The small signal model of the error amplifier and compensator is shown in Figure 56. The error amplifier is a transconductance amplifier (TCA). The transfer function is shown in Equation 6, where in this example R1 = 2.3kΩ, R2 = 1kΩ, GMEAO = 5.1mS, ROUT = 1Meg, CHF = 56pF, Ccomp = 4.7nF and R ZI = 5kΩ. Here it is important to note that the external components are Ccomp, R1 and R2. The other components are internal to each specific model. See the data tables section “Soft Start, Tracking And Error Amplifier” for details. The control to output transfer function of the PI354x-00 product family is defined as the gain from the output of the error amplifier, through the modulator and to the output voltage. The transfer function Equation is shown in Equation 4, where gMOD is assumed to be 7S, rEQ = 0.4Ω, COUT = 600µF and RLOAD = 1Ω: GCO(s) = 1 RLOAD gMOD + 1 rEQ VEAO GMEAO CHF RZI + CCOMP VOUT R1 + s (COUT ) (4) R2 Figure 56 — PI354x-00 error amplifier model ZVS Regulators Rev 2.4 Page 28 of 39 10/2021 ROUT PI354x-00 80 Gain - dBV Phase-Degrees 100 0 Gain - dBV Phase-Degrees 20 150 Gain-dBV 60 Phase-Degrees Gain-dBV 40 100 0 40 Phase-Degrees 50 60 50 80 20 1 10 100 1000 10000 100000 0 50 100 1000000 1 10 Frequency- Hz Figure 57 — PI354x-00 input-control gain/phase GIN_CTL(s) = GMEAO • ) 1 + s • CCOMP • (ROUT + RZI ) + ROUT • CHF + s • (CHF • CCOMP • RZI • ROUT ) The transfer function of the error amplifier and compensator (also known as the Input To Control transfer function) reveals the response of a Type II amplifier with a low-frequency pole determined by Equation 7, a zero which sets the mid-band gain determined by Equation 8 and a high‑frequency pole determined by Equation 9. Figure 58 shows the calculated Input To Control transfer function. Multiplying Equation 3 by Equation 6 ; described by Equation 10, results in the total loop gain (also known as the Output To Input transfer function). A graph is shown in Figure 58. The strategy is to set the zero such that the mid-band gain allows a high crossover frequency while providing maximum phase boost at crossover, with proper gain and phase margin. FPLF = FZMB = FPHF = 1000 Frequency- Hz 1 2 • π • (RZI + ROUT ) • (CCOMP + CHF ) 1 2 • π • (RZI // ROUT ) • CCOMP CHF + CCOMP GOUT_IN(s) = GCO(s) • GIN_CTL(s) = 33Hz = 6.8kHz 2 • π • (RZI // ROUT) • CCOMP • CHF 10000 100000 1000000 Figure 58 — PI354x-00 output-input gain/phase ROUT + s (RZI • CCOMP • ROUT) ( 100 = 580kHz (7) (8) 2 • R2 R1 + R2 (6) Lighting Mode (LGH) The Lighting (LGH) mode allows the PI354x-00 product family to be able to operate in constant current mode (CC) so that it can support a wide range of applications that require the ability to regulate current or voltage. Primary applications are LED lighting, battery / super-capacitor charging and high peak current pulse transient load applications. The PI354x-00 product family can operate in dual modes, either as a constant voltage (CV) regulator or a constant current (CC) regulator. Both modes can be utilized in a single system. The PI354x-00 family has a separate current amplifier, called LGH, and built in 100mV lighting reference that has its output connected to the EAO pin internally. If the current through an external shunt starts to develop 100mV at the LGH pin, the LGH amplifier will take over regulation by pulling down on the EAO output until the current is in regulation according to the designed shunt value. The LGH amplifier is a sink only trans‑conductance amplifier (TCA). It does not source current. In the event of an open LED string or open current signal, the voltage loop can be set to regulate the output voltage to a safe or desired value in CV mode. (9) (10) ZVS Regulators Rev 2.4 Page 29 of 39 10/2021 PI354x-00 the internal reference, the voltage error amplifier acts as a 400µA current source pull up for the EAO pin. VIN CIN VIN PGND VDR PI354X SYNCO SYNCI PWRGD EN TESTx SGND VS1 VOUT VSN VSP VDIFF LGH EAIN EAO COMP TRK L1 VOUT COUT R R1 C RLGH RSHUNT R2 Figure 61 shows a small signal model of the modulator gain when using the application circuit shown in Figure 59 with two 3.4V high‑current LED’s in series. RLED is the series combination of the AC resistance of each LED, which is 0.2Ω. RSHUNT is used to sense the current through the LED string. It has a value of 50mΩ in this case. The other component values were defined earlier and remain the same values. Equation 12 defines the transfer function of the modulator and Equation 13 defines the pole of transfer function. The transfer function of the LGH amplifier is defined in Equation 14. The open loop gain of EINT is 2500 and ELS = 4.4. Figure 59 — Lighting configuration using CC mode VOUT When using the CC mode, it is important to set R1 and R2 appropriately to avoid voltage loop interaction with the current loop. In this case, the voltage setting at the EAIN pin should be set so that the error between it and the 1V reference is sufficient to force the EAO to be open loop and source current always. When not using the LGH amplifier, the LGH pin should be connected to SGND. The LGH amplifier is able to sink more current than the error amplifier can source, thus avoiding arbitration issues when transitioning back and forth from LGH mode to voltage mode. The Equation for setting the source current for EAO is shown in Equation 11. IEAO = (VEAIN – VREF ) • GMEA > 400µA (11) LGH Amplifier Small Signal Model A small signal model of the LGH amplifier is shown in Figure 60. gMOD rEQ RLED COUT + VLGH RSHUNT VEAO Figure 61 — Lighting application modulator gain model Figure 62 is the Bode plot of the GLED(s) transfer function, which in LGH mode is what needs to be compensated for by the LGH amplifier and compensator. This transfer function defines the gain and phase from the error amplifier output (EAO) to the current shunt RSHUNT. Figure 65 is a plot of the transfer function GLGH_ EAO (s), which defines the gain and phase from the LGH pin (voltage across current sensing RSHUNT ) to EAO. As shown in Equation 14, the output is dependent on the integrator stage and the following transconductance stage. Figures 63 and 64 show the two individual sections that make up Equation 14 which produces GLGH_EAO(s). 400µA lEAO VEAO RZI + + EINT ELS + CHF 0 Gain - dBV Phase-Degrees ROUT CCOMP Figure 60 — LGH amplifier small-signal model The LGH amplifier consists of three distinct stages. The first is a wide bandwidth integrator stage, followed by a fixed gain level shift circuit. Finally, the level shift circuit drives a trans‑conductance (TCA) amplifier with an open collector sink only output stage. Since the LGH output is internally connected to the output of the voltage error amplifier, the compensation components show up in the model and are used by both stages, depending on which one is in use. Only one stage should be in use at a time. When using LGH or if the LGH input rises above 40 40 60 60 80 80 1 10 100 1000 Frequency- Hz Figure 62 — GLED(s) gain/phase plot ZVS Regulators Rev 2.4 Page 30 of 39 10/2021 0 20 20 Gain-dBV VLGH RZI 10000 100 100000 Phase-Degrees GMLGH CINT PI354x-00 GLED(s) = gMOD • (rEQ • RSHUNT )/((RSHUNT + RLED + rEQ ) + s (COUT • rEQ • RLED+ RSHUNT • rEQ • COUT )) FP_LED = 1 Where: FP_HF = = 1.2kHz 2 • π • ((RLED + RSHUNT )//rEQ ) • COUT GLGH_EAO(s) = EINT (s) • ELS • GMLGH • EINT (s) = EINT • (12) (13) ROUT + s (RZI • CCOMP • ROUT ) (14) 1 + s • (CCOMP + CHF ) + s2 • (CHF • CCOMP • RZI ) 1 (15) 1 + s • (RLGH • CINT • EINT ) CHF + CCOMP 2 • π • (RZI // ROUT ) • CCOMP • CHF (16) = 580kHz The integrator pole is determined by the external input resistor RLGH and the internal CINT, which is 20pF. Assuming RLGH = 100kΩ and EINT = 2500: Gain - dBV Phase-Degrees 60 150 0 20 Gain - dBV Phase-Degrees 100 0 50 60 Gain-dBV 40 20 Phase-Degrees Gain-dBV 40 0 100 0 80 20 40 1 10 100 1000 10000 150 50 100 100000 0 80 20 60 40 40 60 20 80 10 100 1000 10000 100000 100 1000000 Frequency- Hz Figure 64 — GMLGH(s) gain/phase plot voltage loop open Phase-Degrees Gain - dBV Phase-Degrees 1 10 100 1000 10000 100000 1000000 Figure 65 — GLGH_EAO(s) gain/phase plot RLGH = 100kΩ Figure 63 — EINT(s) gain/phase plot RLGH = 100kΩ 0 1 Frequency- Hz Frequency- Hz Gain-dBV 50 Phase-Degrees 80 When combining Figure 63 with Figure 64, it becomes clear that additional compensation is needed to have enough phase and gain margin like can be seen with the voltage loop plot. We can remedy that easily, by adding a series R-C in parallel with RLGH as shown in the lighting application diagram in Figure 59. The capacitor will be chosen to work with RLGH to add a zero approximately 1.2kHz before the zero provided by the GMLGH(s) transfer function (the trans-conductance stage of the LGH amplifier). This value will be chosen to be 270pF. The external added resistor will form a high‑frequency pole to roll the gain off at higher frequency. This pole will be set at approximately 120kHz so a common 4.99kΩ resistor will be used. The resulting Bode plot with the new compensator of GLGH_EAO(s) can be seen in Figure 66. Figure 67 shows the final Bode plot of the loop gain when using a lighting application with LED’s operating in constant current mode. Note that it is very important to understand the AC resistance of the LEDs that are being used. Please consult the LED manufacturer for details. For a series string, you should add the individual LED resistances and combine them into one lumped value to simplify the analysis. ZVS Regulators Rev 2.4 Page 31 of 39 10/2021 PI354x-00 150 Gain - dBV Phase-Degrees Input Filter Case 1; Inductive source and local, external, input decoupling capacitance with negligible ESR (i.e., ceramic type): 0 50 100 Phase-Degrees Gain-dBV 100 The voltage source impedance can be modeled as a series Rline Lline circuit. The high‑performance ceramic decoupling capacitors will not significantly damp the network because of their low ESR; therefore in order to guarantee stability the following conditions must be verified: 50 Rline > 150 0 1 10 100 1000 10000 100000 IN_INT + CIN_EXT )• r Rline RCIN_EXT 0 1000000 Frequency- Hz Lline CIN_INT • RCIN_EXT Figure 67 — Lighting application loop gain/phase plot Filter Considerations The PI354x-00 requires low-impedance ceramic input capacitors (X7R/X5R or equivalent) to ensure proper start up and high‑frequency decoupling for the power stage. The PI354x-00 will draw nearly all of the high‑frequency current from the low‑impedance ceramic capacitors when the main high‑side MOSFET(s) are conducting. During the time the MOSFET(s) are off, the input capacitors are replenished from the source. Table 4 shows the recommended input and output capacitors to be used for the PI354x-00 as well as per capacitor RMS ripple current and the input and output ripple voltages. Table 5 includes the recommended input and output ceramic capacitors. (19) < rEQ_IN (20) Notice that the high‑performance ceramic capacitors CIN_INT within the PI354x-00 should be included in the external electrolytic capacitance value for this purpose. The stability criteria will be: Equation 20 shows that if the aggregate ESR is too small – for example by using very high‑quality input capacitors (CIN_EXT ) – the system will be under-damped and may even become destabilized. As noted, an octave of design margin in satisfying Equation 19 should be considered the minimum. When applying an electrolytic capacitor for input filter damping the ESR value must be chosen to avoid loss of converter efficiency and excessive power dissipation in the electrolytic capacitor. It is very important to verify that the voltage supply source as well as the interconnecting lines are stable and do not oscillate. ZVS Regulators Rev 2.4 Page 32 of 39 10/2021 PI354x-00 VDR Bias Regulator System Design Considerations The VDR internal bias regulator is a ZVS switching regulator that resides internal to the PI354x-00 product family. It is intended strictly for use to power the internal controller and driver circuitry. The power capability of this regulator is sized only for the PI354x-00, with adequate reserve for the application it was intended for. It may be used for as a pull-up source for open collector applications and for other very low-power use with the following restrictions: 1. Inductive loads: As with all power electronic applications, consideration must be given to driving inductive loads that may be exposed to a fault in the system which could result in consequences beyond the scope of the power supply primary protection mechanisms. An inductive load could be a filter, fan motor or even excessively long cables. Consider an instantaneous short circuit through an un-damped inductance that occurs when the output capacitors are already at an initial condition of fully charged. The only thing that limits the current is the inductance of the short circuit and any series resistance. Even if the power supply is off at the time of the short circuit, the current could ramp up in the external inductor and store considerable energy. The release of this energy will result in considerable ringing, with the possibility of ringing nodes connected to the output voltage below ground. The system designer should plan for this by considering the use of other external circuit protection such as load switches, fuses, and transient voltage protectors. The inductive filters should be critically damped to avoid excessive ringing or damaging voltages. Adding a high‑current Schottky diode from the output voltage to PGND close to the PI354x-00 is recommended for these applications. 1. The total external loading on VDR must be less than IVDR. 2. No direct connection is allowed. Any noise source that can disturb the VDR voltage can also affect the internal controller operation. A series inpedance is required between the VDR pin and any external circuitry. 3. All loads must be locally decoupled using a 0.1µF ceramic capacitor. This capacitor must be connected to the VDR output through a series resistor no smaller than 1kΩ, which forms a low-pass filter. 2. Low-voltage operation: There is no isolation from an SELV (Safety-Extra-Low-Voltage) power system. Powering low-voltage loads from input voltages as high as 60V may require additional consideration to protect low-voltage circuits from excessive voltage in the event of a short circuit from input to output. A fast TVS (transient voltage suppressor) gating an external load switch is an example of such protection. 3. Use of Lighting Mode (LGH) as a battery charger is certainly very feasible. It is fashionable to design these chargers such that the battery is always connected to it. Since the Buck topology is not isolated, shorting the input terminals or capacitors of an unpowered regulator/charger could allow damaging current flow through the body diode of the high‑side MOSFET that would be unprotected by a conventional input fuse. It is recommended to connect the PI354x-00 family to the battery using an active ORing device if LGH mode is used as a constant current battery charger. The same should be considered for super-capacitor applications as well. ZVS Regulators Rev 2.4 Page 33 of 39 10/2021 PI354x-00 Device VIN (V) PI3542-00 48 ILOAD (A) 10 5 PI3543-00 10 48 5 PI3545-00 10 48 5 PI3546-00 9 48 4.5 CINPUT Ceramic X7R COUTPUT Ceramic X7R CINPUT Ripple Current (ARMS) COUTPUT Ripple Current (ARMS) 5 x 2.2µF 100V 6 x 100µF 0.7 1.32 5 x 2.2µF 100V 6 x 100µF 0.8 1.3 5 x 2.2µF 100V 6 x 47µF .88 1.37 5 x 2.2µF 100V 6 x 10µF 1.12 1.26 Input Ripple (mVpp) Output Ripple (mVpp) 416 47 220 22 464 61.6 230 31 485 62 245 32 880 114 125 33 Transient Deviation (mVpk) Recovery Time (µs) Load Step (A) (Slew/µs) ±80 40 5 (1A/µs) ±90 40 5 (1A/µs) ±150 40 5 (1A/µs) ±300 20 5 (1A/µs) Table 3 — Recommended input and output capacitance Murata Part Number Description GRM32ER72A225KA35 2.2µF 100V 1210 X7R GRM32EC70J107ME15 100µF 6.3V 1210 X7S:EIA GRM32ER71A476KE15 47µF 10V 1210 X7R:EIA GRM32ER61H106MA12 10µF 50V 1210 X5:EIA VIN CIN Table 4 — Capacitor manufacturer part numbers COUT Layout Guidelines To optimize maximum efficiency and low-noise performance from a PI354x-00 design, layout considerations are necessary. Reducing trace resistance and minimizing high current-loop returns along with proper component placement will contribute to optimized performance. A typical buck converter circuit is shown in Figure 68. The potential areas of high parasitic inductance and resistance are the circuit return paths, shown as LR below. VIN CIN Figure 69 — Current flow: Q1 closed When Q1 is on and Q2 is off, the majority of CIN’s current is used to satisfy the output load and to recharge the COUT capacitors. When Q1 is off and Q2 is on, the load current is supplied by the inductor and the COUT capacitor as shown in Figure 70. During this period CIN is also being recharged by the VIN. Minimizing CIN loop inductance is important to reduce peak voltage excursions when Q1 turns off. Also, the difference in area between the CIN loop and COUT loop is vital to minimize switching and GND noise. COUT VIN Figure 68 — Typical Buck regulator The path between the COUT and CIN capacitors is of particular importance since the AC currents are flowing through both of them when Q1 is turned on. Figure 69, schematically, shows the reduced trace length between input and output capacitors. The shorter path lessens the effects that copper trace parasitics can have on the PI354x-00 performance. CIN COUT Figure 70 — Current flow: Q2 closed ZVS Regulators Rev 2.4 Page 34 of 39 10/2021 PI354x-00 The recommended component placement, shown in Figure 71, illustrates the tight path between CIN and COUT (and VIN and VOUT ) for the high AC return current. This optimized layout is used on the PI354x-00 evaluation board. VOUT COUT GND CIN VIN VSW GND Figure 71 — Recommended component placement and metal routing ZVS Regulators Rev 2.4 Page 35 of 39 10/2021 PI354x-00 Recommended PCB Footprint and Stencil E1 PIN 1 e L b D1 e e PCB LAND PATTERN PI354X DIMENSIONAL REFERENCES REF. MIN. NOM. b&L D1 E1 e 0.50 0.55 9.00 BSC 9.00 BSC 1.00 BSC MAX. 0.60 The recommended receiving footprint for PI354x-00 10mm x 10mm package. All pads should have a final copper size of 0.55mm x 0.55mm, whether they are solder-mask defined or copper defined, on a 1mm x 1mm grid. All stencil openings are 0.45mm when using either a 5mil or 6mil stencil. ZVS Regulators Rev 2.4 Page 36 of 39 10/2021 PI354x-00 LGA Package Drawings A K G E D A 3 D E DETAIL B DETAIL A M A L M A M M L 3 A DETAIL B SCALE 36 : 1 SEATING PLANE METALLIZED PAD A SOLDER MASK DETAIL A L D E ZVS Regulators Rev 2.4 Page 37 of 39 10/2021 PI354x-00 Revision History Revision Date 1.0 - 1.1 05/2015 Released Engineering format/style n/a 1.2 10/12/15 Reformatted in new template n/a 1.3 02/19/16 Updated PCB Footprint 1.4 05/09/16 1.5 11/08/16 Description Typo correction Correction to Conditions on Switching Frequency Updated Input OVLO Threshold TRK function performance enhancement Updated package drawing Features and Applications Lists Updated LGH Reference Max changed from 105 to 107mV Input Quiescent Current Performance improved EN section moved to common electrical specifications on pg 7 & removed from individual product electrical specifications. Table 4 Capacitor Part Numbers updated Package Outline Drawing updated Amendments to Absolute Maximum Ratings Clarifications to Enable, Protection and Soft Start, Tracking and Error Amplifier Package drawings updated Corrections to Figures 49, 50, 51 Updated Overtemperature Protection Output Voltage Set Point description updated Equations amended Updated land pattern and LGA package drawing Added BGA package information Page Number(s) 34 7 & 25 8 8, 12, 16 & 20 9, 13, 17 & 21 35 1 7 8, 12, 16 & 20 7, 9, 13, 17 & 21 34 36 4 8, 10 6, 36, 37 25, 26, 27 26 27 27, 31, 32 36, 37 38 1.6 03/09/17 1.7 08/08/18 1.8 09/14/18 Correction to BGA height measurement 1 1.9 03/03/20 Update to Equation 6 29 2.0 05/15/20 Updated to add recommended Pulse Electronics inductors 27 2.1 08/11/20 Updated terminology 27 2.2 10/30/20 Added ESD specification 2.3 05/06/21 Removed BGIZ option 2.4 10/04/21 Revised inductor pairing information Please note: one page added in Rev 1.6, 1.7; page removed in Rev 2.3. ZVS Regulators Rev 2.4 Page 38 of 39 10/2021 3 1, 3, 25 27 PI354x-00 Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for inaccuracies. Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. 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No license, whether express, implied, or arising by estoppel or otherwise, to any intellectual property rights is granted by this document. Interested parties should contact Vicor’s Intellectual Property Department. The products described on this data sheet are protected by U.S. Patents. Please see www.vicorpower.com/patents for the latest patent information. Contact Us: http://www.vicorpower.com/contact-us Vicor Corporation 25 Frontage Road Andover, MA, USA 01810 Tel: 800-735-6200 Fax: 978-475-6715 www.vicorpower.com email Customer Service: custserv@vicorpower.com Technical Support: apps@vicorpower.com ©2018 – 2021 Vicor Corporation. All rights reserved. The Vicor name is a registered trademark of Vicor Corporation. All other trademarks, product names, logos and brands are property of their respective owners. ZVS Regulators Rev 2.4 Page 39 of 39 10/2021