PRM® Regulator
PRM48DH480T250A03
DC to DC Regulator
FEATURES
DESCRIPTION
• Optimized for VR12.0
• 48V (38 to 60 VIN), non-isolated ZVS buck-boost
regulator
• 5 to 55 V adjustable output range
• Building block for high efficiency DC-DC systems
2
• 145W Output Power in 0.57 in footprint
• 97% typical efficiency, at full load
3
3
• 1,342 W/in (82 W/cm ) Power Density
• Enables a 48 V to 1.2 V, 130 A isolated, regulated
2
2
solution with total footprint of 1.7in (11cm )
• Flexible “Remote Sense” architecture optimizes
regulation / feedback loop design to fit application
requirements
• Current Feedback signal allows dynamic adjustment of
current limit setpoint
• 9.32 MHrs MTBF (MIL-HDBK-217Plus Parts Count)
The VI Chip PRM® Regulator is a high efficiency
converter, operating from a 38 to 60 Vdc input to generate
a regulated 5 to 55 Vdc output. The ZVS Buck – Boost
topology enables high switching frequency (~1.5 MHz)
operation with high conversion efficiency. High switching
frequency reduces the size of reactive components
3
enabling power density up to 1,342 W/in .
TYPICAL APPLICATIONS
An external control loop and current sensor maintain
regulation and enable flexibility both in the design of
voltage and current compensation loops to control of
output voltages and currents.
•
•
•
•
•
•
The half VI Chip package is compatible with standard pickand-place and surface mount assembly processes with a
planar thermal interface area and superior thermal
conductivity.
In a Factorized Power Architecture™ system, the
PRM48DH480T250A03
and
downstream
VTM®
transformer minimize distribution and conversion losses in
a high power solution.
High Efficiency Server Processor and Memory Power
High Density ATE system DC-DC power
Telecom NPU and ASIC core power
LED drivers
High Density Power Supply DC-DC rail outputs
Non-isolated power converters
48 V to 1.2 V, 130A Voltage Regulator
Voltage
Control
Feedback
Enable/
Disable
Voltage
Reference
PC
PR
TM
38 to 60
Vdc Input
IM
+OUT
+IN
PRM48DH480T250A03
-IN
IF
RE
SG
PC
TM
+OUT1
+OUT2
+IN
VTM48EF012T130A01
-IN
-OUT
VC
VC
Current
Sense
PRM® Regulator
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Rev 1.4
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-OUT1
-OUT2
Load
PRM48DH480T250A03
1.0 ABSOLUTE MAXIMUM RATINGS
The ABSOLUTE MAXIMUM ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause
permanent damage to device. Electrical specifications do not apply when operating beyond rated operating conditions. All
voltages are specified relative to SG unless otherwise noted. Positive pin current represents current flowing out of the pin.
2.0 ELECTRICAL CHARACTERISTICS
Specifications apply over all line and load conditions, TJ = 25 ºC and output voltage from 20V to 55V, unless otherwise noted.
Boldface specifications apply over the temperature range of 0 ºC < TJ < 125 ºC.
PRM® Regulator
Page 2 of 23
Rev 1.4
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PRM48DH480T250A03
3.0 SIGNAL CHARACTERISTICS
Specifications apply over all line and load conditions, TJ = 25 ºC and Output Voltage from 20V to 55V, unless otherwise noted.
Boldface specifications apply over the temperature range of 0 ºC < TJ < 125 ºC.
PRM® Regulator
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Rev 1.4
12/2012
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PRM48DH480T250A03
PRM® Regulator
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PRM48DH480T250A03
4.0 FUNCTIONAL BLOCK DIAGRAM
+Vin
+Vout
Vcc
Vcc
3.3V
Linear
Regulator
Internal
Vcc
Regulator
-Vin
PC
PR Vout
Cin
Cout
3.3V
Q3
Q1
uC 8051
RE
L
-Vout
16V
+Vout
9V
Q4
Q2
Output
Discharge
(OD)
8.2V
PR
Modulator
PR
93.3kW
Enable
Var. Vclamp
2.5mA Min
VTM Vc Start up pulse
0.5mA
14V
VC
10ms
Vcc
100uA
Q
Q
SET
CLR
Fault Logic
TOFF
delay
S
Instant
latch
R
R
Vout
(OV)
5V
2mA max
3V
RE
Latch after
120us
RE
3.3V
Vin
(OV, UV)
Vs
9V
0.01uF
Enable
PC
10uA
PC
VPC_EN
TM
3 V @ 27°C
SG
Current Limit
Overtemperature
Protection
VIF_IL
Overcurrent
Protection
Temperature
dependent voltage
source
IF
2130W
Vref
(130°C)
VIF_OC
PRM® Regulator
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Rev 1.4
12/2012
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PRM48DH480T250A03
HIGH LEVEL FUNCTIONAL STATE DIAGRAM
Conditions that cause state transitions are shown along arrows. Sub-sequence activities listed inside the state bubbles.
Application of
Vin
PC HIGH
and
Toff expiry
STARTUP
SEQUENCE
PC: 1.8mA to HIGH
STANDBY
SEQUENCE
PC: 10uA to LOW
Toff Timeout
PC: 90uA to HIGH
Powertrain Stopped
Overtemp or Output
OVP
Fault
removed
TBLNK
expiry
BLANKING
PC: 1.8mA to HIGH
Input OVP,
Input UVP,
or
OverCurrent Prot
TBLNK Timeout
Powertrain Paused
PC
falling
edge
SUSTAINED
OPERATION
PC: 1.8mA to HIGH
Powertrain Active
Short Removed:
Vout > VSC_VOUTR
or
Vpr < VSC_VPR_R
Vout < 1 V
And
TSCR expiry
Short Circuit:
Vout < VSC_Vout
and
Vpr > VSC_Vpr
SHORT
CIRCUIT
PC: 1.8mA to HIGH
TSC Timeout
Powertrain Active
TSC
expiry
OUTPUT DISCHARGE
PC: pulsed 25mA drive
LOW
TSCR Timeout
Powertrain Stopped
IOD Output Discharge
PRM® Regulator
Page 6 of 23
PC HIGH
and
Ton expiry
Ton timeout;
VC Pulse;
Powertrain Active
Delayed RE
Rev 1.4
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PC
falling
edge
PRM48DH480T250A03
5.0 TIMING DIAGRAMS
Module Inputs are shown in blue; Module Outputs are shown in brown; Timing diagrams assumes the following:
Ø Single PRM (no array)
Ø VS powers error amplifier
Ø RE powers voltage reference and output current transducer
Ø IOUT is sensed, scaled, and fed back to IF pin such that IF = 2.00 V at full load
2
1
Start up with
1.2V/ms < dVIN/dt < maximum
VIN
OV
TOFF
3
4
Quick OC Input OV
(t 45º : for the closed loop response, the
phase should be greater than 45º where the gain crosses
0dB.
2) Gain Margin > 10dB : The closed loop gain should be
lower than -10dB where the phase crosses 0º.
3) Gain Slope = -20dB / decade : The closed loop gain
should have a slope of -20dB / decade at the crossover
frequency.
The compensation characteristics must be selected to
meet these stability criteria. Refer to Figure 27 for a local
sense, voltage-mode control example based on the
configuration in Figure 26. In this example, it is assumed
that the maximum crossover frequency (FCMAX) has been
selected to occur between B and C. Type-2 compensation
(Curve IJKL) is sufficient in this case.
The following data must be gathered in order to proceed:
Ø Modulator Gain GPR: See Figures 17, 18, 19
Ø Powertrain equivalent resistance rEQ: See Figures
17, 18, 19
Ø Internal output capacitance: see Figure 20
Ø External output capacitance value
Rev 1.4
12/2012
Ø
rEQ _ OUT + RLOAD
1
2 π⋅
In order to properly compensate the control loop, all
components which contribute to the closed loop frequency
response should be identified and understood. Figure 25
shows the AC small signal model for the module.
Modulator DC gain GPR and powertrain equivalent
resistance rEQ_OUT are shown. These modeling parameters
will support a design cut-off frequency up to 50 kHz.
Standard Bode analysis should be used for calculating the
error amplifier compensation and analyzing the closed
loop stability. The recommended stability criteria are as
follows:
rEQ _ OUT ⋅ RLOAD
Main pole frequency:
FP ≈
Control loop compensation requirements
PRM® Regulator
Page 18 of 23
Powertrain pole, assuming the external capacitor
ESR can be neglected:
RCOUT _ EXT >FZ1 (C1 + C2 ≈ C1):
FP 2 ≈
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1
2π ⋅ R3 ⋅ C2
[3]
PRM48DH480T250A03
9.2.4
Midband Gain Design (R1,R3):
9.2.5
With reference to Figure 27: curve ABC is the:
Ø minimum output voltage in the application
Ø maximum input voltage expected in the application
Ø maximum load
PRM open loop response, and is where the maximum
crossover frequency occurs. In order for the maximum
crossover frequency to occur at the design choice FCMAX,
the compensation gain must be equal and opposite of the
powertrain gain at this frequency. For stability purposes,
the compensation should be in the Mid-band (J-K) at the
crossover. Using Equation [1], the mid-band gain can be
selected appropriately.
Compensation Zero Design (C1):
With reference to Figure 27: curve EFG is the:
Ø maximum output voltage in the application
Ø minimum input voltage expected in the application
Ø minimum load in the application
PRM open loop response, and is where the minimum
crossover frequency FCMIN occurs. Based on stability
criteria, the compensation must be in the mid-band at the
minimum crossover frequency, therefore FCMIN will occur
where EFG is equal and opposite of GMB. C1 can be
selected using Equation [2] so that FZ1 occurs prior to
FCMIN.
C2
C1
R3
+
Vref
R2
R1
F1
+IN
CIN_EXT
CIN_INT
-IN
Vref
VS
IF RE
PR
RS
+OUT
PRM
COUT_EXT
COUT_INT
SG
-OUT
I sense
IC
Vref IC
Figure 26 – Control circuit example
PRM® Regulator
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PRM48DH480T250A03
Open Loop Gain vs. Frequency
80
60
Gain (dB)
40
20
I
10MHz GBW
Compensation Gain
F
E
PRM Open Loop Min Load
B
A
PRM Open Loop Max Load
J
K
L
FCMIN
0
FCMAX
-20
C
G
-40
Frequency (Hz)
Figure 27 – reference asymptotic Bode plot for the considered system
9.2.6
High Frequency Pole Design (C2):
based on the ratio of the “kick” to “droop” (as defined in
Fig. 28).
Using Equation [3], C2 should be selected so that FP2 is at
least one decade above FCMAX and prior to the gain
bandwidth product of the operational amplifier (10MHz for
this example). For applications with a higher desired
crossover frequency the use of a high gain bandwidth
product amplifier may be necessary to ensure that the real
pole can be set at least one decade above the maximum
crossover frequency.
9.2.7
k
Vout
d
Verifying Stability:
time
The preferred method for verifying stability is to use a
network analyzer, measuring the closed loop response
across various lines and load conditions.
In the absence of a network analyzer, a load step transient
response can be used in order to estimate stability.
Figure 28 illustrates an example of a load step response.
Equation [4] can be used to predict the phase margin
PRM® Regulator
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Iout
time
Figure 28 – load step response example and “droop”
vs. “kick” definition
PRM48DH480T250A03
Figure 20 provides the effective internal capacitance of the
module. A conservative estimate of input and output peakpeak voltage ripple at nominal line and trim is provided by
equation [5]:
2
⎛ k ⎞
⎜ ln ⎟
⎝ d ⎠
Φ m ≈ 100
2
⎛ k ⎞
2
⎜ ln ⎟ + π
d
⎝
⎠
[4]
ΔV =
9.3
I FL ⋅ 0.4
f SW
+ CEXT
QTOT −
Burst Mode Operation:
At light loads, the PRM will operate in a burst mode due to
minimum timing constraints. An example burst operation
waveform is illustrated in Figure 29.
For very light loads, and also for higher input voltages, the
minimum time power switching cycle from the powertrain
will exceed the power required by the load. In this case the
external error amplifier will periodically drive PR below the
switching threshold in order to maintain regulation.
Switching will cease momentarily until the error amplifier
once again drives PR voltage above the threshold.
CINT
[5]
QTOT is the total input (Fig. 15) or output (Fig. 14) charge
per switching cycle at full load, while CINT is the module
internal effective capacitance at the considered voltage
(Fig. 20) and CEXT is the external effective capacitance at
the considered voltage.
9.5
Input filter stability
The PRM can provide very high dynamic transients. It is
therefore very important to verify that the voltage supply
source as well as the interconnecting line are stable and
do not oscillate. For this purpose, the converter dynamic
input impedance magnitude
rEQ _ IN
is provided in Figures
22, 23, 24. It is recommended to provide adequate design
margin with respect to the stability conditions illustrated in
10.5.1 and 10.5.2.
9.5.1 Inductive source and local, external input
decoupling capacitance with negligible ESR (i.e.: ceramic
type)
Figure 29 – light load burst mode of operation
Note that during the bursts of switching, the powertrain
frequency is constant, but the number of pulses as well as
the time between bursts is variable. The variability
depends on many factors including input voltage, output
voltages, load impedance, and external error amplifier
output impedance.
In burst mode, the gain of the PR input to the plant which
is modeled in the previous sections is time varying.
Therefore the small signal analysis can not be directly
applied to burst mode operation.
9.4
Input and Output filter design
Figures 14 and 15 provide the total input and output
charge per cycle, as well as switching frequency, of the
PRM at full load under various input and output voltages
conditions.
PRM® Regulator
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The voltage source impedance can be modeled as a
series RlineLline circuit. The high performance ceramic
decoupling capacitors will not significantly damp the
network because of their low ESR; therefore in order to
guarantee stability the following conditions must be
verified:
Rline >
(C IN _ INT
Rline RCIN _ EXT
[8]
Lline
< rEQ _ IN
C IN _ EXT ⋅ RC IN _ EXT
[9]
Equation [9] shows that if the aggregate ESR is too small
– for example by using very high quality input capacitors
(CIN_EXT) – the system will be under-damped and may even
become destabilized. Again, an octave of design margin in
satisfying [8] should be considered the minimum.
9.6
Arrays
Up to ten PRMs of the same type may be placed in
parallel to expand the power capacity of the system. The
following high-level guidelines must be followed in order
for the resultant system to start up and operate properly,
and to avoid overstress or exceeding any absolute
maximum ratings.
Ø –IN pins of all PRMs must be connected together.
Both inductance and resistance from the common
power source to each PRM should be minimized,
and matched.
Ø Input voltage to all PRMs must be the same.
Independent
fuses
for
each
PRM
are
recommended.
Ø PC pins must be connected together for
synchronization and proper fault response.
Ø Reference supply to the control loop voltage
reference and current sense circuitry must be
enabled when all modules’ RE pins have reached
their operational voltage levels.
Ø There must be one single external voltage control
loop. The control loop must drive each PR pin
relative to each module’s SG pin, and the local PR
voltage must be the same across all modules.
Ø Each PRM must have its own local current shunt
and current sense circuitry to drive its IF pin.
Ø The number of PRMs required to achieve a given
array capacity must consider all sources of
mismatch to avoid overstress of any PRM in the
array. Imbalances in sharing are not only due to
current sharing accuracy specifications, but also
PRM® Regulator
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temperature differences among PRMs, Vin
variations, and error terms in the buffering of the
error amplifier output to the PR pins.
Control loop compensation procedures above will
hold for an array, in general, although many
parameters must be scaled against the number of
PRMs in the system.
Input Fuse Recommendations
A fuse should be incorporated at the input to each PRM, in
series with the +IN pin. A 10 A or smaller input fuse
®
2®
(Littelfuse NANO
451/453 Series, or equivalent) is
required to safety agency conditions of acceptability.
Always ascertain and observe the safety, regulatory, or
other agency specifications that apply to your specific
application.
9.8
Layout considerations
Application Note AN:005 details board layout using V•I
Chip components. Additional consideration must be given
to the external control circuit components.
The current sense shunt signal voltage is highly sensitive
to noise. As such, current sensing circuitry should be
located close to the shunt to minimize the length of the
sense signals. A Kelvined connection at the shunt is
recommended for best results.
The control signal from a remote voltage sense circuit to
the PRM should be shielded. Avoid routing this, or other
control signals directly underneath the PRM, if possible.
Components that tie directly to the PRM should be located
close to their respective pins. It is also critical that all
control components be referenced to SG, and that SG not
be tied to any other ground in the system, including –IN or
–OUT of the PRM.
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PRM48DH480T250A03
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components,
fully configurable AC-DC and DC-DC power supplies, and complete custom power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor
makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves
the right to make changes to any products, specifications, and product descriptions at any time without notice. Information published by
Vicor has been checked and is believed to be accurate at the time it was printed; however, Vicor assumes no responsibility for
inaccuracies. Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty.
Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Vicor’s Standard Terms and Conditions
All sales are subject to Vicor’s Standard Terms and Conditions of Sale, which are available on Vicor’s webpage or upon request.
Product Warranty
In Vicor’s standard terms and conditions of sale, Vicor warrants that its products are free from non-conformity to its Standard
Specifications (the “Express Limited Warranty”). This warranty is extended only to the original Buyer for the period expiring two (2)
years after the date of shipment and is not transferable.
UNLESS OTHERWISE EXPRESSLY STATED IN A WRITTEN SALES AGREEMENT SIGNED BY A DULY AUTHORIZED VICOR
SIGNATORY, VICOR DISCLAIMS ALL REPRESENTATIONS, LIABILITIES, AND WARRANTIES OF ANY KIND (WHETHER ARISING
BY IMPLICATION OR BY OPERATION OF LAW) WITH RESPECT TO THE PRODUCTS, INCLUDING, WITHOUT LIMITATION, ANY
WARRANTIES OR REPRESENTATIONS AS TO MERCHANTABILITY, FITNESS FOR PARTICULAR PURPOSE, INFRINGEMENT
OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT, OR ANY OTHER MATTER.
This warranty does not extend to products subjected to misuse, accident, or improper application, maintenance, or storage. Vicor shall
not be liable for collateral or consequential damage. Vicor disclaims any and all liability arising out of the application or use of any
product or circuit and assumes no liability for applications assistance or buyer product design. Buyers are responsible for their products
and applications using Vicor products and components. Prior to using or distributing any products that include Vicor components,
buyers should provide adequate design, testing and operating safeguards.
Vicor will repair or replace defective products in accordance with its own best judgment. For service under this warranty, the buyer must
contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior
authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay
all reshipment charges if the product was defective within the terms of this warranty.
Life Support Policy
VICOR’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR
SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF THE CHIEF EXECUTIVE OFFICER AND GENERAL
COUNSEL OF VICOR CORPORATION. As used herein, life support devices or systems are devices which (a) are intended for
surgical implant into the body, or (b) support or sustain life and whose failure to perform when properly used in accordance with
instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user. A critical component
is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life
support device or system or to affect its safety or effectiveness. Per Vicor Terms and Conditions of Sale, the user of Vicor products and
components in life support applications assumes all risks of such use and indemnifies Vicor against all liability and damages.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating
to the products described in this data sheet. No license, whether express, implied, or arising by estoppel or otherwise, to any
intellectual property rights is granted by this document. Interested parties should contact Vicor's Intellectual Property Department.
The products described on this data sheet are protected by the following U.S. Patents Numbers:
5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,186; 7,166,898; 7,187,263;
7,202,646; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965.
Vicor Corporation
25 Frontage Road
Andover, MA, USA 01810
Tel: 800-735-6200
Fax: 978-475-6715
email
Customer Service: custserv@vicorpower.com
Technical Support: apps@vicorpower.com
PRM® Regulator
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