V048F015T80

V•I Chip – VTM Voltage Transformation Module TM V048K015T80 Vf = 32 - 57.6 V VOUT = 1.0 - 1.8 V IOUT = 80 A K = 1/32 ROUT = 1.5 mΩ max © 1 • 48V to 1.5V V•I Chip Converter • 80 A (120 A for 1 ms) • High density – up to 320 A/in3 • Small footprint – 80 A/in2 • Low weight – 0.4 oz (12 g) • Pick & Place / SMD • >92% efficiency at 1.5V • 125°C operation • 1 µs transient response • >3.5 million hours MTBF • No output filtering required • V•I Chip BGA package Actual size Product Description The V048K015T80 V•I Chip Voltage Transformation Module (VTM) breaks records for speed, density and efficiency to meet the demands of advanced DSP, FPGA, ASIC, processor cores and microprocessor applications at the point of load (POL) while providing isolation from input to output. It achieves a response time of less than 1 µs and delivers up to 80A in a volume of less than 0.25 in3 while converting 48 V to 1.5 V with unprecedented efficiency. It may be paralleled to deliver hundreds of amps at an output voltage settable from 1.0 to 1.8 Vdc. The VTM V048K015T80’s nominal output voltage is 1.5 Vdc from a 48 Vdc input factorized bus, Vf, and is controllable from 1.0 to 1.8 Vdc at no load, and from 0.9 V to 1.7 V at full load, over a Vf input range of 32 to 57.6 Vdc. It can be operated either open- or closed-loop depending on the output regulation needs of the application. Operating open-loop, the output voltage tracks its Vf input voltage with a transformation ratio, K=1/32, and an output resistance, ROUT =1.3 milliohm, to enable applications requiring a programmable low output voltage at high current and high efficiency. Closing the loop back to an input Pre-Regulation Module (PRM) or DC-DC converter may be used to compensate for ROUT. Absolute Maximum Ratings Parameter +In to -In +In to -In PC to -In TM to -In SG to -In +Out to -Out Isolation voltage Values -1.0 to 60.0 100 -0.3 to 7.0 -0.3 to 7.0 500 Unit Vdc Vdc Vdc Vdc mA Notes For 100 ms P EL R I IM Output current Peak output current Storage temperature Output power Peak output power Symbol RθJC RθJB RθJA RθJA Notes Parameter Junction-to-case Junction-to-BGA Operating junction temperature Case temperature during reflow RY A N -0.5 to 5.0 1500 Vdc Vdc °C A -40 to 125 80 See note 2 Continuous 120 A For 1 ms 208 °C -40 to 150 144 216 °C W W Continuous For 1 ms Typ 1.1 2.1 6.5 5.0 Max 1.5 2.5 Input to Output Thermal Resistance Units °C/W °C/W °C/W °C/W The 1.5V VTM achieves break-through current density of 320 A/in3 in a V•I Chip package compatible with standard pick-and-place and surface mount assembly processes. The V•I Chip BGA package supports in-board mounting with a low profile of 0.16" (4mm) over the board. A J-lead package option supports on-board surface mounting with a profile of only 0.25" (6mm) over the board. The VTM’s fast dynamic response and low noise eliminate the need for bulk capacitance at the load, substantially increasing the POL density while improving reliability and decreasing cost. Junction-to-ambient 3 Junction-to-ambient 4 7.2 5.5 1. For complete product matrix, see chart on page 10. 2. The referenced junction is defined as the semiconductor having the highest temperature. This temperature is monitored by the temperature monitor (TM) signal and by a shutdown comparator. 3. V048K015T80 surface mounted in-board to a 2" x 2" FR4 board, 4 layers 2 oz Cu, 300 LFM. 4. V048L015T80 (0.25"H integral Pin Fins) surface mounted on FR4 board, 300 LFM. 45 Vicor Corporation Tel: 800-735-6200 vicorpower.com V•I Chip Voltage Transformation Module Rev. 1.6 Page 1 of 20 Specifications INPUT (Conditions are at nominal line, full load, and 25°C ambient unless otherwise specified) Parameter Input voltage range Input dV/dt Input undervoltage turn-on Input undervoltage turn-off Input overvoltage turn-on Input overvoltage turn-off Input quiescent current Inrush current overshoot Input current Input reflected ripple current No load power dissipation Internal input capacitance Internal input inductance Recommended external input capacitance Min 32 Typ 48 Max 57.6 10 32 Unit V V/µs V V V V mA A A mA p-p W µF nH µF Note 29.5 57.6 P EL R 8 IN IM 2.0 0.7 59.0 2.4 2.7 28 2.5 1 20 100 3.5 PC low Using test circuit in Fig.24; See Fig.1 Y AR Using test circuit in Fig.24; See Fig.4 200 nH maximum source inductance; See Fig.24 INPUT WAVEFORMS Figure 1— Inrush transient current at no load and nominal VIN with PC enabled Figure 2— Output voltage turn-on waveform with PC enabled at full load and nominal VIN Figure 3—Output voltage turn-on waveform with input turn-on at full load and nominal VIN Figure 4— Input reflected ripple current at full load and nominal VIN 45 Vicor Corporation Tel: 800-735-6200 vicorpower.com V•I Chip Voltage Transformation Module Rev. 1.6 Page 2 of 20 Specifications, continued OUTPUT (Conditions are at nominal line, full load, and 25°C ambient unless otherwise specified) Parameter Rated DC current Peak repetitive current DC current limit Current share accuracy Efficiency Half load Full load Internal output inductance Internal output capacitance Load capacitance Output overvoltage setpoint Output ripple voltage No external bypass 200µF bypass capacitor Average short circuit current Effective switching frequency Line regulation K Load regulation ROUT Transient response Voltage undershoot Voltage overshoot Response time Recovery time Output overshoot Input turn-on PC enable Output turn-on delay From application of power From release of PC pin 80 95 5 93.8 91.7 1.6 300 100,000 1.83 47 2 200 3.0 70 Min 0 Typ Max 80 120 120 10 Unit A A A % % % nH µF µF V mV mV mA MHz Note Max pulse width 1ms, max duty cycle 10%, baseline power 50% See Parallel Operation on page 11 See Fig.5 See Fig.5 Effective value 93.0 90.8 2.5 0.0309 P 95 94 93 92 91 90 89 88 87 86 85 8 16 EL R Efficiency vs. Output Current I IM 1/32 1.3 0.0316 1.5 10 26 200 1 0 0 170 300 250 ms µs 3.6 mΩ mV mV ns µs RY NA See Figs.7 and 10 See Fig.8 Fixed, 1.5 MHz per phase VOUT=K•VIN at no load See Figs.9 and 27 0-80A load step with 100µF CIN; See Figs.11 and 12 80-0A load step with 100µF CIN See Figs.11 and 12 See Figs.11 and 12 No output filter; See Fig.3 No output filter; See Fig.2 mV mV OUTPUT WAVEFORMS Power Dissipation vs. Output Current 12 Power Dissipation (W) 10 8 6 4 2 0 Eficiency (%) 24 32 40 48 56 64 72 80 8 16 24 32 40 48 56 64 72 80 Output Current (A) Output Current (A) Figure 5— Efficiency vs. output current at 1.5V VOUT Figure 6—Power dissipation as a function of output current at 1.5V VOUT 45 Vicor Corporation Tel: 800-735-6200 vicorpower.com V•I Chip Voltage Transformation Module Rev. 1.6 Page 3 of 20 Specifications, continued PRELIMINARY Figure 7— Output voltage ripple at full load and nominal VIN; without any external bypass capacitor. Figure 8—Output voltage ripple at full load and nominal VIN with 200 µF ceramic external bypass capacitance. Output Ripple vs. Load 50 45 40 Output Ripple (mV) 35 30 25 20 15 10 5 0 8 16 24 32 40 48 56 64 72 80 TBD Output Current (A) Figure 9— Output impedance vs. frequency Figure 10— Output voltage ripple vs. output current at nominal line with no POL bypass capacitance. Figure 11— 0-80A step load change with 100 µF input capacitance and no output capacitance. Figure 12— 0-80A step load change with 100 µF input capacitance and 100 µF output capacitance. V•I Chip Voltage Transformation Module Rev. 1.6 Page 4 of 20 45 Vicor Corporation Tel: 800-735-6200 vicorpower.com Specifications, continued GENERAL Parameter MTBF MIL-HDBK-217F Telcordia TR-NT-000332 Telcordia SR-332 Demonstrated Isolation specifications Voltage Capacitance Resistance Agency approvals (pending) Mechanical parameters Weight Dimensions Length Width Height Min Typ 3.6 4.2 TBD TBD 1,500 5,100 10 cTÜVus CE Mark 0.43 / 12.25 1.26 / 32 0.85 / 21.5 0.24 / 6 oz / g 6,000 Max Unit Mhrs Mhrs hrs hrs Vdc pF MΩ Note 25°C, GB Input to Output Input to Output Input to Output UL/CSA 60950, EN 60950 Low voltage directive See mechanical drawing, Figs.16 and 18 Auxiliary Pins (Conditions are at nominal line, full load, and 25°C ambient unless otherwise specified) Parameter Primary Control (PC) DC voltage Module disable voltage Module enable voltage Current limit Enable delay time Disable delay time Temperature Monitor (TM) 27°C setting Temperature coefficient Full range accuracy Current limit EL PR Min 4.8 2.4 2.4 2.95 -5 100 I IM Typ 5.0 2.5 2.5 2.5 300 4 Max 5.2 2.6 2.9 450 10 3.05 5 3.00 10 in / mm in / mm in / mm RY NA Note Source only See Fig.2 Operating junction temperature Operating junction temperature Source only Unit V V V mA µs µs V mV/°C °C µA Figure 13— VOUT at full load vs. PC disable Figure 14— PC signal during fault 45 Vicor Corporation Tel: 800-735-6200 vicorpower.com V•I Chip Voltage Transformation Module Rev. 1.6 Page 5 of 20 Specifications, continued THERMAL Symbol Parameter Over temperature shutdown Thermal capacity Junction-to-case thermal impedance Junction-to-BGA thermal impedance Junction-to-ambient 1 Junction-to-ambient 2 PRELIMINARY Min 125 Typ 130 0.61 1.1 2.1 6.5 5.0 Max 135 Unit °C Ws/°C °C/W °C/W °C/W °C/W Note Junction temperature RθJC RθJB RθJA RθJA Notes 1. V048K015T80 surface mounted in-board to a 2" x 2" FR4 board, 4 layers 2 oz Cu, 300 LFM. 2. V048L015T80 (0.25"H integral Pin Fins) surface mounted on FR4 board, 300 LFM. V•I CHIP STRESS DRIVEN PRODUCT QUALIFICATION PROCESS Test High Temperature Operational Life (HTOL) Temperature cycling High temperature storage Moisture resistance Temperature Humidity Bias Testing (THB) Pressure cooker testing (Autoclave) Highly Accelerated Stress Testing (HAST) Solvent resistance/marking permanency Mechanical vibration Mechanical shock Electro static discharge testing – human body model Electro static discharge testing – machine model Highly Accelerated Life Testing (HALT) Dynamic cycling Standard JESD22-A-108-B JESD22-A-104B JESD22-A-103A JESD22-A113-B EIA/JESD22-A-101-B JESD22-A-102-C JESD22-A-110B JESD22-B-107-A JESD22-B-103-A JESD22-B-104-A EIA/JESD22-A114-A EIA/JESD22-A115-A Per Vicor Internal Test Specification Per Vicor internal test specification Environment 125°C, Vmax, 1,008 hrs -55°C to 125°C, 1,000 cycles 150°C, 1,000 hrs Moisture sensitivity Level 4 85°C, 85% RH, Vmax, 1,008 hrs 121°C, 100% RH, 15 PSIG, 96 hrs 130°C, 85% RH, Vmax, 96 hrs Solvents A, B & C as defined 20g peak, 20-2,000 Hz, test in X, Y & Z directions 1,500g peak 0.5 ms pulse duration, 5 pulses in 6 directions Meets or exceeds 2,000 Volts Meets or exceeds 200 Volts Operation limits verified, destruct margin determined Constant line, 0-100% load, -20°C to 125°C V•I CHIP BALL GRID ARRAY INTERCONNECT QUALIFICATION Test BGA Daisy-Chain thermal cycling Ball shear Bend test Standard IPC-SM-785 IPC-9701 IPC-9701 IPC J-STD-029 IPC J-STD-029 Environment TC3, -40 to 125°C at