VIV0007TFJ
®
C
S
US
C
NRTL
US
VTM DC to DC Voltage Transformer
TM
FEATURES
• 50 Vdc to 1.56 Vdc 115 A Voltage Transformer
- Operating from standard 48 V or 24 V PRM regulators
TM
• 130 A rated with reduced case temperature at 30°C • High efficiency (>91.5%) reduces system power
consumption
• High density (103 A/in2) • “Full Chip” V• I Chip package enables surface mount,
low impedance interconnect to system board
• Contains built-in protection features:
Overvoltage Lockout Overcurrent Short Circuit Over Temperature
• Provides enable / disable control, internal temperature
monitoring, current monitoring
• ZVS / ZCS resonant Sine Amplitude Converter topology • Less than 50ºC temperature rise at full load
in typical applications TYPICAL APPLICATION
DESCRIPTION The V• I Chip Voltage Transformer is a high efficiency (>91.5%) Sine Amplitude Converter (SAC)TM operating from a 26 to 55 Vdc primary bus to deliver an isolated output. The Sine Amplitude Converter offers a low AC impedance beyond the bandwidth of most downstream regulators, which means that capacitance normally at the load can be located at the input to the Sine Amplitude Converter. Since the K factor of the VIV0007TFJ is 1/32, that capacitance value can be reduced by a factor of 1024, resulting in savings of board area, materials and total system cost. The VIV0007TFJ is provided in a V• I Chip package compatible with standard pick-and-place and surface mount assembly processes. The co-molded V•I Chip package provides enhanced thermal management due to large thermal interface area and superior thermal conductivity. With high conversion efficiency the VIV0007TFJ increases overall system efficiency and lowers operating costs compared to conventional approaches. The VIV0007TFJ enables the utilization of Factorized Power ArchitectureTM providing efficiency and size benefits by lowering conversion and distribution losses and promoting high density point of load conversion.
VIN = 26 to 55 V VOUT = 0.81 to 1.71 V (NO LOAD)
IOUT = 115 A (NOM) K = 1/32
• High End Computing Systems • Automated Test Equipment • High Density Power Supplies
PART NUMBER
VIV0007TFJ
DESCRIPTION
-40°C to 125°C TJ
Regulator
PR PC TM IL VC SG OS CD
Voltage Transformer
PC VC IM TM
PRM
+Out +In
VTM
+Out
+In
VIN
-In -Out -In -Out
L O A D
Factorized Power Architecture (See Application Note AN:024)
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1 7/2009
Page 1 of 18
VIV0007TFJ
1.0 ABSOLUTE MAXIMUM VOLTAGE RATINGS
PRELIMINARY DATASHEET
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. MIN MAX UNIT MIN MAX UNIT + IN to - IN . . . . . . . . . . . . . . . . . . . . . . . PC to - IN . . . . . . . . . . . . . . . . . . . . . . . . TM to -IN . . . . . . . . . . . . . . . . . . . . . . . . VC to - IN . . . . . . . . . . . . . . . . . . . . . . . . -1.0 -0.3 -0.3 11.5 60 20 7.0 16.5 VDC VDC VDC VDC IM to - IN................................................. + IN / - IN to + OUT / - OUT (hipot) ........ + IN / - IN to + OUT / - OUT (working)... + OUT to - OUT....................................... -1.0 0 3.15 100 60 5.5 VDC VDC VDC VDC
2.0 ELECTRICAL CHARACTERISTICS
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted.
ATTRIBUTE Input Voltage Range VIN Slew Rate VIN UV Turn Off SYMBOL VIN dVIN /dt VIN_UV Module latched shutdown, No external VC applied, IOUT = 115A VIN = 50 V VIN = 26 V to 55 V VIN = 50 V, TC = 25ºC VIN = 26 V to 55 V, TC = 25ºC K = VOUT / VIN, IOUT = 0 A VOUT = VIN • K - IOUT • ROUT, Section 11 30°C < Tc < 100°C, IOUT_MAX = - (3/14) * TC + 136.43 TC = 30ºC TPEAK 26 V. SYMBOL VVC_EXT IVC CONDITIONS / NOTES Required for startup, and operation below 26 V. See Section 7. VC = 11.5 V, VIN = 0 V VC = 11.5 V, VIN > 26 V Fault mode. VC > 11.5 V Required for proper startup; 0 ºC < TC < 100 ºC Required for proper startup; -40 ºC < TC < 100 ºC VC = 16.5 V, dVC/dt = 0.25 V/µs VC = 11.5 V to PC high, VIN = 0 V, dVC/dt = 0.25 V/µs VC = 0 V MIN 11.5 0 0.001 0.0025 115 0 60 TYP MAX UNIT 16.5 150 0 0.25 V/µs 0.25 250 75 1 125 mA µs µF V mA
• Used to wake up powertrain circuit. • A minimum of 11.5 V must be applied indefinitely for VIN < 26 V to ensure normal operation. • VC slew rate must be within range for a succesful start. SIGNAL TYPE STATE ATTRIBUTE External VC Voltage Steady VC Current Draw ANALOG INPUT Start Up
VC Slew Rate VC Inrush Current VC to PC Delay
dVC/dt IINR_VC TVC_PC CVC_INT
Transitional
Internal VC Capacitance
PRIMARY CONTROL : PC • The PC pin enables and disables the VTM. • Module will shutdown when pulled low with an impedance When held below 2.0 V, the VTM will be disabled. less than 850 Ω. • PC pin outputs 5 V during normal operation. PC pin is equal to 2.5 V • In an array of VTMs, connect PC pin to synchronize startup. during fault mode given VIN > 26 V and VC > 11.5 V. • PC pin can't sink current and will not disable other module • After successful start-up and under no fault condition, PC can be used as during fault mode. a 5 V regulated voltage source with a 2 mA maximum current. SIGNAL TYPE STATE Steady ATTRIBUTE PC Voltage PC Source Current PC Resistance (Internal) PC Source Current PC Capacitance (Internal) PC Resistance (External) PC Voltage PC Voltage (Disable) PC Pull Down Current PC Disable Time PC Fault Response Time SYMBOL VPC IPC_OP RPC_INT IPC_EN CPC_INT RPC_EXT VPC_EN VPC_DIS IPC_PD TPC_DIS_T TFR_PC Internal pull down resistor Section 7 60 2 5.1 From fault to PC = 2.0 V 5 100 2.5 CONDITIONS / NOTES MIN 4.7 50 50 TYP 5 150 100 MAX UNIT 5.3 2 400 300 1000 3 2 V mA kΩ µA pF kΩ V V mA µs µs
ANALOG OUTPUT
Start Up Enable DIGITAL INPUT / OUPUT Disable Transitional
TEMPERATURE MONITOR : TM • The TM pin monitors the internal temperature of the VTM controller IC • The TM pin has a room temperature setpoint of 3 V within an accuracy of ±5°C. and approximate gain of 10 mV/°C. • Can be used as a "Power Good" flag to verify that the VTM is operating. SIGNAL TYPE STATE ATTRIBUTE TM Voltage TM Source Current TM Gain TM Voltage Ripple Disable DIGITAL OUTPUT (FAULT FLAG) Transitional TM Voltage TM Resistance (Internal) TM Capacitance (External) TM Fault Response Time SYMBOL VTM_AMB ITM ATM VTM_PP VTM_DIS RTM_INT CTM_EXT TFR_TM CONDITIONS / NOTES TJ controller = 27°C MIN 2.95 TYP 3 10 CTM = 0 F, VIN = 50 V, IOUT = 50 A Internal pull down resistor From fault to TM = 1.5 V 25 120 0 40 10 200 50 50 MAX UNIT 3.05 100 V µA mV/°C mV V kΩ pF µs
ANALOG OUTPUT
Steady
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1 7/2009
Page 3 of 18
VIV0007TFJ
3.0 SIGNAL CHARACTERISTICS (CONT.)
PRELIMINARY DATASHEET
Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25°C unless otherwise noted.
CURRENT MONITOR : IM • The IM pin voltage varies between 0.2 V and 1.97 V representing the output current within ±25% under all operating line temperature conditions between 50% and 100%. SIGNAL TYPE STATE ATTRIBUTE IM Voltage (No Load) IM Voltage (50%) IM Voltage (Full Load) IM Gain IM Resistance (External) SYMBOL VIM_NL VIM_50% VIM_FL A IM RIM_EXT • The IM pin provides a DC analog voltage proportional to the output current of the VTM. CONDITIONS / NOTES TJ = 25ºC, VIN = 50 V, IOUT = 0 A TJ = 25ºC, VIN = 50 V, IOUT = 57.5 A TJ = 25ºC, VIN = 50 V, IOUT = 115 A TJ = 25ºC, VIN = 50 V, IOUT > 57.5 A MIN 0.2 TYP 0.25 0.95 1.97 18 MAX 0.3 UNIT V V V mV/A MΩ
ANALOG OUTPUT
Steady
2.5
4.0 TIMING DIAGRAM
IOUT ISCP IOCP
1 23
b
6
7
4
5
d
g
8
VC
VVC-EXT
a
VOVLO
Vin
NL ≥ 26 V
c
e
Vout
TM
VTM-amb
PC
5V 3V
f
a: VC slew rate (dVC/dt) b: Minimum VC pulse rate (see section 5) c: TOVLO d: TOCP e: PC disable time (TPC-dis) f: VC to PC delay g: TSCP
1. Initiated VC pulse 2. Controller start 3. VIN ramp up 4. VIN = VOVLO 5. VIN ramp down no VC pulse 6. Overcurrent 7. Start up on short circuit 8. PC driven low
Caution:
The module is not designed to start in this sequence. Notes: – Timing and voltage is not to scale – Error pulse width is load dependent
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1 7/2009
Page 4 of 18
VIV0007TFJ
5.0 APPLICATION CHARACTERISTICS
PRELIMINARY DATASHEET
The following values, typical of an application environment, are collected at TJ = 25ºC unless otherwise noted. See associated figures for general trend data.
ATTRIBUTE No Load Power Dissipation Efficiency (Ambient) Efficiency (Hot) Output Resistance (Ambient) Output Resistance (Hot) Output Resistance (Cold) Output Voltage Ripple VOUT Transient (Positive) VOUT Transient (Negative) SYMBOL PNL ηAMB ηHOT ROUT_AMB ROUT_HOT ROUT_COLD VOUT_PP VOUT_TRAN+ VOUT_TRANCONDITIONS / NOTES VIN = 49 V, PC enabled VIN = 49 V, IOUT = 115 A VIN = 49 V, IOUT = 115 A VIN = 49 V VIN = 49 V VIN = 49 V COUT = 0 F, IOUT = 115 A, VIN = 50 V, 20 MHz BW, Section 12 IOUT_STEP = 0 A TO 130A, VIN = 50 V, ISLEW >10 A /us IOUT_STEP = 130 A to 0 A, VIN = 50 V ISLEW > 10 A /us TYP 3.8 90.4 89.4 1.03 1.21 0.89 167 120 160 UNIT W % % mΩ mΩ mΩ mV mV mV
No Load Power Dissipation vs. Line Voltage
7.5 7.0 6.5 6.0 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 26 29 32 36 39 42 45 49 52 55 94 92
115 A Load Efficiency vs. TCASE
Power Dissipation (W)
Efficiency (%)
90 88 86 84 82 80 78 -40 -20 0 20 40 60 80 100
Input Voltage (V)
TCASE: -40°C 25°C 100°C VIN :
Case Temperature (°C)
26 V 49 V 55 V
Figure 1 – No load power dissipation vs. VIN
Figure 2 – Full load efficiency vs. temperature
Efficiency & Power Dissipation -40°C Case
94 94
Efficiency & Power Dissipation 25°C Case
Power Dissipation (W) Power Dissipation (W)
90
90
η
η
Efficiency (%)
86 82 78 74 70 66 0 26 26 V 49 V 52 55 V 78 26 V 104 49 V 24 20 16 12 8 4 0 130
Efficiency (%)
86 82 78 74 70 66 0 26 26 V 49 V 52 55 V 78 26 V 104 49 V 24 20 16 12 8 4 0 130
PD
PD
Load Current [A]
VIN: 55 V VIN:
Load Current (A)
55 V
Figure 3 – Efficiency and power dissipation at –40°C
Figure 4 – Efficiency and power dissipation at 25°C
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1 7/2009
Page 5 of 18
VIV0007TFJ
Efficiency & Power Dissipation 100°C Case
94
1.25
PRELIMINARY DATASHEET
ROUT vs. TCASE at VIN = 49 V
Power Dissipation (W)
90
η
1.20 1.15
Efficiency (%)
86 82 78 74 70 66 0 23 46 69 92 24 20 16 12 8 4 0 115
ROUT (mΩ)
1.10 1.05 1.00 0.95 0.90 0.85 -40 -20 0 20 40 60 80 100
PD
Load Current (A)
VIN: 26 V 49 V 55 V 26 V 49 V 55 V
I OUT :
Case Temperature (ºC)
11.5 A 57.5 A 115 A
Figure 5 – Efficiency and power dissipation at 100°C
Figure 6 – ROUT vs. temperature
Output Voltage Ripple vs. Load
190 170
VRIPPLE (mV PK-PK)
150 130 110 90 70 50 30 10 11.5 23 34.5 46 57.5 69 80.5 92 103.5 115
Load Current (A)
VIN: 26 V 50 V 55 V
Figure 7 – Full load ripple, 100 µF CIN; No external COUT. Board mounted module, scope setting : 20 MHz analog BW, digital filter 1.5 bits -3 dB @ 12 MHz
Figure 8 – VRIPPLE vs. IOUT ; VIN, No external COUT. Board mounted module, scope setting : 20 MHz analog BW, digital filter 1.5 bits -3 dB @ 12 MHz
Safe Operating Area
220 200 140 135 130
Limited by Power VIN • K after a successful power up the energy will be transferred from secondary to primary. The input to output ratio of the VTM will be maintained. The VTM will continue to operate in reverse as long as the input and output voltages are within the specified range. The VIV0007TFJ has not been qualified for continuous reverse operation.
PC VC IM TM
R
R
VTM
VIN
+In +Out
+ _
-In -Out
Supply
A VC
B
CD
E
F
G
H
VIN
Supply
VIN
VIN
ZIN_EQ1
VTM1
RO_1
ZOUT_EQ1
VOUT
VOUT
VOUT
Supply
ZIN_EQ2
+ –
VTM2
RO_2
ZOUT_EQ2
TM
Load
DC
PC
A: VOUT supply > 0 V
ZIN_EQn
VTMn
RO_n
ZOUT_EQn
B: VC to -IN > 11.5 V controller wakes-up, PC & TM pulled high, reverse inrush protection blocks VOUT supplying VIN C: VIN supply ramps up D: VIN > VOUT/K, powertrain starts in normal mode E: VIN supply ramps down F: VIN > VOUT/K, powertrain transfers reverse energy G: VOUT ramps down, VIN follows H: VC turns off
Figure 20 – VTM array
Figure 21 – Reverse inrush protection
Rev. 1.1 7/2009
Page 14 of 18
v i c o r p o w e r. c o m
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
VIV0007TFJ
16.0 LAYOUT CONSIDERATIONS The VIV0007TFJ requires equal current density along the output J-leads to achieve rated efficiency and output power level. The negative output J-leads are not connected internally and must be connected on the board as close to the VTM as possible. The layout must also prevent the high output current of the VIV0007TFJ from interfering with the input-referenced signals. To achieve these requirements, the following layout guidelines are recommended: • The total current path length from any point on the V+OUT J-leads to the corresponding point on the V-OUT J-leads should be equal (see Figure 22) .
PRELIMINARY DATASHEET
Figure 22 – Equal current path
• Use vias along the negative output J-leads to connect the negative output to a common power plane. • Use sufficient copper weight and number of layers to carry the output current to the load or to the output connectors. • Be sure to include enough vias along both the positive and negative J leads to distribute the current among the layers of the PCB. • Do not run input-referenced signal traces (VC, PC, TM and IM) between the layers of the secondary outputs. • Run the input-referenced signal traces (VC, PC, TM and IM) such that V-IN shields the signals. See AN:005 FPA Printed Circuit Board Layout Guidelines for more details. Equalizing the current paths is most easily accomplished by centering the VTM output J-leads between the output connections of the PCB and by designing the board such that the layout is symmetric from both sides of the output and from the front and back ends of the output as shown in Figures 23 and 24.
Figure 23 – Symmetric layout
Figure 24 – Symmetric layout
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1 7/2009
Page 15 of 18
VIV0007TFJ
17.0 MECHANICAL DRAWING
PRELIMINARY DATASHEET
17.1 RECOMMENDED LAND PATTERN
4 A B C D E F G H J K L
3
2
1
M
N
Bottom View
NOTES: mm 1. DIMENSIONS ARE inch . 2. UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: X.XX = ≠±0.25 [0.01] X.XXX = ≠±0.127 [0.005] 3. RoHS COMPLIANT PER CST-0001 LATEST REVISION. DXF and PDF files are available on vicorpower.com
Signal Name +In –In IM TM VC PC +Out –Out
Designation M2, M1 M4, M3 N3 N4 N2 N1 A3-L3, A2-L2 A4-L4, A1-L1
Click here to view original mechanical drawing on the Vicor website.
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1 7/2009
Page 16 of 18
VIV0007TFJ
17.2 RECOMMENDED LAND PATTERN FOR PUSH PIN HEAT SINK
PRELIMINARY DATASHEET
RECOMMENDED LAND PATTERN (NO GROUNDING CLIPS)
TOP SIDE SHOWN
36.50 1.437 2.95 ± 0.07 ø 0.116 ± 0.003 (2) PL.
NON-PLATED THRU HOLE SEE NOTE 1
( 18.25 ) 0.719
DASHED LINE INDICATES VIC POSITION
7.63 0.300
( 3.50 ) 0.138
NOTES:
( 22.26 ) 0.876
1. MAINTAIN 3.50 [0.138] DIA. KEEP-OUT ZONE FREE OF COPPER, ALL PCB LAYERS. 2. (A) MINIMUM RECOMMENDED PITCH IS 39.50 [1.555], THIS PROVIDES 7.00 [0.275] COMPONENT EDGE-TO-EDGE SPACING, AND 0.50 [0.020] CLEARANCE BETWEEN VICOR HEAT SINKS. (B) MINIMUM RECOMMENDED PITCH IS 41.00 [1.614], THIS PROVIDES 8.50 [0.334] COMPONENT EDGE-TO-EDGE SPACING, AND 2.00 [0.079] CLEARANCE BETWEEN VICOR HEAT SINKS. 3. V•I CHIP LAND PATTERN SHOWN FOR REFERENCE ONLY; ACTUAL LAND PATTERN MAY DIFFER. DIMENSIONS FROM EDGES OF LAND PATTERN TO PUSH-PIN HOLES WILL BE THE SAME FOR ALL FULL SIZE V•ICHIP PRODUCTS. 4. RoHS COMPLIANT PER CST-0001 LATEST REVISION.
7.00 0.276
2.51 0.099
( 31.48 ) 1.239 39.50 1.555 SEE NOTE 2A
RECOMMENDED LAND PATTERN (With GROUNDING CLIPS)
TOP SIDE SHOWN
38.03 1.497 ø 2.95 ± 0.07 0.116 ± 0.003 (2) PL.
NON-PLATED THRU HOLE SEE NOTE 1
0.76 0.030 ( 18.25 ) 0.719
36.50 1.437
DASHED LINE INDICATES VIC POSITION
5. UNLESS OTHERWISE SPECIFIED: DIMENSIONS ARE MM [INCH]. TOLERANCES ARE: X.X [X.XX] = ±0.3 [0.01] X.XX [X.XXX] = ±0.13 [0.005]
0.44 0.017
7.63 0.300
( 3.50 ) 0.138
6. PLATED THROUGH HOLES FOR GROUNDING CLIPS (33855) SHOWN FOR REFERENCE. HEATSINK ORIENTATION AND DEVICE PITCH WILL DICTATE FINAL GROUNDING SOLUTION.
6.12 0.241
( 22.26 ) 0.876
7.00 0.276
ø 2.03 0.080 (2) PL.
PLATED THRU HOLE SEE NOTE 6
2.51 0.099
( 31.48 ) 1.239 41.00 1.614 SEE NOTE 2B
Click here to view original mechanical drawing on the Vicor website.
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1 7/2009
Page 17 of 18
VIV0007TFJ
PRELIMINARY DATASHEET
Warranty
Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to the original purchaser only. EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Vicor will repair or replace defective products in accordance with its own best judgement. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes all risks of such use and indemnifies Vicor against all damages.
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are available upon request.
Specifications are subject to change without notice.
Intellectual Property Notice
Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the products described in this data sheet. Interested parties should contact Vicor's Intellectual Property Department. The products described on this data sheet are protected by the following U.S. Patents Numbers: 5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,186; 7,166,898; 7,187,263; 7,202,646; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965.
Vicor Corporation 25 Frontage Road Andover, MA, USA 01810 Tel: 800-735-6200 Fax: 978-475-6715 email Customer Service: custserv@vicorpower.com Technical Support: apps@vicorpower.com
V•I CHIP INC. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200
v i c o r p o w e r. c o m
Rev. 1.1 7/2009
Page 18 of 18
