VTM™ Current Multiplier
VTM48Ex120y025A0R
®
S
US
C
C
NRTL
US
High-Efficiency, Bidirectional Sine Amplitude Converter
Features & Benefits
Product Ratings
• 48VDC to 12VDC 25A bidirectional current multiplier
• Can power a load connected to either the primary or
secondary side
• High efficiency (>96%) reduces system power consumption
• High density
(85A/in3)
Chip®
• “Full Chip” VI
package enables surface mount,
low-impedance interconnect to system board
• Contains built-in protection features against:
Overvoltage Lockout
Overcurrent
Short Circuit
Overtemperature
• Provides enable / disable control,
internal temperature monitoring
• ZVS / ZCS resonant Sine Amplitude Converter topology
VPRI = 26 – 55V
ISEC = 25A (Nominal)
VSEC = 6.5 – 13.8V (No Load)
K = 1/4
Product Description
The VI Chip® bidirectional current multiplier is a Sine Amplitude
Converter (SAC™) operating from a 26 to 55VDC primary source
or a 6.5 to 13.8VDC secondary source to power a load. The
bidirectional Sine Amplitude Converter isolates and transforms
voltage at a secondary:primary ratio of 1/4. The SAC offers a
low AC impedance beyond the bandwidth of most downstream
regulators; therefore for a step-down conversion; capacitance
normally at the load can be located at the source to the Sine
Amplitude Converter to enable a reduction in size of capacitors.
Since the K factor of the VTM48EF120T025A0R is 1/4, the
capacitance value on the primary side can be reduced by a
factor of 16 in an application where the source is located on the
primary side, resulting in savings of board area, materials and
total system cost.
The VTM48EF120T025A0R is provided in a VI Chip package
compatible with standard pick-and-place and surface mount
assembly processes. The co-molded VI Chip package provides
enhanced thermal management due to a large thermal interface
area and superior thermal conductivity. The high conversion
efficiency of the VTM48EF120T025A0R increases overall
system efficiency and lowers operating costs compared to
conventional approaches.
• Less than 50ºC temperature rise at full load
in typical applications
Typical Applications
• High-End Computing Systems
• Automated Test Equipment
The VTM48EF120T025A0R enables the utilization of Factorized
Power Architecture™ which provides efficiency and size benefits
by lowering conversion and distribution losses and promoting
high‑density point-of-load conversion.
• High-Density Power Supplies
• Communications Systems
Typical Application
Part Numbering
Product Number
+IN
Enable
+OUT
VTM48Ex120y025A0R
PRM A
–IN
–OUT
+IN
Enable
+OUT
+PRI
+SEC
VTM
–PRI
Battery
–SEC
–OUT
VTM™ Current Multiplier
Page 1 of 20
Product Grade (y)
F = J-Lead
T = –40 to 125°C
T = Through hole
M = –55 to 125°C
For Storage and Operating Temperatures see General Characteristics Section
PRM B
–IN
Package Style (x)
Rev 1.3
06/2018
VTM48Ex120y025A0R
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
MPRI
Max
Unit
+PRI to –PRI
–1.0
60
VDC
PC to –PRI
–0.3
20
VDC
TM to –PRI
–0.3
7
VDC
VC to –PRI
–0.3
20
VDC
2250
VDC
16
VDC
+PRI / –PRI to +SEC / –SEC (hipot)
+SEC to –SEC
–1.0
Primary-Source Electrical Specifications
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C < TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Powertrain
Primary Voltage Range
VPRI Slew Rate
VPRI UV Turn Off
VPRI
No external VC applied
26
55
VC applied
0
55
dVPRI / dt
VPRI_UV
Module latched shutdown, No external VC applied,
ISEC = 25A
3
VPRI = 48V
No Load Power Dissipation
PNL
24
IINRP
DC Primary Current
IPRI_DC
Transfer Ratio
Secondary Voltage
Secondary Current (Average)
Secondary Current (Peak)
Secondary Power (Average)
Efficiency (Ambient)
K
VSEC
5.3
PSEC_AVG
ηAMB
Efficiency (Hot)
ηHOT
Efficiency (Over Load Range)
η20%
VTM™ Current Multiplier
Page 2 of 20
26
V
6.5
W
9
VC enable, VPRI = 48V, CSEC = 1000µF,
RLOAD = 471mΩ
10
K = VSEC / VPRI, ISEC = 0A
20
A
7
A
1/4
V/V
VSEC = VPRI • K – ISEC • RSEC
V
25
A
tPEAK < 10ms, ISEC_AVG ≤ 25A
37.5
A
ISEC_AVG ≤ 25A
300
W
ISEC_AVG
ISEC_PK
V / µs
17
VPRI = 26 – 55V, TC = 25ºC
Inrush Current Peak
1
15.0
VPRI = 26 – 55V
VPRI = 48V, TC = 25ºC
VDC
VPRI = 48V, ISEC = 25A
95.0
VPRI = 26 – 55V, ISEC = 25A
93.0
VPRI = 48V, ISEC = 12.5A
94.5
95.5
VPRI = 48V, TC = 100°C, ISEC = 25A
94.5
95.6
5A < ISEC < 25A
80.0
Rev 1.3
06/2018
96.0
%
%
%
VTM48Ex120y025A0R
Primary-Source Electrical Specifications (Cont.)
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C < TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Powertrain (Cont.)
Secondary Resistance (Cold)
RSEC_COLD
TC = –40°C, ISEC = 25A
4.9
7.5
12.0
mΩ
Secondary Resistance (Ambient)
RSEC_AMB
TC = 25°C, ISEC = 25A
6.3
9.0
14.0
mΩ
Secondary Resistance (Hot)
RSEC_HOT
TC = 100°C, ISEC = 25A
8.8
11.5
16.0
mΩ
1.85
1.95
2.05
MHz
3.70
Switching Frequency
FSW
3.90
4.10
MHz
VSEC_PP
CSEC = 0F, ISEC = 25A, VPRI = 48V, 20MHz BW
150
285
mV
Secondary Inductance (Parasitic)
LSEC_PAR
Frequency up to 30MHz, Simulated J-lead model
600
pH
Secondary Capacitance (Internal)
CSEC_INT
Effective Value at 12VSEC
47
µF
CSEC_EXT
VTM Standalone Operation. VPRI pre-applied, VC enable
Secondary Ripple Frequency
Secondary Voltage Ripple
Secondary Capacitance (External)
FSW_RP
1000
µF
60.0
V
Protection
Primary Overvoltage Lockout
VPRI_OVLO+
Module latched shutdown
Primary Overvoltage Lockout
Response Time Constant
tOVLO
Effective internal RC filter
55.1
Secondary Overcurrent Trip
IOCP_SEC
39
Secondary Short Circuit Protection
Trip Current
ISCP_SEC
39
Secondary Overcurrent Response
Time Constant
tOCP_SEC
Effective internal RC filter (Integrative)
Secondary Short Circuit Protection
Response Time
tSCP_SEC
From detection to cessation
of switching (Instantaneous)
Thermal Shutdown Set Point
VTM™ Current Multiplier
Page 3 of 20
TJ_OTP
125
Rev 1.3
06/2018
58.5
8
µs
47
A
A
5.3
ms
1
µs
130
135
°C
VTM48Ex120y025A0R
Secondary-Source Electrical Specifications
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C < TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Powertrain
Secondary Voltage Range
VSEC Slew Rate
VSEC UV Turn Off
VSEC
No external VC applied
VC applied
13.75
0
13.75
dVSEC / dt
VSEC_UV
Module latched shutdown, No external VC applied,
IPRI = 6.3A
PNL_SEC
6.0
3
VSEC = 12V
No Load Power Dissipation
6.5
DC Secondary Current
Primary Voltage
Primary Current (Average)
Primary Current (Peak)
Primary Power (Average)
INR_SEC_P
5.3
VC enable, VSEC = 12V, CPRI = 63µF,
RLOAD = 7mΩ
40
PPRI_AVG
Efficiency (Ambient)
ηAMB
Efficiency (Hot)
ηHOT
Efficiency (Over Load Range)
η20%
V
6.5
W
80
A
28.0
A
VPRI = VSEC / K – IPRI • RPRI
V
6.3
A
tPEAK < 10ms, IPRI_AVG ≤ 6.3A
9.4
A
IPRI_AVG ≤ 6.3A
300
W
IPRI_AVG
IPRI_PK
6.5
9.0
ISEC_DC
VPRI
V / µs
17.0
VSEC = 6.5 – 13.75V, TC = 25ºC
Inrush Current Peak
1
15.0
VSEC = 6.5 – 13.75V
VSEC = 12V, TC = 25ºC
VDC
VSEC = 12V, IPRI = 6.3A
95
VSEC = 6.5 – 13.75V, IPRI = 6.3A
93
96.0
%
VSEC = 12V, IPRI = 3.1A
94.5
95.5
VSEC = 12V, TC = 100°C, IPRI = 6.3A
94.5
95.6
1.3A < IPRI < 6.3A
80.0
%
%
Primary Resistance (Cold)
RPRI_COLD
TC = –40°C, IPRI = 6.3A
145
165
185
mΩ
Primary Resistance (Ambient)
RPRI_AMB
TC = 25°C, IPRI = 6.3A
165
195
225
mΩ
Primary Resistance (Hot)
RPRI_HOT
TC = 100°C, IPRI = 6.3A
200
238
275
mΩ
Primary Voltage Ripple
VPRI_PP
CPRI = 0F, IPRI = 6.3A, VSEC = 12V, 6.5MHz BW
650
mV
Primary Capacitance (External)
CPRI_EXT
VTM Standalone Operation.
VSEC pre-applied, VC enable
63
µF
15.0
V
Protection
Secondary Overvoltage Lockout
VSEC_OVLO+
Module latched shutdown
Secondary Overvoltage Lockout
Response Time Constant
tOVLO_SEC
Effective internal RC filter
14.5
8
Primary Overcurrent Trip
IOCP_PRI
7
Primary Short Circuit Protection
Trip Current
ISCP_PRI
7
Primary Overcurrent Response
Time Constant
tOCP_PRI
Effective internal RC filter (Integrative)
Primary Short Circuit Protection
Response Time
tSCP_PRI
From detection to cessation
of switching (Instantaneous)
VTM™ Current Multiplier
Page 4 of 20
Rev 1.3
06/2018
14.8
9
µs
14
A
A
5.3
ms
1
µs
VTM48Ex120y025A0R
Signal Characteristics
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
VTM Control: VC
• Referenced to –PRI
• Used to wake up powertrain circuit.
• A minimum of 11.5V must be applied indefinitely for VPRI < 26V to ensure normal operation.
• VC slew rate must be within range for a successful start.
• PRM™ VC can be used as valid wake-up signal source.
• Internal Resistance used in “Adaptive Loop” compensation.
• VC voltage may be continuously applied.
Signal Type
State
Attribute
External VC Voltage
VC Current Draw
Symbol
VVC_EXT
IVC
Steady
ANALOG
Start Up
Typ
11.5
VC = 11.5V, VPRI = 0V
130
VC = 11.5V, VPRI > 26V
25
VC = 16.5V, VPRI > 26V
115
Fault mode. VC > 11.5V
60
Max
Unit
16.5
V
150
mA
VC Internal Diode Rating
DVC_INT
100
V
RVC-INT
0.511
kΩ
TVC_COEFF
3900 ppm/°C
VC Start-Up Pulse
VVC_SP
tPEAK < 18ms
VC Slew Rate
dVC/dt
Required for proper start up
VC Inrush Current
IINR_VC
VC = 16.5V, dVC/dt = 0.25V/μs
VC to VSEC Turn-On Delay
Transitional
Required for start up and operation
below 26V.
Min
VC Internal Resistor
VC Internal Resistor
Temperature Coefficient
INPUT
Conditions / Notes
0.02
VPRI pre-applied, PC floating,
VC enable, CPC = 0μF
tON
VC to PC Delay
tVC_PC
VC = 11.5V to PC high, VPRI = 0V,
dVC/dt = 0.25V/μs
75
Internal VC Capacitance
CVC_INT
VC = 0V
3.2
20
V
0.25
V / µs
1
A
500
µs
125
µs
µF
Primary Control: PC
• Referenced to –PRI
• The PC pin enables and disables the VTM. When held below 2V, the VTM will be disabled.
• PC pin outputs 5V during normal operation. PC pin is equal to 2.5V during fault mode given VPRI > 26V or VC > 11.5V.
• After successful start up and under no-fault condition, PC can be used as a 5V regulated voltage source with a 2mA maximum current.
• Module will shutdown when pulled low with an impedance less than 400Ω.
• In an array of VTMs, connect PC pin to synchronize start up.
• PC pin cannot sink current and will not disable other modules during fault mode.
Signal Type
State
Attribute
PC Voltage
Symbol
VPC
PC Source Current
IPC_OP
ANALOG
PC Resistance (Internal)
RPC_INT
OUTPUT
PC Source Current
Steady
Start Up
Enable
DIGITAL
INPUT /
OUTPUT
Disable
Transitional
VTM™ Current Multiplier
Page 5 of 20
PC Capacitance (Internal)
Conditions / Notes
Internal pull-down resistor
IPC_EN
Min
Typ
Max
Unit
4.7
5.0
5.3
V
2
mA
400
kΩ
300
µA
1000
pF
50
150
50
100
CPC_INT
PC Resistance (External)
RPC_S
60
PC Voltage
VPC_EN
2
PC Voltage (Disable)
VPC_DIS
PC Pull-Down Current
IPC_PD
PC Disable Time
PC Fault-Response Time
2.5
3
2
5.1
tPC_DIS_T
tFR_PC
kΩ
From fault to PC = 2V
Rev 1.3
06/2018
V
V
mA
5
µs
100
µs
VTM48Ex120y025A0R
Signal Characteristics (Cont.)
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
Temperature Monitor: TM
• Referenced to –PRI
• The TM pin monitors the internal temperature of the VTM controller IC within an accuracy of ±5°C.
• Can be used as a “Power Good” flag to verify that the VTM is operating.
• The TM pin has a room-temperature set point of 3V and approximate gain of 10mV/°C.
• Output drives Temperature Shutdown comparator.
Signal Type
State
Attribute
TM Voltage
ANALOG
OUTPUT
DIGITAL
OUTPUT
(FAULT FLAG)
Steady
Disable
Transitional
VTM™ Current Multiplier
Page 6 of 20
Symbol
VTM_AMB
TM Source Current
ITM
TM Gain
ATM
VTM_PP
TM Voltage
VTM_DIS
TM Resistance (Internal)
RTM_INT
TM Capacitance (External)
CTM_EXT
tFR_TM
TJ controller = 27°C
Min
Typ
Max
Unit
2.95
3.00
3.05
V
100
µA
10
TM Voltage Ripple
TM Fault-Response Time
Conditions / Notes
CTM = 0F, VPRI = 48V, ISEC = 25A
120
mV/°C
200
0
Internal pull-down resistor
From fault to TM = 1.5V
Rev 1.3
06/2018
25
40
10
mV
V
50
kΩ
50
pF
µs
VTM48Ex120y025A0R
Timing Diagram
Power sourced from the primary side.
ISEC
7
6
ISEC
ISEC
1
2 3
VC
4
8
d
5
b
VVC-EXT
a
VPRI
VOVLO
NL
≥ 26V
c
e
f
VSEC
TM
VTM-AMB
PC
g
5V
3V
a: VC slew rate (dVC/dt)
b: Minimum VC pulse rate
c: tOVLO_PIN
d: tOCP_SEC
e: Secondary turn on delay (tON)
f: PC disable time (tPC_DIS_t)
g: VC to PC delay (tVC_PC)
VTM™ Current Multiplier
Page 7 of 20
1. Initiated VC pulse
2. Controller start
3. VPRI ramp up
4. VPRI = VOVLO
5. VPRI ramp down no VC pulse
6. Overcurrent, Secondary
7. Start up on short circuit
8. PC driven low
Rev 1.3
06/2018
Notes:
– Timing and voltage is not to scale
– Error pulse width is load dependent
VTM48Ex120y025A0R
Application Characteristics
The following values, typical of an application environment, are collected at TC = 25ºC with power sourced from the primary side unless otherwise noted.
See associated figures for general trend data.
Attribute
Symbol
Conditions / Notes
Typ
Unit
Powertrain
No-Load Power Dissipation
PNL
VPRI = 48V, PC enabled
5.1
W
Efficiency (Ambient)
ηAMB
VPRI = 48V, ISEC = 25A
96.1
%
Efficiency (Hot)
ηHOT
VPRI = 48V, ISEC = 25A, TC = 100ºC
95.6
%
Secondary Resistance (Cold)
RSEC_COLD
VPRI = 48V, ISEC = 25A, TC = –40ºC
7.3
mΩ
Secondary Resistance (Ambient)
RSEC_AMB
VPRI = 48V, ISEC = 25A
9.3
mΩ
Secondary Resistance (Hot)
RSEC_HOT
VPRI = 48V, ISEC = 25A, TC = 100ºC
11.6
mΩ
Secondary Voltage Ripple
VSEC_PP
CSEC = 0F, ISEC = 25A, VPRI = 48V, 20MHz BW
198
mV
VSEC Transient (Positive)
VSEC_TRAN+
ISEC_STEP = 0 – 25A, VPRI = 48V, ISLEW = 17A/µs
650
mV
VSEC Transient (Negative)
VSEC_TRAN–
ISEC_STEP = 25 – 0A, VPRI = 48V, ISLEW = 212A/µs
310
mV
100
Full Load Efficiency (%)
Power Dissipation (W)
11
9
7
5
3
1
26
29
32
35
38
41
43
46
49
52
99
98
97
96
95
94
93
92
91
90
–40
55
–20
0
TCASE:
–40°C
25°C
40
26V
VPRI:
100°C
Figure 1 — No load power dissipation vs. VPRI
60
80
100
48V
55V
Figure 2 — Full load efficiency vs. temperature
50
96
45
Power Dissipation (W)
100
92
Efficiency (%)
20
Case Temperature (ºC)
Input Voltage (V)
88
84
80
76
72
68
64
40
35
30
25
20
15
10
5
0
60
0
2.5
5
7.5
10
12.5
15
17.5
20
22.5
0
25
2.5
5
VPRI:
26V
Figure 3 — Efficiency at –40°C
VTM™ Current Multiplier
Page 8 of 20
48V
7.5
10
12.5
15
17.5
20
Secondary Load Current (A)
Secondary Load Current (A)
55V
VPRI:
26V
Figure 4 — Power dissipation at –40°C
Rev 1.3
06/2018
48V
55V
22.5
25
VTM48Ex120y025A0R
Application Characteristics (Cont.)
The following values, typical of an application environment, are collected at TC = 25ºC with power sourced from the primary side unless otherwise noted.
See associated figures for general trend data.
28
Power Dissipation (W)
32
96
Efficiency (%)
100
92
88
84
80
76
72
68
24
20
16
12
8
4
0
0
2.5
5
7.5
10
12.5
15
17.5
22.5
20
25
0
2.5
5
Secondary Load Current (A)
26V
VPRI:
48V
55V
12.5
15
17.5
20
22.5
25
48V
22.5
25
55V
Figure 6 — Power dissipation at 25°C
32
96
28
Power Dissipation (W)
100
Efficiency (%)
10
26V
VPRI:
Figure 5 — Efficiency at 25°C
92
88
84
80
76
72
68
24
20
16
12
8
4
0
0
2.5
5
7.5
10
12.5
15
17.5
22.5
20
25
0
2.5
5
Secondary Load Current (A)
26V
VPRI:
48V
55V
10
12.5
26V
VPRI:
15
17.5
20
48V
55V
Figure 8 — Power dissipation at 100°C
250
14
225
VRIPPLE (mVPK-PK)
12
10
8
6
4
–40
7.5
Secondary Load Current (A)
Figure 7 — Efficiency at 100°C
RSEC (mΩ)
7.5
Secondary Load Current (A)
200
175
150
125
100
75
50
–20
0
40
20
60
80
100
0
2.5
5
Case Temperature (ºC)
ISEC:
Figure 9 — RSEC vs. temperature
VTM™ Current Multiplier
Page 9 of 20
12.5A
7.5
10
12.5
15
17.5
20
22.5
Secondary Load Current (A)
25A
VPRI:
26V
48V
55V
Figure 10 — Vripple vs. ISEC; No external CSEC. Board mounted
module, scope setting: 20MHz analog BW
Rev 1.3
06/2018
25
VTM48Ex120y025A0R
Application Characteristics (Cont.)
The following values, typical of an application environment, are collected at TC = 25ºC with power sourced from the primary side unless otherwise noted.
See associated figures for general trend data.
Secondary Current (A)
45
40
35
10ms max
30
25
20
Continuous
15
10
5
0
0
2
4
6
8
10
12
14
16
Secondary Voltage (V)
Figure 11 — Safe operating area
Figure 12 — Full load ripple, 100µF CPRI; No external CSEC. Boardmounted module, scope setting: 20MHz analog BW
Figure 13 — Start up from application of VPRI;
VC pre-applied CSEC = 1000µF
Figure 14 — Start up from application of VC;
VPRI pre-applied CSEC = 1000µF
Figure 15 — 0A – Full load transient response:
CPRI = 100µF, no external CSEC
Figure 16 — Full load – 0A transient response:
CPRI = 100µF, no external CSEC
VTM™ Current Multiplier
Rev 1.3
Page 10 of 20 06/2018
VTM48Ex120y025A0R
General Characteristics
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40ºC < TJ < 125 ºC (T-Grade). All Other specifications are at TJ = 25°C unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical
Length
L
32.25 [1.270]
32.5 [1.280]
32.75 [1.289]
mm [in]
Width
W
21.75 [0.856]
22.0 [0.866]
22.25 [0.876]
mm [in]
6.48 [0.255]
6.73 [0.265]
6.98 [0.275]
Height
H
Volume
Vol
Weight
W
Lead Finish
No heat sink
15.0 [0.53]
g [oz]
Nickel
0.51
2.03
Palladium
0.02
0.15
0.003
0.051
VTM48EF120T025A0R (T-Grade)
–40
125
VTM48EF120M025A0R (M-Grade)
–55
125
VTM48ET120T025A0R (T-Grade)
–40
125
VTM48ET120M025A0R (M-Grade)
–55
125
Gold
mm [in]
cm3 [in3]
4.81 [0.294]
µm
Thermal
Operating Temperature
Thermal Resistance
TJ
θJC
Isothermal heat sink and isothermal
internal PCB
Thermal Capacity
°C
1
°C / W
5
Ws / °C
Assembly
Peak Compressive Force
Applied to Case (Z-Axis)
Storage Temperature
Supported by J-Lead only
TST
lbs
lbs / in2
VTM48EF120T025A0R (T-Grade)
–40
125
VTM48EF120M025A0R (M-Grade)
–65
125
VTM48ET120T025A0R (T-Grade)
–40
125
VTM48ET120M025A0R (M-Grade)
–65
125
ESDHBM
Human Body Model,
JEDEC JESD 22-A114-F
1000
ESDCDM
Charge Device Model,
JEDEC JESD 22-C101-D
400
ESD Withstand
6
5.41
°C
VDC
Soldering
Peak Temperature During Reflow
MSL 4 (Datecode 1528 and later)
245
°C
Peak Time Above 217°C
60
90
s
Peak Heating Rate During Reflow
1.5
3
°C / s
1.5
6
°C / s
3200
3800
Peak Cooling Rate Post Reflow
Safety
Isolation Voltage (Hipot)
CPRI_SEC
Isolation Resistance
RPRI_SEC
MTBF
2250
VHIPOT
Isolation Capacitance
Unpowered unit
2500
VDC
10
MIL-HDBK-217 Plus Parts Count;
25ºC Ground Benign, Stationary,
Indoors / Computer Profile
6.03
MHrs
Telcordia Issue 2 - Method I Case 1;
Ground Benign, Controlled
7.94
MHrs
cTÜVus EN 60950-1
Agency Approvals / Standards
pF
MΩ
cURus UL 60950-1
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
VTM™ Current Multiplier
Rev 1.3
Page 11 of 20 06/2018
VTM48Ex120y025A0R
Using the Control Signals VC, PC, TM
Start-Up Behavior
The VTM Control (VC) pin is a primary-referenced pin which
powers the internal VCC circuitry when within the specified voltage
range of 11.5 – 16.5V. This voltage is required for VTM current
multiplier start up and must be applied as long as the primary is
below 26V. In order to ensure a proper start, the slew rate of the
applied voltage must be within the specified range.
Depending on the sequencing of the VC with respect to the same
voltage, whether the source is on the primary or secondary, the
behavior during start up will vary as follows:
Some additional notes on the using the VC pin:
nn
In most applications, the VTM module primary side will be
powered by an upstream PRM™ regulator which provides a
10ms VC pulse during start up. In these applications the VC pins
of the PRM regulator and VTM current multiplier should be
tied together.
nn
In bidirectional applications, the primary of the VTM may also be
providing power to a PRM input. In these applications, a proper
VC voltage within the specified range must be applied any time
the primary voltage of the VTM is below 26V.
nn
The VC voltage can be applied indefinitely allowing for
continuous operation down to 0VPRI.
nn
The fault response of the VTM module is latching. A
positive edge on VC is required in order to restart the unit. If VC
is continuously applied the PC pin may be toggled to restart the
VTM module.
Primary Control (PC) is a primary-referenced pin that can be used
to accomplish the following functions:
nn
Delayed start: Upon the application of VC, the PC pin will
source a constant 100µA current to the internal RC network.
Adding an external capacitor will allow further delay in reaching
the 2.5V threshold for module start.
nn
Auxiliary voltage source: Once enabled in regular operational
conditions (no fault), each VTM PC provides a regulated 5V,
2mA voltage source.
nn
Disable: PC pin can be actively pulled down in order
to disable the module. Pull-down impedance shall be lower
than 400Ω.
nn
Fault detection flag: The PC 5V voltage source is internally
turned off as soon as a fault is detected. It is important to notice
that PC doesn’t have current sink capability. Therefore, in an
array, PC line will not be capable of disabling neighboring
modules if a fault is detected.
nn
Normal operation (VC applied prior to the source voltage):
In this case the controller is active prior to the source ramping.
When the source voltage is applied, the VTM module load
voltage will track the source (See Figure 13). The inrush current
is determined by the source voltage rate of rise and load
capacitance. If the VC voltage is removed prior to the primary
voltage reaching 26V, the VTM may shut down.
nn
Stand-alone operation (VC applied after VPRI): In this case
the VTM secondary will begin to rise upon the application of
the VC voltage (See Figure 14). The Adaptive Soft-Start Circuit
may vary the secondary voltage rate of rise in order to limit the
inrush current to its maximum level. When starting into high
capacitance or a short, the secondary current will be limited for
a maximum of 1200µs. After this period, the Adaptive Soft-Start
Circuit will time out and the VTM module may shut down. No
restart will be attempted until VC is re‑applied or PC is toggled.
The maximum secondary capacitance is limited to 1000µF in this
mode of operation to ensure a successful start.
Thermal Considerations
VI Chip® products are multi-chip modules whose temperature
distribution varies greatly for each part number as well as with
the line/load conditions, thermal management and environmental
conditions. Maintaining the top of the VTM48EF120T025A0R case
to less than 100ºC will keep all junctions within the VI Chip module
below 125ºC for most applications.
The percent of total heat dissipated through the top surface
versus through the J-lead is entirely dependent on the particular
mechanical and thermal environment. The heat dissipated through
the top surface is typically 60%. The heat dissipated through
the J-lead onto the PCB board surface is typically 40%. Use
100% top surface dissipation when designing for a conservative
cooling solution.
It is not recommended to use a VI Chip module for an extended
period of time at full load without proper heat sinking.
nn
Fault reset: PC may be toggled to restart the unit if VC is
continuously applied.
Temperature Monitor (TM) is a primary-referenced pin that
provides a voltage proportional to the absolute temperature of the
converter control IC.
It can be used to accomplish the following functions:
nn
Monitor the control IC temperature: The temperature in
Kelvin is equal to the voltage on the TM pin scaled by 100.
(i.e., 3.0V = 300K = 27ºC). If a heat sink is applied, TM can be
used to thermally protect the system.
nn
Fault detection flag: The TM voltage source is internally turned
off as soon as a fault is detected. For system monitoring
purposes (microcontroller interface) faults are detected on falling
edges of TM signal.
VTM™ Current Multiplier
Rev 1.3
Page 12 of 20 06/2018
VTM48Ex120y025A0R
Sine Amplitude Converter Point-of-Load Conversion
The Sine Amplitude Converter (SAC) uses a high-frequency
resonant tank to move energy from primary to secondary. (The
resonant tank is formed by Cr and leakage inductance Lr in the
power transformer windings.) The resonant LC tank, operated
at high frequency, is amplitude modulated as a function of
primary voltage and secondary current. A small amount of
capacitance embedded in the primary and secondary stages
of the module is sufficient for full functionality and is key to
achieving power density.
The VTM48EF120T025A0R SAC can be simplified into the
following model:
973pH
+
RCCPRI
IN
0.57mΩ
VVPRI
IN
CPRI
C2µF
IN
RSEC
ROUT
9.0mΩ
ISEC
IOUT
LPRI = 5.7nH
IQIQ
109mA
1/4 • ISEC
+
–
K
+
R
RCC
OUT
SEC
3.13Ω
V•I
+
LSEC = 600pH
430µΩ
1/4 • VPRI
CSEC
COUT
47µF
SEC
VVOUT
–
–
–
Figure 17 — VI Chip® module AC model
At no load:
VSEC = VPRI • K
(1)
K represents the “turns ratio” of the SAC.
Rearranging Equation 1:
K=
VSEC
The use of DC voltage transformation provides additional
interesting attributes. Assuming that RSEC = 0Ω and IQ = 0A,
Equation 3 now becomes Equation 1 and is essentially load
independent, resistor R is now placed in series with VPRI as
shown in Figure 18.
(2)
VPRI
R
In the presence of load, VSEC is represented by:
VSEC = VPRI • K – ISEC • RSEC
VPRI
ISEC =
K
SAC™
K = 1/32
VSEC
(3)
and ISEC is represented by:
IPRI – IQ
+
–
(4)
RSEC represents the impedance of the SAC, and is a function of
the RDSON of the primary and secondary MOSFETs and the winding
resistance of the power transformer. IQ represents the quiescent
current of the SAC control and gate drive circuitry. For applications
where the source is located on the secndary side, Equations 1 – 4
can be rearranged to represent VPRI and IPRI as a function
of VSEC and ISEC.
Figure 18 — K = 1/32 Sine Amplitude Converter™
with series primary resistor
The relationship between VPRI and VSEC becomes:
VSEC = (VPRI – IPRI • R) • K
(5)
Substituting the simplified version of Equation 4
(IQ is assumed = 0A) into Equation 5 yields:
VTM™ Current Multiplier
Rev 1.3
Page 13 of 20 06/2018
VSEC = VPRI • K – ISEC • R • K2
(6)
VTM48Ex120y025A0R
This is similar in form to Equation 3, where RSEC is used to represent
the characteristic impedance of the SAC™. However, in this case
a real R on the primary side of the SAC is effectively scaled by K 2
with respect to the secondary.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 0.98mΩ, with K = 1/32 as shown in Figure 18.
A similar exercise should be performed with the additon of
a capacitor or shunt impedance at the primary to the SAC.
A switch in series with VPRI is added to the circuit. This is
depicted in Figure 19.
S
VPRI
+
–
C
SAC™
K = 1/32
VSEC
Low impedance is a key requirement for powering a high‑current,
low‑voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a SAC
between the regulation stage and the point-of-load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, the benefits are
not useful if the series impedance of the SAC is too high. The
impedance of the SAC must be low, i.e., well beyond the crossover
frequency of the system.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low-loss core
material at high frequencies also reduces core losses.
The two main terms of power loss in the VTM module are:
nn
No load power dissipation (PNL): defined as the power used to
power up the module with an enabled powertrain at no load.
nn
Resistive loss (RSEC): refers to the power loss across the VTM
modeled as pure resistive impedance.
Figure 19 — Sine Amplitude Converter™ with input capacitor
PDISSIPATED = PNL + PR
A change in VPRI with the switch closed would result in a change in
capacitor current according to the following equation:
IC (t) = C
dVPRI
(7)
dt
Therefore,
PSEC = PPRI – PDISSIPATED = PPRI – PNL – PR
SEC
Assume that with the capacitor charged to VPRI, the switch is
opened and the capacitor is discharged through the idealized
SAC. In this case,
IC = ISEC • K
C
(8)
K2
•
dVSEC
dt
(11)
The above relations can be combined to calculate the overall
module efficiency:
η=
Substituting Equations 1 and 8 into Equation 7 reveals:
ISEC =
(10)
SEC
(9)
The equation in terms of the secondary has yielded a K 2 scaling
factor for C, specified in the denominator of the equation.
A K factor less than unity results in an effectively larger
capacitance on the secondary when expressed in terms of the
primary. With a K = 1/32 as shown in Figure 19, C = 1µF would
appear as C = 1024µF when viewed from the secondary. Note that
in situations where the source voltage is located on the secondary
side, the effect is reversed and effective valve of capacitance
located on the secondary side is divided by a factor of 1/K 2 when
reflected to the primary.
VTM™ Current Multiplier
Rev 1.3
Page 14 of 20 06/2018
=
PSEC
PPRI
=
PPRI – PNL – PR
PPRI
SEC
VPRI • IPRI – PNL – (ISEC)2 • RSEC
=1–
VPRI • IPRI
(
)
PNL + (ISEC)2 • RSEC
VPRI • IPRI
(12)
VTM48Ex120y025A0R
Primary and Secondary Filter Design
A major advantage of a SAC system versus a conventional PWM
converter is that the former does not require large functional
filters. The resonant LC tank, operated at extreme high frequency,
is amplitude modulated as a function of primary voltage and
secondary current and efficiently transfers charge through the
isolation transformer. A small amount of capacitance embedded in
the primary and secondary stages of the module is sufficient for full
functionality and is key to achieving high power density.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
nn
Guarantee low source impedance:
To take full advantage of the VTM module dynamic response,
the impedance presented to its input terminals must be low
from DC to approximately 5MHz. Primary capacitance may be
added to improve transient performance or compensate for high
source impedance.
nn
Further reduce primary and/or secondary voltage ripple
without sacrificing dynamic response:
Given the wide bandwidth of the VTM module, the source
response is generally the limiting factor in the overall system
response. Anomalies in the response of the source will appear at
the secondary of the VTM module multiplied by its K factor.
nn
Protect the module from overvoltage transients
imposed by the system that would exceed maximum
ratings and cause failures:
The VI Chip® module primary/secondary voltage ranges must
not be exceeded. An internal overvoltage lockout function
prevents operation outside of the normal operating primary or
secondary range. Even during this condition, the powertrain
is exposed to the applied voltage and power MOSFETs
must withstand it.
Capacitive Filtering Considerations
for a Sine Amplitude Converter™
It is important to consider the impact of adding capacitance to
a Sine Amplitude Converter on the system as a whole. Both the
capacitance value and the effective impedance of the capacitor
must be considered.
A Sine Amplitude Converter has a DC RSEC value which has
already been discussed on Page 13. The AC RSEC of the SAC
contains several terms:
nn
Resonant tank impedance
nn
Primary lead inductance and internal capacitance
nn
Secondary lead inductance and internal capacitance
The values of these terms are shown in the behavioral model on
Page 13. It is important to note on which side of the transformer
these impedances appear and how they reflect across the
transformer given the K factor.
The overall AC impedance varies from model to model. For most
models it is dominated by DC RSEC value from DC to beyond
500kHz. The behavioral model on Page 13 should be used to
approximate the AC impedance of the specific model.
Any capacitors placed at the output of the VTM module reflect
back to the primary of the module by the square of the K factor
(Equation 9) with the impedance of the module appearing in series.
It is very important to keep this in mind when using a PRM™
regulator to power the VTM module. Most PRM modules have a
limit on the maximum amount of capacitance that can be applied
to the secondary. This capacitance includes both the PRM output
capacitance and the VTM module secondary capacitance reflected
back to the primary. In PRM module remote-sense applications,
it is important to consider the reflected value of VTM module
secondary capacitance when designing and compensating the PRM
module control loop.
Capacitance placed at the primary of the VTM module appear to
the load reflected by the K factor with the impedance of the VTM
module in series. In step-down ratios, the effective capacitance
is increased by the K factor. The effective ESR of the capacitor is
decreased by the square of the K factor, but the impedance of the
module appears in series. Still, in most step-down VTM modules
an electrolytic capacitor placed at the primary of the module will
have a lower effective impedance compared to an electrolytic
capacitor placed at the secondary. This is important to consider
when placing capacitors at the secondary of the module. Even
though the capacitor may be placed at the secondary, the majority
of the AC current will be sourced from the lower impedance, which
in most cases will be the module. This should be studied carefully in
any system design using a module. In most cases, it should be clear
that electrolytic secondary capacitors are not necessary to design a
stable, well‑bypassed system.
VTM™ Current Multiplier
Rev 1.3
Page 15 of 20 06/2018
VTM48Ex120y025A0R
Current Sharing
Bidirectional Operation
The SAC™ topology bases its performance on efficient transfer
of energy through a transformer without the need of closed‑loop
control. For this reason, the transfer characteristic can be
approximated by an ideal transformer with some resistive drop and
positive temperature coefficient.
The VTM48EF120T025A0R is capable of bidirectional operation. If
a voltage is present at the secondary which satisfies the condition
VSEC > VPRI • K at the time the VC voltage is applied, or after the
unit has started, then energy will be transferred from secondary
to primary. The primary-to-secondary ratio will be maintained. The
VTM48EF120T025A0R will continue to operate bidirectional as
long as the primary and secondary are within the specified limits.
This type of characteristic is close to the impedance characteristic
of a DC power distribution system, both in behavior (AC dynamic)
and absolute value (DC dynamic).
When connected in an array with the same K factor, the VTM
module will inherently share the load current (typically 5%) with
parallel units according to the equivalent impedance divider that
the system implements from the power source to the point-of-load.
Some general recommendations to achieve matched
array impedances:
nn
Dedicate common copper planes within the PCB to deliver and
return the current to the modules.
nn
Provide the PCB layout as symmetric as possible.
nn
Apply same filtering to each unit.
For further details see:
AN:016 Using BCM® Bus Converters in High Power Arrays.
VPRI
ZPRI_EQ1
–
ZSEC_EQ1
RS_1
ZPRI_EQ2
+
VTM 1
VTM 2
VSEC
ZSEC_EQ2
RS_2
DC
Load
ZPRI_EQn
VTM n
ZSEC_EQn
RS_n
Figure 20 — VTM module array
Fuse Selection
In order to provide flexibility in configuring power systems
VI Chip® products are not internally fused. Line fusing of VI Chip
products is recommended at system level to provide thermal
protection in case of catastrophic failure.
The fuse shall be selected by closely matching system
requirements with the following characteristics:
nn
Direction of power flow: if a power source is located on the
primary, there must be a fuse located in the series with the
primary source; if a source is located on the secondary, there
must also be a fuse located in series with the secondary source.
nn
Current rating
(usually greater than maximum current of VTM module)
nn
Maximum voltage rating
(usually greater than the maximum possible primary voltage)
nn
Ambient temperature
nn
Nominal melting I2t
VTM™ Current Multiplier
Rev 1.3
Page 16 of 20 06/2018
VTM48Ex120y025A0R
J-Lead Package Mechanical Drawing
mm [inch]
NOTES:
NOTES:
mm
2. DIMENSIONS ARE mm
inch .
2. DIMENSIONS
ARE
.
inch
UNLESS OTHERWISE SPECIFIED,
TOLERANCES ARE:
SPECIFIED,
TOLERANCES
ARE:
3.UNLESS
.X / [.XX]OTHERWISE
= +/-0.25 / [.01];
.XX / [.XXX]
= +/-0.13 / [.005]
3.4..XPRODUCT
/ [.XX] = +/-0.25
/ [.01];ON
.XXTOP
/ [.XXX]
= +/-0.13 / [.005]
MARKING
SURFACE
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
DXF and PDF files are available on vicorpower.com
J-Lead Package Recommended Land Pattern
+PRI
+PRI
+SEC1
+SEC1
-SEC1
-SEC1
+SEC2
+SEC2
-PRI
-PRI
mm
2. DIMENSIONS ARE mm
inch .
2. DIMENSIONS
ARE inchSPECIFIED,
.
UNLESS OTHERWISE
TOLERANCES ARE:
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
-SEC2
-SEC2
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3.4..XPRODUCT
/ [.XX] = +/-0.25
/ [.01];ON
.XXTOP
/ [.XXX]
= +/-0.13 / [.005]
MARKING
SURFACE
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
DXF and PDF files are available on vicorpower.com
VTM™ Current Multiplier
Rev 1.3
Page 17 of 20 06/2018
VTM48Ex120y025A0R
Through-Hole Package Mechanical Drawing
mm [inch]
NOTES:
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
NOTES:
3.
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
mm
DXF and PDF files are available
on vicorpower.com
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
Through-Hole Package Recommended Land Pattern
+PRI
+SEC1
-SEC1
+PRI
+SEC1
+SEC2
-PRI
-SEC1
-SEC2
+SEC2
-PRI
-SEC2
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
VTM™ Current Multiplier
Rev 1.3
Page 18 of 20 06/2018
VTM48Ex120y025A0R
Recommended Heat Sink Push Pin Location
(NO GROUNDING CLIPS)
(WITH GROUNDING CLIPS)
Notes:
1. Maintain 3.50 (0.138) Dia. keep-out zone
free of copper, all PCB layers.
2. (A) Minimum recommended pitch is 39.50 (1.555).
This provides 7.00 (0.275) component
edge-to-edge spacing, and 0.50 (0.020)
clearance between Vicor heat sinks.
(B) Minimum recommended pitch is 41.00 (1.614).
This provides 8.50 (0.334) component
edge-to-edge spacing, and 2.00 (0.079)
clearance between Vicor heat sinks.
3. VI Chip® module land pattern shown for reference
only; actual land pattern may differ.
Dimensions from edges of land pattern
to push–pin holes will be the same for
all full-size VI Chip® products.
5. Unless otherwise specified:
Dimensions are mm (inches)
tolerances are:
x.x (x.xx) = ±0.3 (0.01)
x.xx (x.xxx) = ±0.13 (0.005)
4. RoHS compliant per CST–0001 latest revision.
6. Plated through holes for grounding clips (33855)
shown for reference, heat sink orientation and
device pitch will dictate final grounding solution.
VTM Module Pin Configuration
4
3
2
+SEC
B
B
C
C
D
D
F
G
H
H
J
J
+SEC
–SEC
Signal Name
Pin Number
+PRI
A1 – E1, A2 – E2
–PRI
L1 – T1, L2 – T2
TM
H1, H2
VC
J1, J2
PC
K1, K2
+SEC
A3 – D3, A4 – D4, J3 – M3, J4 – M4
–SEC
E3 – H3, E4 – H4, N3 – T3, N4 – T4
+PRI
E
E
–SEC
1
A
A
K
K
L
L
M
M
N
N
P
P
R
R
TM
VC
PC
–PRI
T
T
Bottom View
VTM™ Current Multiplier
Rev 1.3
Page 19 of 20 06/2018
VTM48Ex120y025A0R
Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and
accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor
makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves
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Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Visit http://www.vicorpower.com/dc-dc-converters-board-mount/vtm for the latest product information.
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All sales are subject to Vicor’s Standard Terms and Conditions of Sale, and Product Warranty which are available on Vicor’s webpage
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VTM™ Current Multiplier
Rev 1.3
Page 20 of 20 06/2018
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