VTM48EH020X040A00

VTM48EH020 x 040A00 (Formerly VIV0103THJ) VTM Current Multiplier TM S ® C US C NRTL US FEATURES • 48 Vdc to 2 Vdc 40 A current multiplier - Operating from standard 48 V or 24 V PRM™ regulators • High efficiency (>91%) reduces system power consumption • High density (267 A/in3) • “Half Chip” V• I Chip package enables surface mount, low impedance interconnect to system board • Contains built-in protection features against: Overvoltage Overcurrent Short Circuit Overtemperature Reverse Inrush • Provides enable / disable control, internal temperature monitoring, current monitoring • ZVS / ZCS resonant Sine Amplitude Converter topology • Less than 50ºC temperature rise at full load in typical applications TYPICAL APPLICATIONS DESCRIPTION The V• I Chip™ current multiplier is a high efficiency (>91%) Sine Amplitude Converter™ (SAC™) operating from a 26 to 55 Vdc primary bus to deliver an isolated output. The Sine Amplitude Converter offers a low AC impedance beyond the bandwidth of most downstream regulators, which means that capacitance normally at the load can be located at the input to the Sine Amplitude Converter. Since the K factor of the VTM48EH020T040A00 is 1/24, that capacitance value can be reduced by a factor of 576, resulting in savings of board area, materials and total system cost. The VTM48EH020T040A00 is provided in a V• I Chip package compatible with standard pick-and-place and surface mount assembly processes. The co-molded V•I Chip package provides enhanced thermal management due to large thermal interface area and superior thermal conductivity. With high conversion efficiency the VTM48EH020T040A00 increases overall system efficiency and lowers operating costs compared to conventional approaches. The VTM48EH020T040A00 enables the utilization of Factorized Power ArchitectureTM providing efficiency and size benefits by lowering conversion and distribution losses and promoting high density point of load conversion. VIN = 26 to 55 V VOUT = 1.1 to 2.3 V (NO LOAD) IOUT = 40 A (NOM) K= 1/24 • High End Computing Systems • Automated Test Equipment • High Density Power Supplies • Communications Systems •0 PART NUMBERING PART NUMBER PRODUCT GRADE VTM48EH020 x 040A00 T = -40° to 125°C M = -55° to 125°C For Storage and Operating Temperatures see Section 6.0 General Characteristics Regulator PR PC TM IL VC SG OS CD Current Multiplier PC VC IM TM PRM™ +Out VTM™ +In +Out +In VIN -In -Out -In -Out L O A D (See Application Note AN:024) Factorized Power Architecture™ V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 1 of 16 VTM48EH020 x 040A00 1.0 ABSOLUTE MAXIMUM VOLTAGE RATINGS The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device. MIN MAX UNIT MIN MAX UNIT + IN to - IN . . . . . . . . . . . . . . . . . . . . . . . PC to - IN . . . . . . . . . . . . . . . . . . . . . . . . TM to -IN . . . . . . . . . . . . . . . . . . . . . . . . VC to - IN . . . . . . . . . . . . . . . . . . . . . . . . -1.0 -0.3 -0.3 -0.3 60 20 7 20 VDC VDC VDC VDC IM to - IN................................................. + IN / - IN to + OUT / - OUT (hipot) ........ + IN / - IN to + OUT / - OUT (working)... + OUT to - OUT....................................... -1.0 0 3.15 2250 60 4 VDC VDC VDC VDC 2.0 ELECTRICAL CHARACTERISTICS Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25ºC unless otherwise noted. ATTRIBUTE Input Voltage Range VIN Slew Rate VIN UV Turn Off SYMBOL VIN dVIN /dt VIN_UV Module latched shutdown, No external VC applied, IOUT = 40A VIN = 45 V VIN = 26 V to 55 V VIN = 45 V, TC = 25ºC VIN = 26 V to 55 V, TC = 25ºC VC enable, VIN = 45 V COUT = 1500 µF, RLOAD = 47 mΩ K = VOUT / VIN, IOUT = 0 A VOUT = VIN • K - IOUT • ROUT, Section 11 TPEAK < 10 ms, IOUT_AVG ≤ 40 A IOUT_AVG ≤ 40 A VIN = 45 V, IOUT = 40 A VIN = 26 V to 55 V, IOUT = 40 A VIN = 45 V, IOUT = 20 A VIN = 45 V, TC = 100°C, IOUT = 40 A 8 A < IOUT < 40 A TC = -40°C, IOUT = 40 A TC = 25°C, IOUT = 40 A TC = 100°C, IOUT = 40 A 13.3 1.4 2.4 CONDITIONS / NOTES No external VC applied VC applied MIN 26 0 TYP MAX 55 55 1 26.0 3.9 4.8 3.0 3.7 UNIT VDC V/µs V No Load power dissipation PNL W Inrush current peak DC input current Transfer ratio Output voltage Output current (average) Output current (peak) Output power (average) Efficiency (ambient) Efficiency (hot) Efficiency (over load range) Output resistance (cold) Output resistance (ambient) Output resistance (hot) Switching frequency Output ripple frequency Output voltage ripple Output inductance (parasitic) Output capacitance (internal) Output capacitance (external) PROTECTION OVLO Overvoltage lockout response time Output overcurrent trip Short circuit protection trip current Output overcurrent response time constant Short circuit protection response time Thermal shutdown setpoint IINRP IIN_DC K VOUT IOUT_AVG IOUT_PK POUT_AVG 2.5 1/24 10 1.8 A A V/V V A A W % 40 60 88.5 88.5 83.0 88.0 88.0 77.0 1.6 1.8 2.6 1.60 3.20 90.2 90.3 89.6 2.1 2.7 3.2 1.80 3.60 165 600 120 1500 2.6 3.4 5.0 1.90 3.80 350 ηAMB ηHOT η20% ROUT_COLD ROUT_AMB ROUT_HOT FSW FSW_RP VOUT_PP LOUT_PAR COUT_INT COUT_EXT % % mΩ mΩ mΩ MHz MHz mV pH µF µF COUT = 0 F, IOUT = 40 A, VIN = 45 V, 20 MHz BW, Section 12 Frequency up to 30 MHz, Simulated J-lead model VOUT = 2 V VTM Standalone Operation VIN pre-applied, VC enable VIN_OVLO+ TOVLO IOCP ISCP TOCP TSCP TJ_OTP Module latched shutdown Effective internal RC filter 55.5 57.7 2.4 59.8 V µs 44 80 Effective internal RC filter (Integrative). From detection to cessation of switching (Instantaneous) 125 70 5.5 1 130 100 A A ms µs 135 ºC V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 2 of 16 VTM48EH020 x 040A00 3.0 SIGNAL CHARACTERISTICS Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25°C unless otherwise noted. • Used to wake up powertrain circuit. • A minimum of 12 V must be applied indefinitely for VIN < 26 V to ensure normal operation. • VC slew rate must be within range for a successful start. SIGNAL TYPE STATE ATTRIBUTE External VC voltage VC current draw threshold Steady VC current draw VC internal resistor ANALOG INPUT Start Up VC slew rate VC inrush current VTM CONTROL : VC • PRM™ module VC can be used as valid wake-up signal source. • VC voltage may be continuously applied; there will be minimal VC current drawn when VIN > 26 V and VC < 13. • Internal resistance used in adaptive loop compensation SYMBOL VVC_EXT VVC_TH IVC RVC-INT dVC/dt IINR_VC Required for proper startup; 0.02 CONDITIONS / NOTES Required for startup, and operation below 26 V. See Section 7. Low VC current draw for VIN >26 V VC = 13 V, VIN = 0 V VC = 13 V, VIN > 26 V VC = 16.5 V, VIN > 26 V MIN 12 13 90 6 90 9.31 TYP MAX UNIT 16.5 150 mA kΩ 0.25 V/µs V V VC = 16.5 V, dVC/dt = 0.25 V/µs 750 mA VIN pre-applied, PC floating, VC enable VC output turn-on delay TON 500 µs CPC = 0 µF, COUT = 1500 µF Transitional VC = 12 V to PC high, VIN = 0 V, 10 VC to PC delay TVC_PC 25 µs dVC/dt = 0.25 V/µs Internal VC capacitance CVC_INT VC = 0 V 2.2 µF PRIMARY CONTROL : PC • The PC pin enables and disables the VTM™ module. • Module will shutdown when pulled low with an impedance When held below 2 V, the VTM module will be disabled. less than 400 Ω. • PC pin outputs 5 V during normal operation. PC pin is equal to 2.5 V • In an array of VTM modules, connect PC pin to synchronize startup. during fault mode given VIN > 26 V and VC > 12 V. • PC pin cannot sink current and will not disable other module • After successful start-up and under no fault condition, PC can be used as during fault mode. a 5 V regulated voltage source with a 2 mA maximum current. SIGNAL TYPE STATE Steady ATTRIBUTE SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT V mA kΩ µA pF kΩ V V mA µs µs PC voltage VPC 4.7 5.0 5.3 PC source current IPC_OP 2 ANALOG PC resistance (internal) RPC_INT Internal pull down resistor 50 150 400 OUTPUT PC source current IPC_EN 50 100 300 Start Up PC capacitance (internal) CPC_INT Section 7 50 PC resistance (external) RPC_EXT 60 PC voltage (enable) VPC_EN 2 2.5 3 Enable PC voltage (disable) VPC_DIS 2 Disable DIGITAL PC pull down current IPC_PD 5.1 INPUT / OUPUT PC disable time TPC_DIS_T 4 Transitional PC fault response time TFR_PC From fault to PC = 2 V 100 TEMPERATURE MONITOR : TM • The TM pin monitors the internal temperature of the VTM controller IC • The TM pin has a room temperature setpoint of 3 V (@27°C) within an accuracy of ±5°C. and approximate gain of 10 mV/°C. • Can be used as a "Power Good" flag to verify that the VTM is operating. SIGNAL TYPE STATE ATTRIBUTE TM voltage TM source current TM gain TM voltage ripple Disable DIGITAL OUTPUT (FAULT FLAG) Transitional TM voltage TM resistance (internal) TM capacitance (external) TM fault response time SYMBOL VTM_AMB ITM ATM VTM_PP VTM_DIS RTM_INT CTM_EXT TFR_TM CONDITIONS / NOTES TJ controller = 27°C MIN 2.95 TYP 3.00 10 CTM = 0 F, VIN = 45 V, IOUT = 40 A Internal pull down resistor From fault to TM = 1.5 V 25 120 0 40 10 200 50 50 MAX UNIT 3.05 100 V µA mV/°C mV V kΩ pF µs ANALOG OUTPUT Steady V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 3 of 16 VTM48EH020 x 040A00 3.0 SIGNAL CHARACTERISTICS (CONT.) Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40°C < TJ < 125°C (T-Grade); All other specifications are at TJ = 25°C unless otherwise noted. CURRENT MONITOR : IM • The nominal IM pin voltage varies between 0.3 V and 1.64 V representing the output current within ±25% under all operating line temperature conditions between 50% and 100%. SIGNAL TYPE STATE ATTRIBUTE IM voltage (no load) IM voltage (50%) IM voltage (full load) IM gain IM resistance (external) SYMBOL VIM_NL VIM_50% VIM_FL A IM RIM_EXT • The IM pin provides a DC analog voltage proportional to the output current of the VTM™ module. CONDITIONS / NOTES TC = 25ºC, VIN = 45 V, IOUT = 0 A TC = 25ºC, VIN = 45 V, IOUT = 20 A TC = 25ºC, VIN = 45 V, IOUT = 40 A TC = 25ºC, VIN = 45 V, IOUT > 20 A MIN 0.15 TYP 0.3 0.82 1.64 41 MAX 0.45 UNIT V V V mV/A MΩ ANALOG OUTPUT Steady 2.5 4.0 TIMING DIAGRAM IOUT ISSP IOCP 1 23 b 6 7 4 5 d 8 VC VVC-EXT a VOVLO VIN NL ≥ 26 V c e f VOUT TM VTM-AMB PC 5V 3V g a: VC slew rate (dVC/dt) b: Minimum VC pulse rate c: TOVLO d: TOCP e: Output turn on delay (TON) f: PC disable time (TPC_DIS_T) g: VC to PC delay (TVC_PC) 1. Initiated VC pulse 2. Controller start 3. VIN ramp up 4. VIN = VOVLO 5. VIN ramp down no VC pulse 6. Overcurrent 7. Start up on short circuit 8. PC driven low Notes: – Timing and voltage is not to scale – Error pulse width is load dependent V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 4 of 16 VTM48EH020 x 040A00 5.0 APPLICATION CHARACTERISTICS The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures for general trend data. ATTRIBUTE No load power dissipation Efficiency (ambient) Efficiency (hot) Output resistance (ambient) Output resistance (hot) Output resistance (cold) Output voltage ripple VOUT Transient (positive) VOUT Transient (negative) SYMBOL PNL ηAMB ηHOT ROUT_AMB ROUT_HOT ROUT_COLD VOUT_PP VOUT_TRAN+ VOUT_TRANCONDITIONS / NOTES VIN = 45 V VIN = 45 V, IOUT = 40 A VIN = 45 V, IOUT = 40 A, TC = 100ºC VIN = 45 V, IOUT = 40 A VIN = 45 V, IOUT = 40 A, TC = 100ºC VIN = 45 V, IOUT = 40 A, TC = -40ºC COUT = 0 F, IOUT = 40 A, VIN = 45 V, 20 MHz BW, Section 12 IOUT_STEP = 0 A TO 40A, VIN = 45 V, ISLEW > 10 A /us IOUT_STEP = 40 A to 0 A, VIN = 45 V ISLEW > 10 A /us TYP 2.6 90.3 89.8 2.7 3.1 2.2 193 20 20 UNIT W % % mΩ mΩ mΩ mV mV mV No Load Power Dissipation vs. Line No Load Power Dissipation (W) 5 Full Load Efficiency vs. Case Temperature 92 Full Load Efficiency (%) 26 29 32 36 39 42 45 49 52 55 4.5 4 3.5 3 2.5 2 1.5 1 90 88 86 84 82 -40 -20 0 20 40 60 80 100 Input Voltage (V) TCASE: -40°C 25°C 100°C VIN : Case Temperature (°C) 26 V 45 V 55 V Figure 1 — No load power dissipation vs. VIN Figure 2 — Full load efficiency vs. temperature Efficiency & Power Dissipation -40°C Case 92 88 84 18 92 Efficiency & Power Dissipation 25°C Case 18 16 Power Dissipation (W) 16 88 84 Efficiency (%) Efficiency (%) 80 76 72 68 64 60 56 0 4 8 12 16 η PD 14 12 10 8 6 4 2 0 80 76 72 68 64 60 56 0 4 8 12 16 η PD 14 12 10 8 6 4 2 0 20 24 28 32 36 40 20 24 28 32 36 40 Load Current (A) VIN: 26 V 45 V 55 V 26 V 45 V 55 V VIN: 26 V Output Current (A) 45 V 55 V 26 V 45 V 55 V Figure 3 — Efficiency and power dissipation at –40°C Figure 4 — Efficiency and power dissipation at 25°C V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 5 of 16 Power Dissipation (W) VTM48EH020 x 040A00 ROUT vs. Case Temperature at VIN = 45 V 18 Efficiency & Power Dissipation 100°C Case 92 88 84 3.5 Power Dissipation (W) 16 Efficiency (%) Rout (mΩ) 80 76 72 68 64 60 56 0 4 8 12 16 20 η PD 14 12 10 8 6 4 2 0 24 28 32 36 40 3.0 2.5 2.0 1.5 1.0 -40 -20 0 20 40 60 80 100 Output Current (A) VIN: 26 V 45 V 55 V 26 V 45 V 55 V Case Temperature (°C) I OUT : 4A 40 A Figure 5 — Efficiency and power dissipation at 100°C Figure 6 — ROUT vs. temperature Ripple vs. Load 200 175 2.00 1.75 1.50 IM Voltage vs. Load at VIN = 45 V Ripple (mV pk-pk) 150 125 100 75 50 0 4 8 12 16 20 24 28 32 36 40 IM (V) 1.25 1.00 0.75 0.50 0.25 0 0 4 TCASE: 8 12 -40ºC 16 20 24 25ºC 28 32 36 40 Load Current (A) Vpk-pk (mV) Load Current (A) 100ºC Figure 7 — VRIPPLE vs. IOUT ; No external COUT. Board mounted module, scope setting : 20 MHz analog BW Figure 8 — IM voltage vs. load IM Voltage vs. Load 25°C Case 2.00 1.75 1.50 2.0 1.9 1.8 IM Voltage vs. TCASE & Line IM (V) 1.00 0.75 0.50 0.25 0 0 4 VIN : IM (V) 8 12 16 20 24 28 32 36 40 1.25 1.7 1.6 1.5 1.4 1.3 -40 -20 0 20 40 60 80 100 Load Current (A) 26 V 45 V 55 V VIN 26 V TCASE (°C) 45 V 55 V Figure 9 — IM voltage vs. load Figure 10 — Full load IM voltage vs. TCASE V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 6 of 16 VTM48EH020 x 040A00 Safe Operating Area 80 70 Output Current (A) 60 10 ms Max 50 40 30 20 10 0 0 0.25 0.5 0.75 1 1.25 1.5 1.75 2 2.25 2.5 Continuous Output Voltage (V) Figure 11 — Safe operating area Figure 12 — Full load ripple, 100 µF CIN ; No external COUT. Board mounted module, scope setting : 20 MHz analog BW Figure 13 — Start up from application of VIN ; VC pre-applied COUT = 0 µF Figure 14 — Start up from application of VC; VIN pre-applied COUT = 0 µF Figure 15 — 0 A– 40 A transient response: CIN = 100 µF, no external COUT Figure 16 — 40 A – 0 A transient response: CIN = 100 µF, no external COUT Rev. 2.0 5/2011 Page 7 of 16 V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m VTM48EH020 x 040A00 6.0 GENERAL CHARACTERISTICS Specifications apply over all line and load conditions unless otherwise noted; Boldface specifications apply over the temperature range of -40ºC < TJ < 125ºC (T-Grade); All Other specifications are at TJ = 25°C unless otherwise noted. ATTRIBUTE MECHANICAL Length Width Height Volume Weight Lead finish SYMBOL CONDITIONS / NOTES MIN TYP MAX UNIT L W H Vol W 21.7 / [0.85] 16.4 / [0.64] 6.48 / [0.255] No heat sink Nickel Palladium Gold 0.51 0.02 0.003 22.0 / [0.87] 16.5 / [0.65] 6.73 / [0.265] 2.44 / [0.150] 8.0 / 0.28 22.3 / [0.88] 16.6 / [0.66] 6.98 / [0.275] mm/[in] mm/[in] mm/[in] cm3/[in3] g/[oz] µm 2.03 0.15 0.051 THERMAL Operating temperature Thermal capacity ASSEMBLY Peak compressive force applied to case (Z-axis) Storage temperature TST ESDHBM ESD withstand ESDMM SOLDERING Peak temperature during reflow Peak time above 183°C Peak heating rate during reflow Peak cooling rate post reflow SAFETY Working voltage (IN – OUT) Isolation voltage (hipot) Isolation capacitance Isolation resistance MTBF MSL 5 MSL 6, TOB = 4hrs 1.5 1.5 225 245 150 3 6 °C °C s °C/s °C/s TJ VTM48EH020T040A00 (T-Grade) VTM48EH020M040A00 (M-Grade) -40 -55 5 125 125 °C °C Ws/°C Supported by J-lead only VTM48EH020T040A00 (T-Grade) VTM48EH020M040A00 (M-Grade) Human Body Model, "JEDEC JESD 22-A114C.01" Machine Model, "JEDEC JESD 22-A115-A" -40 -65 1500 2.5 3 125 125 lbs °C °C VDC 400 VIN_OUT VHIPOT CIN_OUT RIN_OUT 60 Unpowered Unit MIL HDBK 217, 25ºC, Ground Benign cTUVus cURus CE Mark RoHS 6 of 6 2250 1350 10 1750 4.5 2150 VDC VDC pF MΩ MHrs Agency approvals / standards V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 8 of 16 VTM48EH020 x 040A00 7.0 USING THE CONTROL SIGNALS VC, PC, TM, IM The VTM Control (VC) pin is an input pin which powers the internal VCC circuitry when within the specified voltage range of 12 V to 16.5 V. This voltage is required in order for the VTM™ current multiplier to start, and must be applied as long as the input is below 26 V. In order to ensure a proper start, the slew rate of the applied voltage must be within the specified range. Some additional notes on the using the VC pin: • In most applications, the VTM module will be powered by an upstream PRM™ regulator which provides a 10 ms VC pulse during startup. In these applications the VC pins of the PRM and VTM modules should be tied together. • The VC voltage can be applied indefinitely allowing for continuous operation down to 0 VIN . • The fault response of the VTM module is latching. A positive edge on VC is required in order to restart the unit. If VC is continuously applied the PC pin may be toggled to restart the module. Primary Control (PC) pin can be used to accomplish the following functions: • Delayed start: Upon the application of VC, the PC pin will source a constant 100 µA current to the internal RC network. Adding an external capacitor will allow further delay in reaching the 2.5 V threshold for module start. • Auxiliary voltage source: Once enabled in regular operational conditions (no fault), each VTM module PC provides a regulated 5 V, 2 mA voltage source. • Output disable: PC pin can be actively pulled down in order to disable the module. Pull down impedance shall be lower than 400 Ω. • Fault detection flag: The PC 5 V voltage source is internally turned off as soon as a fault is detected. It is important to notice that PC doesn’t have current sink capability. Therefore, in an array, PC line will not be capable of disabling neighboring modules if a fault is detected. • Fault reset: PC may be toggled to restart the unit if VC is continuously applied. Temperature Monitor (TM) pin provides a voltage proportional to the absolute temperature of the converter control IC. It can be used to accomplish the following functions: • Monitor the control IC temperature: The temperature in Kelvin is equal to the voltage on the TM pin scaled by 100. (i.e. 3.0 V = 300 K = 27ºC). If a heat sink is applied, TM can be used to thermally protect the system. • Fault detection flag: The TM voltage source is internally turned off as soon as a fault is detected. For system monitoring purposes (microcontroller interface) faults are detected on falling edges of TM signal. Current Monitor (IM) pin provides a voltage proportional to the output current of the VTM module. The nominal voltage will vary between 0.3 V and 1.64 V over the output current range of the VTM module (See Figures 8–10). The accuracy of the IM pin will be within 25% under all line and temperature conditions between 50% and 100% load. 8.0 STARTUP BEHAVIOR Depending on the sequencing of the VC with respect to the input voltage, the behavior during startup will vary as follows: • Normal Operation (VC applied prior to VIN): In this case the controller is active prior to ramping the input. When the input voltage is applied, the VTM module output voltage will track the input (See Figure 13). The inrush current is determined by the input voltage rate of rise and output capacitance. If the VC voltage is removed prior to the input reaching 26 V, the module may shut down. • Stand Alone Operation (VC applied after VIN ): In this case the module output will begin to rise upon the application of the VC voltage (See Figure 14). The Adaptive Soft Start circuit (See Section 10) may vary the ouput rate of rise in order to limit the inrush current to it’s maximum level. When starting into high capacitance, or a short, the output current will be limited for a maximum of 900 µsec. After this period, the adaptive soft start circuit will time out and the VTM module may shut down. No restart will be attempted until VC is re-applied, or PC is toggled. The maximum output capacitance is limited to 1500 µF in this mode of operation to ensure a sucessful start. 9.0 THERMAL CONSIDERATIONS V• I Chip™ products are multi-chip modules whose temperature distribution varies greatly for each part number as well as with the input / output conditions, thermal management and environmental conditions. Maintaining the top of the VTM48EH020T040A00 case to less than 100ºC will keep all junctions within the V• I Chip module below 125ºC for most applications. The percent of total heat dissipated through the top surface versus through the J-lead is entirely dependent on the particular mechanical and thermal environment. The heat dissipated through the top surface is typically 60%. The heat dissipated through the J-lead onto the PCB board surface is typically 40%. Use 100% top surface dissipation when designing for a conservative cooling solution. It is not recommended to use a V• I Chip module for an extended period of time at full load without proper heat sinking. V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 9 of 16 +VIN C1 Q1 Enable Primary Stage & Resonant Tank 10.0 VTM™ MODULE BLOCK DIAGRAM v i c o r p o w e r. c o m Power Transformer CIN Buck Regulator Supply Primary Gate Drive Lr Cr +VOUT Gate Drive Supply Q2 C2 Q3 COUT Q4 VC -VOUT Synchronous Rectification 18 V Rvc 10.5 V -VIN Modulator Adaptive Soft Start Enable Primary Current Sensing Secondary Gate Drive VIN PC Pull-Up & Source IM 3 V max. 240 µA max. 100 uA OVLO UVLO 5V 2 mA 2.5 V 1.5 k Fast current limit Vref Overcurrent Protection Enable Fault Logic Slow current limit PC Enable V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 150 K 40 K VREF (130ºC ± 5°C) 2.5 V Over Temperature Protection Temperature dependent voltage source TM 560 pF VTM48EH020 x 040A00 Page 10 of 16 Rev. 2.0 5/2011 VTM48EH020 x 040A00 11.0 SINE AMPLITUDE CONVERTER™ POINT OF LOAD CONVERSION The Sine Amplitude Converter™ (SAC™) uses a high frequency resonant tank to move energy from input to output. (The resonant tank is formed by Cr and leakage inductance Lr in the power transformer windings as shown in the VTM™ Module Block Diagram. See Section 10). The resonant LC tank, operated at high frequency, is amplitude modulated as function of input voltage and output current. A small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving power density. The VTM48EH020T040A00 SAC can be simplified into the following model: 76 pH LLIN = 5 nH IN = 3.7 nH IOUT IOUT ROUT ROUT 2.7 mΩ LOUT = 600 pH + RCIN RCIN 6.3 mΩ V VIN IN CIN CIN 900 nF 0.053 A Q IIQ V•I 1/24 • IOUT 87 mΩ R RCOUT COUT 22 µΩ 120 µF + + – K + – 1/24 • VIN COUT COUT V VOUT OUT – Figure 17 — V•I Chip™ module AC model – At no load: VOUT = VIN • K K represents the “turns ratio” of the SAC. Rearranging Eq (1): (1) ROUT = 0 Ω and IQ = 0 A, Eq. (3) now becomes Eq. (1) and is essentially load independent. A resistor R is now placed in series with VIN as shown in Figure 18. R V K = OUT VIN In the presence of load, VOUT is represented by: VOUT = VIN • K – IOUT • ROUT and IOUT is represented by: IOUT = IIN – IQ K (2) VIN Vin + – SAC™ SAC K = 1/32 K = 1/32 Vout VOUT (3) Figure 18 — K = 1/32 Sine Amplitude Converter™ with series input resistor The relationship between VIN and VOUT becomes: (4) VOUT = (VIN – IIN • R) • K Substituting the simplified version of Eq. (4) (IQ is assumed = 0 A) into Eq. (5) yields: VOUT = VIN • K – IOUT • R • K2 (6) (5) ROUT represents the impedance of the SAC, and is a function of the RDSON of the input and output MOSFETs and the winding resistance of the power transformer. IQ represents the quiescent current of the SAC control and gate drive circuitry. The use of DC voltage transformation provides additional interesting attributes. Assuming for the moment that V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 11 of 16 VTM48EH020 x 040A00 This is similar in form to Eq. (3), where ROUT is used to represent the characteristic impedance of the SAC™. However, in this case a real R on the input side of the SAC is effectively scaled by K2 with respect to the output. Assuming that R = 1 Ω, the effective R as seen from the secondary side is 0.98 mΩ, with K = 1/32 as shown in Figure 18. A similar exercise should be performed with the additon of a capacitor, or shunt impedance, at the input to the SAC. A switch in series with VIN is added to the circuit. This is depicted in Figure 19. Low impedance is a key requirement for powering a high current, low voltage load efficiently. A switching regulation stage should have minimal impedance, while simultaneously providing appropriate filtering for any switched current. The use of a SAC between the regulation stage and the point of load provides a dual benefit, scaling down series impedance leading back to the source and scaling up shunt capacitance (or energy storage) as a function of its K factor squared. However, these benefits are not useful if the series impedance of the SAC is too high. The impedance of the SAC must be low well beyond the crossover frequency of the system. A solution for keeping the impedance of the SAC low involves switching at a high frequency. This enables magnetic components to be small since magnetizing currents remain low. Small magnetics mean small path lengths for turns. Use of low loss core material at high frequencies reduces core losses as well. The two main terms of power loss in the VTM™ module are: - No load power dissipation (PNL ): defined as the power used to power up the module with an enabled power train at no load. - Resistive loss (ROUT): refers to the power loss across the VTM current multiplier modeled as pure resistive impedance. PDISSIPATED = PNL + PROUT (7) Therefore, POUT = PIN – PDISSIPATED = PIN – PNL – PROUT (11) (10) S VIN Vin + – C SAC™ SAC K = 1/32 K = 1/32 VVout OUT Figure 19 — Sine Amplitude Converter™ with input capacitor A change in VIN with the switch closed would result in a change in capacitor current according to the following equation: IC(t) = C dVIN dt Assume that with the capacitor charged to VIN, the switch is opened and the capacitor is discharged through the idealized SAC. In this case, IC = IOUT • K Substituting Eq. (1) and (8) into Eq. (7) reveals: IOUT = C K2 • The above relations can be combined to calculate the overall module efficiency: η= POUT = PIN – PNL – PROUT PIN PIN (12) (8) dVOUT dt (9) = VIN • IIN – PNL – (IOUT)2 • ROUT VIN • IIN Writing the equation in terms of the output has yielded a K2 scaling factor for C, this time in the denominator of the equation. For a K factor less than unity, this results in an effectively larger capacitance on the output when expressed in terms of the input. With a K=1/32 as shown in Figure 19, C=1 µF would effectively appear as C=1024 µF when viewed from the output. = 1– ( PNL + (IOUT)2 • ROUT VIN • IIN ) V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 12 of 16 VTM48EH020 x 040A00 12.0 INPUT AND OUTPUT FILTER DESIGN A major advantage of a SAC™ system versus a conventional PWM converter is that the former does not require large functional filters. The resonant LC tank, operated at extreme high frequency, is amplitude modulated as a function of input voltage and output current and efficiently transfers charge through the isolation transformer. A small amount of capacitance embedded in the input and output stages of the module is sufficient for full functionality and is key to achieving high power density. This paradigm shift requires system design to carefully evaluate external filters in order to: 1.Guarantee low source impedance. To take full advantage of the VTM™ module dynamic response, the impedance presented to its input terminals must be low from DC to approximately 5 MHz. Input capacitance may be added to improve transient performance or compensate for high source impedance. 2.Further reduce input and/or output voltage ripple without sacrificing dynamic response. Given the wide bandwidth of the VTM module, the source response is generally the limiting factor in the overall system response. Anomalies in the response of the source will appear at the output of the VTM module multiplied by its K factor. 3.Protect the module from overvoltage transients imposed by the system that would exceed maximum ratings and cause failures. The V•I Chip™ module input/output voltage ranges must not be exceeded. An internal overvoltage lockout function prevents operation outside of the normal operating input range. Even during this condition, the powertrain is exposed to the applied voltage and power MOSFETs must withstand it. 13.0 CAPACITIVE FILTERING CONSIDERATIONS FOR A SINE AMPLITUDE CONVERTER™ It is important to consider the impact of adding input and output capacitance to a Sine Amplitude Converter on the system as a whole. Both the capacitance value, and the effective impedance of the capacitor must be considered. A Sine Amplitude Converter has a DC ROUT value which has already been discussed in section 11. The AC ROUT of the SAC contains several terms: • Resonant tank impedance • Input lead inductance and internal capacitance • Output lead inductance and internal capacitance The values of these terms are shown in the behavioral model in section 11. It is important to note on which side of the transformer these impedances appear and how they reflect across the transformer given the K factor. The overall AC impedance varies from model to model but for most models it is dominated by DC ROUT value from DC to beyond 500 KHz. The behavioral model in section 11 should be used to approximate the AC impedance of the specific model. Any capacitors placed at the output of the VTM module reflect back to the input of the module by the square of the K factor (Eq. 9) with the impedance of the module appearing in series. It is very important to keep this in mind when using a PRM™ regulator to power the VTM™ current multiplier. Most PRM regulators have a limit on the maximum amount of capacitance that can be applied to the output. This capacitance includes both the PRM output capacitance and the VTM output capacitance reflected back to the input. In PRM remote sense applications, it is important to consider the reflected value of VTM module output capacitance when designing and compensating the PRM module control loop. Capacitance placed at the input of the VTM module appear to the load reflected by the K factor, with the impedance of the module in series. In step-down VTM module ratios, the effective capacitance is increased by the K factor. The effective ESR of the capacitor is decreased by the square of the K factor, but the impedance of the module appears in series. Still, in most step-down VTM modules an electrolytic capacitor placed at the input of the module will have a lower effective impedance compared to an electrolytic capacitor placed at the output. This is important to consider when placing capacitors at the output of the module. Even though the capacitor may be placed at the output, the majority of the AC current will be sourced from the lower impedance, which in most cases will be the VTM module. This should be studied carefully in any system design using a VTM module. In most cases, it should be clear that electrolytic output capacitors are not necessary to design a stable, well-bypassed system. V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 13 of 16 VTM48EH020 x 040A00 14.0 CURRENT SHARING The SAC™ topology bases its performance on efficient transfer of energy through a transformer without the need of closed loop control. For this reason, the transfer characteristic can be approximated by an ideal transformer with some resistive drop and positive temperature coefficient. This type of characteristic is close to the impedance characteristic of a DC power distribution system, both in behavior (AC dynamic) and absolute value (DC dynamic). When connected in an array with the same K factor, the VTM™ module will inherently share the load current with parallel units, according to the equivalent impedance divider that the system implements from the power source to the point of load. Some general recommendations to achieve matched array impedances: • Dedicate common copper planes within the PCB to deliver and return the current to the modules. • Provide the PCB layout as symmetric as possible. • Apply same input / output filters (if present) to each unit. For further details see AN:016 Using BCM™ Bus Converters in High Power Arrays. A VIN ZIN_EQ1 16.0 REVERSE INRUSH CURRENT PROTECTION The VTM48EH020T040A00 provides reverse inrush protection which prevents reverse current flow until the input voltage is high enough to first establish current flow in the forward direction. In the event that there is a DC voltage present on the output before the VTM module is powered up, this feature protects sensitive loads from excessive dV/dT during power up as shown in Figure 21. If a voltage is present at the output of the module which satisfies the condition VOUT > VIN • K after a successful power up the energy will be transferred from secondary to primary. The input to output ratio of the module will be maintained. The module will continue to operate in reverse as long as the input and output voltages are within the specified range. The VTM48EH020T040A00 has not been qualified for continuous reverse operation. Current Multiplier PC VC IM TM R VTM™ R VIN +In +Out + _ -In -Out Supply B CD E F G H VTM™1 RO_1 ZOUT_EQ1 VOUT VC ZIN_EQ2 + – VTM™2 RO_2 ZOUT_EQ2 VIN Supply DC Load VIN VOUT ZIN_EQn VTM™n RO_n ZOUT_EQn VOUT Supply Figure 20 — VTM™ module array TM 15.0 FUSE SELECTION In order to provide flexibility in configuring power systems V• I Chip™ products are not internally fused. Input line fusing of V• I Chip products is recommended at system level to provide thermal protection in case of catastrophic failure. The fuse shall be selected by closely matching system requirements with the following characteristics: • Current rating (usually greater than maximum VTM module current) • Maximum voltage rating (usually greater than the maximum possible input voltage) • Ambient temperature • Nominal melting I2t PC A: VOUT supply > 0 V B: VC to -IN > 12 V controller wakes-up, PC & TM pulled high, reverse inrush protection blocks VOUT supplying VIN C: VIN supply ramps up D: VIN > VOUT /K, powertrain starts in normal mode E: VIN supply ramps down F: VIN > VOUT /K, powertrain transfers reverse energy G: VOUT ramps down, VIN follows H: VC turns off Figure 21 — Reverse inrush protection Rev. 2.0 5/2011 Page 14 of 16 V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m VTM48EH020 x 040A00 17.1 MECHANICAL DRAWING mm (inch) NOTES: mm 2. DIMENSIONS ARE inch . UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: 3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005] 4. PRODUCT MARKING ON TOP SURFACE DXF and PDF files are available on vicorpower.com 17.2 RECOMMENDED LAND PATTERN 4 A 3 2 1 +In +Out B C D J K E F G H -Out L M IM TM VC PC -In Bottom View Signal Name +In –In IM TM VC PC +Out –Out Designation A1-B1, A2-B2 L1-M1, L2-M2 E1 F2 G1 H2 A3-D3, A4-D4 J3-M3, J4-M4 NOTES: 3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005] mm 2. DIMENSIONS ARE inch . UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE: 4. PRODUCT MARKING ON TOP SURFACE DXF and PDF files are available on vicorpower.com 17.3 RECOMMENDED LAND PATTERN FOR PUSH PIN HEAT SINK Notes: 1. Maintain 3.50 (0.138) Dia. keep-out zone free of copper, all PCB layers. 2. (A) minimum recommended pitch is 24.00 (0.945) this provides 7.50 (0.295) component edge–to–edge spacing, and 0.50 (0.020) clearance between Vicor heat sinks. (B) Minimum recommended pitch is 25.50 (1.004). This provides 9.00 (0.354) component edge–to–edge spacing, and 2.00 (0.079) clearance between Vicor heat sinks. 3. V•I Chip™ module land pattern shown for reference only, actual land pattern may differ. Dimensions from edges of land pattern to push–pin holes will be the same for all half size V•I Chip Products. 4. RoHS compliant per CST–0001 latest revision. 5. Unless otherwise specified: Dimensions are mm (inches) tolerances are: x.x (x.xx) = ±0.13 (0.01) x.xx (x.xxx) = ±0.13 (0.005) 6. Plated through holes for grounding clips (33855) shown for reference. Heat sink orientation and device pitch will dictate final grounding solution. (NO GROUNDING CLIPS) (WITH GROUNDING CLIPS) V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 15 of 16 VTM48EH020 x 040A00 Warranty Vicor products are guaranteed for two years from date of shipment against defects in material or workmanship when in normal use and service. This warranty does not extend to products subjected to misuse, accident, or improper application or maintenance. Vicor shall not be liable for collateral or consequential damage. This warranty is extended to the original purchaser only. EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Vicor will repair or replace defective products in accordance with its own best judgement. For service under this warranty, the buyer must contact Vicor to obtain a Return Material Authorization (RMA) number and shipping instructions. Products returned without prior authorization will be returned to the buyer. The buyer will pay all charges incurred in returning the product to the factory. Vicor will pay all reshipment charges if the product was defective within the terms of this warranty. Information published by Vicor has been carefully checked and is believed to be accurate; however, no responsibility is assumed for inaccuracies. Vicor reserves the right to make changes to any products without further notice to improve reliability, function, or design. Vicor does not assume any liability arising out of the application or use of any product or circuit; neither does it convey any license under its patent rights nor the rights of others. Vicor general policy does not recommend the use of its components in life support applications wherein a failure or malfunction may directly threaten life or injury. Per Vicor Terms and Conditions of Sale, the user of Vicor components in life support applications assumes all risks of such use and indemnifies Vicor against all damages. Vicor’s comprehensive line of power solutions includes high density AC-DC and DC-DC modules and accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom power systems. Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor components are not designed to be used in applications, such as life support systems, wherein a failure or malfunction could result in injury or death. All sales are subject to Vicor’s Terms and Conditions of Sale, which are available upon request. Specifications are subject to change without notice. Intellectual Property Notice Vicor and its subsidiaries own Intellectual Property (including issued U.S. and Foreign Patents and pending patent applications) relating to the products described in this data sheet. Interested parties should contact Vicor's Intellectual Property Department. The products described on this data sheet are protected by the following U.S. Patents Numbers: 5,945,130; 6,403,009; 6,710,257; 6,911,848; 6,930,893; 6,934,166; 6,940,013; 6,969,909; 7,038,917; 7,145,186; 7,166,898; 7,187,263; 7,202,646; 7,361,844; D496,906; D505,114; D506,438; D509,472; and for use under 6,975,098 and 6,984,965. Vicor Corporation 25 Frontage Road Andover, MA, USA 01810 Tel: 800-735-6200 Fax: 978-475-6715 email Customer Service: custserv@vicorpower.com Technical Support: apps@vicorpower.com V•I CHIP CORP. (A VICOR COMPANY) 25 FRONTAGE RD. ANDOVER, MA 01810 800-735-6200 v i c o r p o w e r. c o m Rev. 2.0 5/2011 Page 16 of 16