VTM™ Current Multiplier
VTM48Ex240y012A00
S
C
NRTL
US
High-Efficiency Sine Amplitude Converter™
Features & Benefits
Product Ratings
• 48VDC to 24VDC 12.5A current multiplier
Operating from standard 48V or 24V PRM™ Regulators
• High efficiency (>95%) reduces system power consumption
• High density (43A/in3)
VIN = 26 – 55V
IOUT = 12.5A (Nominal)
VOUT = 13.0 – 27.5V (No Load)
K = 1/2
Product Description
The VI Chip® current multiplier is a high-efficiency (>95%)
Sine Amplitude Converter™ (SAC) operating from a 26 to 55VDC
primary bus to deliver an isolated output. The Sine Amplitude
Converter offers a low AC impedance beyond the bandwidth
of most downstream regulators; therefore capacitance normally
at the load can be located at the input to the Sine Amplitude
Converter. Since the K factor of the VTM48EF240T012A00 is 1/2,
the capacitance value can be reduced by a factor of 4, resulting in
savings of board area, materials and total system cost.
• “Full Chip” VI Chip® package enables surface mount,
low-impedance interconnect to system board
• Contains built-in protection features against:
Overvoltage Lockout
Overcurrent
Short Circuit
Overtemperature
• Provides enable / disable control,
internal temperature monitoring
The VTM48EF240T012A00 is provided in a VI Chip package
compatible with standard pick-and-place and surface mount
assembly processes. The co-molded VI Chip package provides
enhanced thermal management due to a large thermal interface
area and superior thermal conductivity. The high conversion
efficiency of the VTM48EF240T012A00 increases overall
system efficiency and lowers operating costs compared to
conventional approaches.
• ZVS / ZCS resonant Sine Amplitude Converter topology
• Less than 50ºC temperature rise at full load
in typical applications
Typical Applications
The VTM48EF240T012A00 enables the utilization of Factorized
Power Architecture™ which provides efficiency and size benefits
by lowering conversion and distribution losses and promoting
high‑density point-of-load conversion.
• High-End Computing Systems
• Automated Test Equipment
• High-Density Power Supplies
Part Numbering
• Communications Systems
Product Number
Package Style (x)
VTM48Ex240y012A00
F = J-Lead
T = –40 to 125°C
T = Through hole
M = –55 to 125°C
For Storage and Operating Temperatures see General Characteristics Section
Typical Application
Regulator
Voltage Transformer
VC
SG
OS
CD
PR
PC
TM
IL
Product Grade (y)
TM
VC
PC
VTM™
Transformer
PRM™
Regulator
+IN
+OUT
-IN
-OUT
+IN
+OUT
-IN
-OUT
VIN
VTM™ Current Multiplier
Page 1 of 20
Factorized Power ArchitectureTM
Rev 1.8
11/2021
L
O
A
D
(See Application Note AN:024)
VTM48Ex240y012A00
Absolute Maximum Ratings
The absolute maximum ratings below are stress ratings only. Operation at or beyond these maximum ratings can cause permanent damage to the device.
Parameter
Comments
Min
Max
Unit
+IN to –IN
–1.0
60
VDC
PC to –IN
–0.3
20
VDC
TM to –IN
–0.3
7
VDC
VC to –IN
–0.3
20
VDC
2250
VDC
40
VDC
+IN / –IN to +OUT / –OUT (hipot)
+OUT to –OUT
–0.5
Electrical Specifications
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C < TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Powertrain
Input Voltage Range
VIN Slew Rate
VIN UV Turn Off
VIN
No external VC applied
26
55
VC applied
0
55
dVIN / dt
VIN_UV
Module latched shutdown, No external VC applied,
IOUT = 12.5A
3.5
VIN = 48V
No Load Power Dissipation
PNL
19
IINRP
DC Input Current
IIN_DC
Transfer Ratio
Output Voltage
Output Current (Average)
Output Current (Peak)
Output Power (Average)
Efficiency (Ambient)
K
VOUT
5.9
POUT_AVG
ηAMB
Efficiency (Hot)
ηHOT
Efficiency (Over Load Range)
η20%
VTM™ Current Multiplier
Page 2 of 20
26
V
8
W
9
VC enable, VIN = 48V, COUT = 375µF,
RLOAD = 1877mΩ
13.5
K = VOUT / VIN, IOUT = 0A
20
A
8
A
1/2
V/V
VOUT = VIN • K – IOUT • ROUT
V
12.5
A
tPEAK < 10ms, IOUT_AVG ≤ 12.5A
18.0
A
IOUT_AVG ≤ 12.5A
300
W
IOUT_AVG
IOUT_PK
V / µs
14
VIN = 26 – 55V, TC = 25ºC
Inrush Current Peak
1
12.0
VIN = 26 – 55V
VIN = 48V, TC = 25ºC
VDC
VIN = 48V, IOUT = 12.5A
94.5
VIN = 26 – 55V, IOUT = 12.5A
92.0
VIN = 48V, IOUT = 6.25A
93.3
95.0
VIN = 48V, TC = 100°C, IOUT = 12.5A
94.1
95.2
2.5A < IOUT < 12.5A
81.0
Rev 1.8
11/2021
95.5
%
%
%
VTM48Ex240y012A00
Electrical Specifications (Cont.)
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C < TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Powertrain (Cont.)
Output Resistance (Cold)
ROUT_COLD
TC = –40°C, IOUT = 12.5A
20.0
32.8
46.0
mΩ
Output Resistance (Ambient)
ROUT_AMB
TC = 25°C, IOUT = 12.5A
32
43.4
55.0
mΩ
Output Resistance (Hot)
ROUT_HOT
TC = 100°C, IOUT = 12.5A
38.0
50.7
64.0
mΩ
1.68
1.77
1.86
MHz
3.36
Switching Frequency
FSW
3.54
3.72
MHz
VOUT_PP
Cout = 0F, Iout = 12.5A, Vin = 48V, 20MHz BW
200
400
mV
Output Inductance (Parasitic)
LOUT_PAR
Frequency up to 30MHz, Simulated J-lead model
600
pH
Output Capacitance (Internal)
COUT_INT
Effective Value at 24Vout
12
µF
COUT_EXT
VTM Standalone Operation. Vin pre-applied, VC enable
Output Ripple Frequency
Output Voltage Ripple
Output Capacitance (External)
FSW_RP
375
µF
60.0
V
Protection
Overvoltage Lockout
55.1
VIN_OVLO+
Module latched shutdown
Overvoltage Lockout Response
Time Constant
tOVLO
Effective internal RC filter
Output Overcurrent Trip
IOCP
15
Short Circuit Protection Trip Current
ISCP
35
Output Overcurrent Response
Time Constant
tOCP
Effective internal RC filter (Integrative)
6
ms
Short Circuit Protection
Response Time
tSCP
From detection to cessation
of switching (Instantaneous)
1
µs
Thermal Shut-Down Set Point
Reverse Inrush Current Protection
VTM™ Current Multiplier
Page 3 of 20
TJ_OTP
7.8
125
Reverse Inrush protection is disabled for this product
Rev 1.8
11/2021
58.7
25
µs
35
A
A
130
135
°C
VTM48Ex240y012A00
Signal Characteristics
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
VTM Control: VC
• Used to wake up powertrain circuit.
• A minimum of 11.5V must be applied indefinitely for Vin < 26V to ensure normal operation.
• VC slew rate must be within range for a successful start.
• PRM™ VC can be used as valid wake-up signal source.
• Internal Resistance used in “Adaptive Loop” compensation.
• VC voltage may be continuously applied.
Signal Type
State
Attribute
External VC Voltage
VC Current Draw
Symbol
VVC_EXT
IVC
Steady
Analog
Input
Typ
11.5
VC = 11.5V, VIN = 0V
115
VC = 11.5V, VIN > 26V
22.5
VC = 16.5V, VIN > 26V
32
Fault mode. VC > 11.5V
Max
Unit
16.5
V
150
mA
60
DVC_INT
100
V
VC Internal Resistor
RVC-INT
0.51
kΩ
TVC_COEFF
3900 ppm/°C
VC Start-Up Pulse
VVC_SP
tPEAK < 18ms
VC Slew Rate
dVC/dt
Required for proper start up
VC Inrush Current
IINR_VC
VC = 16.5V, dVC/dt = 0.25V/μs
0.02
tON
VIN pre-applied, PC floating,
VC enable, CPC = 0μF, COUT = 0μF
VC to PC Delay
tVC_PC
VC = 11.5V to PC high, VIN = 0V,
dVC/dt = 0.25V/μs
75
Internal VC Capacitance
CVC_INT
VC = 0V
3.2
VC to VOUT Turn-On Delay
Transitional
Min
VC Internal Diode Rating
VC Internal Resistor
Temperature Coefficient
Start Up
Conditions / Notes
Required for start up and operation
below 26V.
20
V
0.25
V / µs
1
A
500
µs
125
µs
µF
Primary Control: PC
• The PC pin enables and disables the VTM. When held below 2V, the VTM will be disabled.
• PC pin outputs 5V during normal operation. PC pin is equal to 2.5V during fault mode given Vin > 26V or VC > 11.5V.
• After successful start up and under no-fault condition, PC can be used as a 5V regulated voltage source with a 2mA maximum current.
• Module will shutdown when pulled low with an impedance less than 400Ω.
• In an array of VTMs, connect PC pin to synchronize start up.
• PC pin cannot sink current and will not disable other modules during fault mode.
Signal Type
State
Attribute
PC Voltage
Steady
Analog
Output
Enable
Digital
Input / Output
IPC_OP
PC Resistance (Internal)
RPC_INT
Disable
Transitional
VTM™ Current Multiplier
Page 4 of 20
PC Capacitance (Internal)
Conditions / Notes
VPC
PC Source Current
PC Source Current
Start Up
Symbol
Internal pull-down resistor
IPC_EN
Min
Typ
Max
Unit
4.7
5.0
5.3
V
2
mA
400
kΩ
300
µA
1100
pF
50
150
50
100
CPC_INT
PC Resistance (External)
RPC_S
60
PC Voltage
VPC_EN
2
PC Voltage (Disable)
VPC_DIS
PC Pull-Down Current
PC Disable Time
PC Fault-Response Time
2.5
5.1
IPC_PD
tPC_DIS_T
tFR_PC
kΩ
From fault to PC = 2V
Rev 1.8
11/2021
3
V
2
V
mA
5
µs
100
µs
VTM48Ex240y012A00
Signal Characteristics (Cont.)
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40°C ≤ TJ < 125°C (T-Grade). All other specifications are at TJ = 25ºC unless otherwise noted.
Temperature Monitor: TM
• The TM pin monitors the internal temperature of the VTM controller IC within an accuracy of ±5°C.
• Can be used as a “Power Good” flag to verify that the VTM is operating.
• The TM pin has a room-temperature set point of 3V and approximate gain of 10mV/°C.
• Output drives Temperature Shutdown comparator.
Signal Type
State
Attribute
TM Voltage
Analog
Output
Steady
Disable
Digital
Output
(Fault Flag)
Transitional
VTM_AMB
TM Source Current
ITM
TM Gain
ATM
VTM_PP
TM Voltage
VTM_DIS
TM Resistance (Internal)
RTM_INT
TM Capacitance (External)
CTM_EXT
tFR_TM
Conditions / Notes
TJ controller = 27°C
Min
Typ
Max
Unit
2.95
3.00
3.05
V
100
µA
10
TM Voltage Ripple
TM Fault-Response Time
VTM™ Current Multiplier
Page 5 of 20
Symbol
CTM = 0F, VIN = 48V, IOUT = 12.5A
120
mV/°C
200
mV
50
kΩ
50
pF
0
Internal pull-down resistor
From fault to TM = 1.5V
Rev 1.8
11/2021
25
40
10
V
µs
VTM48Ex240y012A00
Timing Diagram
ISEC
7
6
ISEC
ISEC
1
2 3
VC
4
8
d
5
b
VVC-EXT
a
VPRI
VOVLO
NL
≥ 26V
c
e
f
VSEC
TM
VTM-AMB
PC
g
5V
3V
a: VC slew rate (dVC/dt)
b: Minimum VC pulse rate
c: tOVLO_PIN
d: tOCP_SEC
e: Secondary turn on delay (tON)
f: PC disable time (tPC_DIS_t)
g: VC to PC delay (tVC_PC)
VTM™ Current Multiplier
Page 6 of 20
1. Initiated VC pulse
2. Controller start
3. VPRI ramp up
4. VPRI = VOVLO
5. VPRI ramp down no VC pulse
6. Overcurrent, Secondary
7. Start up on short circuit
8. PC driven low
Rev 1.8
11/2021
Notes:
– Timing and voltage is not to scale
– Error pulse width is load dependent
VTM48Ex240y012A00
Application Characteristics
The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures for general trend data.
Attribute
Symbol
Conditions / Notes
Typ
Unit
Powertrain
PNL
VIN = 48V, PC enabled
5.8
W
Efficiency (Ambient)
ηAMB
VIN = 48V, IOUT = 12.5A
95.8
%
Efficiency (Hot)
ηHOT
VIN = 48V, IOUT = 12.5A, TC = 100ºC
95.3
%
Output Resistance (Cold)
ROUT_COLD
VIN = 48V, IOUT = 12.5A, TC = –40ºC
38.8
mΩ
Output Resistance (Ambient)
ROUT_AMB
VIN = 48V, IOUT = 12.5A
51.4
mΩ
Output Resistance (Hot)
ROUT_HOT
VIN = 48V, IOUT = 12.5A, TC = 100ºC
59.0
mΩ
Output Voltage Ripple
VOUT_PP
COUT = 0F, IOUT = 12.5A, VIN = 48V, 20MHz BW
153.8
mV
VOUT Transient (Positive)
VOUT_TRAN+
IOUT_STEP = 0 – 12.5A, VIN = 48V, ISLEW = 17A/µs
700
mV
VOUT Transient (Negative)
VOUT_TRAN–
IOUT_STEP = 12.5 – 0A, VIN = 48V, ISLEW = 212A/µs
700
mV
98
15
Full-Load Efficiency (%)
No-Load Power Dissipation (W)
No-Load Power Dissipation
13
11
9
7
5
3
29
32
35
38
41
43
46
49
52
96
95
94
93
92
–40
1
26
97
55
–20
TCASE:
–40°C
25°C
VIN:
100°C
Figure 1 — No load power dissipation vs. Vin
20
40
60
80
100
26V
48V
12
14
55V
Figure 2 — Full load efficiency vs. temperature
20
94
18
Power Dissipation (W)
97
91
Efficiency (%)
0
Case Temperature (°C)
Input Voltage (V)
88
85
82
79
76
73
70
16
14
12
10
8
6
4
2
0
0
2
4
6
8
10
12
14
0
2
Load Current (A)
VIN:
26V
Figure 3 — Efficiency at –40°C
VTM™ Current Multiplier
Page 7 of 20
48V
4
6
8
10
Load Current (A)
55V
VIN:
26V
48V
Figure 4 — Power dissipation at –40°C
Rev 1.8
11/2021
55V
VTM48Ex240y012A00
Application Characteristics (Cont.)
98
18
96
16
Power Dissipation (W)
Efficiency (%)
The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures for general trend data.
94
92
90
88
86
84
82
80
0
2
4
6
8
10
12
14
12
10
8
6
4
2
0
14
0
Load Current (A)
VIN:
26V
48V
4
6
55V
VIN:
10
12
14
26V
48V
12
14
11 12
13
55V
Figure 6 — Power dissipation at 25°C
18
16
Power Dissipation (W)
98
96
94
92
90
88
86
84
82
14
12
10
8
6
4
2
0
0
2
4
6
8
10
12
14
0
2
4
6
Load Current (A)
VIN:
26V
8
10
Load Current (A)
48V
55V
VIN:
Figure 7 — Efficiency at 100°C
26V
48V
55V
Figure 8 — Power dissipation at 100°C
160
70
140
60
VRIPPLE (mVPK-PK)
Output Resistance (mΩ)
8
Load Current (A)
Figure 5 — Efficiency at 25°C
Efficiency (%)
2
50
40
30
20
–40
120
100
80
60
40
20
0
–20
0
20
40
60
80
0
100
VIN:
Full Load
VTM™ Current Multiplier
Page 8 of 20
2
3
4
5
6
7
8
9
10
Load Current (A)
Case Temperature (°C)
Figure 9 — Rout vs. temperature
1
26V
48V
55V
Figure 10 — Vripple vs. Iout; No external Cout. Board mounted
module, scope setting: 20MHz analog BW
Rev 1.8
11/2021
VTM48Ex240y012A00
Application Characteristics (Cont.)
The following values, typical of an application environment, are collected at TC = 25ºC unless otherwise noted. See associated figures for general trend data.
20
CH1
Output Current (A)
18
16
10ms max
14
12
Continuous
10
8
CH2
6
4
2
0
0
4
8
12
16
20
24
28
Output Voltage (V)
Figure 11 — Safe operating area
CH1 VOUT: 100mV/div
CH2 IIN: 200mA/div
Timebase: 500ns/div
Figure 12 — Full load ripple, 100µF Cin; No external Cout. Boardmounted module, scope setting: 20MHz analog BW
CH1
CH1
CH2
CH2
CH3
CH3
CH1 VIN: 20V/div
CH2 VOUT: 10V/div
CH4
CH3 IIN: 2A/div
Timebase: 20ms/div
CH1 VVC: 10V/div
CH2 VPC: 5V/div
CH3 VOUT: 20V/div
CH4 IIN: 5A/div
Figure 13 — Start up from application of Vin;
VC pre-applied Cout = 375µF
Figure 14 — Start up from application of VC;
Vin pre-applied Cout = 375µF
Figure 15 — 0A – Full load transient response:
Cin = 100µF, no external Cout
Figure 16 — Full load – 0A transient response:
Cin = 100µF, no external Cout
VTM™ Current Multiplier
Page 9 of 20
Rev 1.8
11/2021
Timebase: 1ms/div
VTM48Ex240y012A00
General Characteristics
Specifications apply over all line and load conditions unless otherwise noted; boldface specifications apply over the temperature range of
–40ºC < TJ < 125 ºC (T-Grade). All Other specifications are at TJ = 25°C unless otherwise noted.
Attribute
Symbol
Conditions / Notes
Min
Typ
Max
Unit
Mechanical
Length
L
32.25 [1.270]
32.5 [1.280]
32.75 [1.289]
mm [in]
Width
W
21.75 [0.856]
22.0 [0.866]
22.25 [0.876]
mm [in]
6.48 [0.255]
6.73 [0.265]
6.98 [0.275]
Height
H
Volume
Vol
Weight
W
Lead Finish
No heat sink
cm3 [in3]
15.0 [0.53]
g [oz]
Nickel
0.51
2.03
Palladium
0.02
0.15
0.003
0.051
VTM48EF240T012A00 (T-Grade)
–40
125
VTM48EF240M012A00 (M-Grade)
–55
125
VTM48ET240T012A00 (T-Grade)
–40
125
VTM48ET240M012A00 (M-Grade)
–55
125
Gold
mm [in]
4.81 [0.294]
µm
Thermal
Operating Temperature
Thermal Resistance
TJ
θJC
Isothermal heatsink and isothermal
internal PCB
Thermal Capacity
°C
1
°C / W
5
Ws / °C
Assembly
Peak Compressive Force
Applied to Case (Z-Axis)
Storage Temperature
Supported by J-Lead only
TST
lbs
5.41
lbs / in2
VTM48EF240T012A00 (T-Grade)
–40
125
VTM48EF240M012A00 (M-Grade)
–65
125
VTM48ET240T012A00 (T-Grade)
–40
125
VTM48ET240M012A00 (M-Grade)
–65
125
ESDHBM
Human Body Model,
JEDEC JESD 22-A114-F
1000
ESDCDM
Charge Device Model,
JEDEC JESD 22-C101-D
400
ESD Withstand
6
°C
VDC
Soldering
Peak Temperature During Reflow
RoHS
245
Non-RoHS
225
Peak Time Above Liquidus
Requires AN:009 compliance
60
Peak Heating Rate During Reflow
Requires AN:009 compliance
1
Peak Cooling Rate Post Reflow
Requires AN:009 compliance
1
°C
90
s
1.5
3
°C / s
1.5
6
°C / s
Safety
Isolation Voltage (Hipot)
VHIPOT
Isolation Capacitance
CIN_OUT
Isolation Resistance
RIN_OUT
MTBF
Agency Approvals / Standards
2250
Unpowered unit
2500
VDC
3200
10
3800
pF
MΩ
MIL-HDBK-217 Plus Parts Count;
25ºC Ground Benign, Stationary,
Indoors / Computer Profile
3.8
MHrs
Telcordia Issue 2 - Method I Case 1;
Ground Benign, Controlled
5.7
MHrs
cTÜVus
CE Marked for Low Voltage Directive and RoHS Recast Directive, as applicable
VTM™ Current Multiplier
Rev 1.8
Page 10 of 20 11/2021
VTM48Ex240y012A00
Using the Control Signals VC, PC, TM
Start-Up Behavior
The VTM Control (VC) pin is an input pin which powers the
internal VCC circuitry when within the specified voltage range of
11.5 – 16.5V. This voltage is required for VTM current multiplier
start up and must be applied as long as the input is below 26V. In
order to ensure a proper start, the slew rate of the applied voltage
must be within the specified range.
Depending on the sequencing of the VC with respect to the input
voltage, the behavior during start up will vary as follows:
Some additional notes on the using the VC pin:
n
In most applications, the VTM module will be powered by an
upstream PRM™ regulator which provides a 10ms VC pulse
during start up. In these applications the VC pins of the PRM
regulator and VTM current multiplier should be tied together.
n
The VC voltage can be applied indefinitely allowing for
continuous operation down to 0VIN.
n
The fault response of the VTM module is latching. A
positive edge on VC is required in order to restart the unit. If VC
is continuously applied the PC pin may be toggled to restart the
VTM module.
Primary Control (PC) pin can be used to accomplish the
following functions:
n
Delayed start: Upon the application of VC, the PC pin will
source a constant 100µA current to the internal RC network.
Adding an external capacitor will allow further delay in reaching
the 2.5V threshold for module start.
n
Auxiliary voltage source: Once enabled in regular operational
conditions (no fault), each VTM PC provides a regulated 5V,
2mA voltage source.
n
Output disable: PC pin can be actively pulled down in order
to disable the module. Pull-down impedance shall be lower
than 400Ω.
n
Normal operation (VC applied prior to Vin ): In this case the
controller is active prior to ramping the input. When the input
voltage is applied, the VTM module output voltage will track
the input (See Figure 13). The inrush current is determined by
the input voltage rate of rise and output capacitance. If the VC
voltage is removed prior to the input reaching 26V, the VTM may
shut down.
n
Stand-alone operation (VC applied after Vin ): In this case
the VTM output will begin to rise upon the application of the VC
voltage (See Figure 14). The Adaptive Soft-Start Circuit may vary
the output rate of rise in order to limit the inrush current to its
maximum level. When starting into high capacitance or a short,
the output current will be limited for a maximum of 1200µs.
After this period, the Adaptive Soft-Start Circuit will time out and
the VTM module may shut down. No restart will be attempted
until VC is re‑applied or PC is toggled. The maximum output
capacitance is limited to 375µF in this mode of operation to
ensure a sucessful start.
Thermal Considerations
VI Chip® products are multi-chip modules whose temperature
distribution varies greatly for each part number as well as with the
input /output conditions, thermal management and environmental
conditions. Maintaining the top of the VTM48EF240T012A00 case
to less than 100ºC will keep all junctions within the VI Chip module
below 125ºC for most applications.
n
Fault detection flag: The PC 5V voltage source is internally
turned off as soon as a fault is detected. It is important to notice
that PC doesn’t have current sink capability. Therefore, in an
array, PC line will not be capable of disabling neighboring
modules if a fault is detected.
The percent of total heat dissipated through the top surface
versus through the J-lead is entirely dependent on the particular
mechanical and thermal environment. The heat dissipated through
the top surface is typically 60%. The heat dissipated through
the J-lead onto the PCB board surface is typically 40%. Use
100% top surface dissipation when designing for a conservative
cooling solution.
n
Fault reset: PC may be toggled to restart the unit if VC is
continuously applied.
It is not recommended to use a VI Chip module for an extended
period of time at full load without proper heat sinking.
Temperature Monitor (TM) pin provides a voltage proportional
to the absolute temperature of the converter control IC.
It can be used to accomplish the following functions:
n
Monitor the control IC temperature: The temperature in
Kelvin is equal to the voltage on the TM pin scaled by 100.
(i.e., 3.0V = 300K = 27ºC). If a heat sink is applied, TM can be
used to thermally protect the system.
n
Fault detection flag: The TM voltage source is internally turned
off as soon as a fault is detected. For system monitoring
purposes (microcontroller interface) faults are detected on falling
edges of TM signal.
VTM™ Current Multiplier
Rev 1.8
Page 11 of 20 11/2021
VTM48Ex240y012A00
Sine Amplitude Converter™ Point-of-Load Conversion
The Sine Amplitude Converter (SAC) uses a high-frequency
resonant tank to move energy from input to output. (The resonant
tank is formed by Cr and leakage inductance Lr in the power
transformer windings.) The resonant LC tank, operated at high
frequency, is amplitude modulated as a function of input voltage
and output current. A small amount of capacitance embedded
in the input and output stages of the module is sufficient for full
functionality and is key to achieving power density.
The VTM48EF240T012A00 SAC can be simplified into the
following model:
2000pH
+
RCCIN
IN
2.2mΩ
VVIN
IN
CIN
CIN
2µF
ROUT
ROUT
43.4mΩ
IOUT
IOUT
LIN = 0.6nH
1/2 • IOUT
IQIQ
123mA
+
–
K
+
R
RCC
OUT
OUT
0.006Ω
V•I
+
LOUT = 600pH
417µΩ
1/2 • VIN
COUT
COUT
12µF
OUT
VVOUT
–
–
–
Figure 17 — VI Chip® module AC model
At no load:
VOUT = VIN • K
(1)
K represents the “turns ratio” of the SAC.
Rearranging Equation 1:
K=
VOUT
The use of DC voltage transformation provides additional
interesting attributes. Assuming that ROUT = 0Ω and IQ = 0A,
Equation 3 now becomes Equation 1 and is essentially load
independent, resistor R is now placed in series with VIN as
shown in Figure 18.
(2)
VIN
RIN
In the presence of load, VOUT is represented by:
VOUT = VIN • K – IOUT • ROUT
VIN
IOUT =
K
SAC™
K = 1/32
VOUT
(3)
and IOUT is represented by:
IIN – IQ
+
–
(4)
ROUT represents the impedance of the SAC, and is a function of the
RDSON of the input and output MOSFETs and the winding resistance
of the power transformer. IQ represents the quiescent current of the
SAC control and gate drive circuitry.
Figure 18 — K = 1/32 Sine Amplitude Converter™
with series input resistor
The relationship between VIN and VOUT becomes:
VOUT = (VIN – IIN • R) • K
(5)
Substituting the simplified version of Equation 4
(IQ is assumed = 0A) into Equation 5 yields:
VOUT = VIN • K – IOUT • R • K2
VTM™ Current Multiplier
Rev 1.8
Page 12 of 20 11/2021
(6)
VTM48Ex240y012A00
This is similar in form to Equation 3, where ROUT is used to
represent the characteristic impedance of the SAC™. However, in
this case a real R on the input side of the SAC is effectively scaled
by K 2 with respect to the output.
Assuming that R = 1Ω, the effective R as seen from the secondary
side is 0.98mΩ, with K = 1/32 as shown in Figure 18.
A similar exercise should be performed with the additon of a
capacitor or shunt impedance at the input to the SAC. A switch in
series with VIN is added to the circuit. This is depicted in Figure 19.
S
VIN
+
–
C
SAC™
K = 1/32
VOUT
Low impedance is a key requirement for powering a high‑current,
low‑voltage load efficiently. A switching regulation stage
should have minimal impedance while simultaneously providing
appropriate filtering for any switched current. The use of a SAC
between the regulation stage and the point-of-load provides a
dual benefit of scaling down series impedance leading back to
the source and scaling up shunt capacitance or energy storage
as a function of its K factor squared. However, the benefits are
not useful if the series impedance of the SAC is too high. The
impedance of the SAC must be low, i.e., well beyond the crossover
frequency of the system.
A solution for keeping the impedance of the SAC low involves
switching at a high frequency. This enables small magnetic
components because magnetizing currents remain low. Small
magnetics mean small path lengths for turns. Use of low-loss core
material at high frequencies also reduces core losses.
The two main terms of power loss in the VTM module are:
n
No load power dissipation (PNL): defined as the power used to
power up the module with an enabled powertrain at no load.
n
Resistive loss (ROUT): refers to the power loss across the VTM
modeled as pure resistive impedance.
Figure 19 — Sine Amplitude Converter™ with input capacitor
PDISSIPATED = PNL + PR
A change in VIN with the switch closed would result in a change in
capacitor current according to the following equation:
IC (t) = C
dVIN
(7)
dt
Therefore,
POUT = PIN – PDISSIPATED = PIN – PNL – PR
OUT
Assume that with the capacitor charged to VIN, the switch is
opened and the capacitor is discharged through the idealized
SAC. In this case,
IC = IOUT • K
C
(8)
K2
•
dVOUT
dt
(11)
The above relations can be combined to calculate the overall
module efficiency:
η=
Substituting Equations 1 and 8 into Equation 7 reveals:
IOUT =
(10)
OUT
(9)
The equation in terms of the output has yielded a K 2 scaling factor
for C, specified in the denominator of the equation. A K factor less
than unity results in an effectively larger capacitance on the output
when expressed in terms of the input. With a K = 1/32 as shown
in Figure 19, C = 1µF would appear as C = 1024µF when viewed
from the output.
VTM™ Current Multiplier
Rev 1.8
Page 13 of 20 11/2021
=
POUT
PIN
=
PIN – PNL – PR
PIN
OUT
VIN • IIN – PNL – (IOUT)2 • ROUT
=1–
VIN • IIN
(
)
PNL + (IOUT)2 • ROUT
VIN • IIN
(12)
VTM48Ex240y012A00
Input and Output Filter Design
A major advantage of a SAC system versus a conventional PWM
converter is that the former does not require large functional
filters. The resonant LC tank, operated at extreme high frequency,
is amplitude modulated as a function of input voltage and output
current and efficiently transfers charge through the isolation
transformer. A small amount of capacitance embedded in the input
and output stages of the module is sufficient for full functionality
and is key to achieving high power density.
This paradigm shift requires system design to carefully evaluate
external filters in order to:
n
Guarantee low source impedance:
To take full advantage of the VTM module dynamic response,
the impedance presented to its input terminals must be low
from DC to approximately 5MHz. Input capacitance may be
added to improve transient performance or compensate for high
source impedance.
n
Further reduce input and/or output voltage ripple
without sacrificing dynamic response:
Given the wide bandwidth of the VTM module, the source
response is generally the limiting factor in the overall system
response. Anomalies in the response of the source will appear at
the output of the VTM module multiplied by its K factor.
n
Protect the module from overvoltage transients
imposed by the system that would exceed maximum
ratings and cause failures:
The VI Chip® module input/output voltage ranges must not be
exceeded. An internal overvoltage lockout function prevents
operation outside of the normal operating input range. Even
during this condition, the powertrain is exposed to the applied
voltage and power MOSFETs must withstand it.
Capacitive Filtering Considerations
for a Sine Amplitude Converter™
It is important to consider the impact of adding input and output
capacitance to a Sine Amplitude Converter on the system as a
whole. Both the capacitance value and the effective impedance of
the capacitor must be considered.
A Sine Amplitude Converter has a DC ROUT value which has
already been discussed on Page 12. The AC ROUT of the SAC
contains several terms:
n
Resonant tank impedance
n
Input lead inductance and internal capacitance
n
Output lead inductance and internal capacitance
The values of these terms are shown in the behavioral model in
Page 12. It is important to note on which side of the transformer
these impedances appear and how they reflect across the
transformer given the K factor.
The overall AC impedance varies from model to model. For most
models it is dominated by DC ROUT value from DC to beyond
500kHz. The behavioral model on Page 12 should be used to
approximate the AC impedance of the specific model.
Any capacitors placed at the output of the VTM module reflect
back to the input of the module by the square of the K factor
(Equation 9) with the impedance of the module appearing in series.
It is very important to keep this in mind when using a PRM™
regulator to power the VTM module. Most PRM modules have a
limit on the maximum amount of capacitance that can be applied
to the output. This capacitance includes both the PRM output
capacitance and the VTM module output capacitance reflected
back to the input. In PRM module remote-sense applications,
it is important to consider the reflected value of VTM module
output capacitance when designing and compensating the PRM
module control loop.
Capacitance placed at the input of the VTM module appear to
the load reflected by the K factor with the impedance of the VTM
module in series. In step-down ratios, the effective capacitance
is increased by the K factor. The effective ESR of the capacitor is
decreased by the square of the K factor, but the impedance of the
module appears in series. Still, in most step-down VTM modules
an electrolytic capacitor placed at the input of the module will
have a lower effective impedance compared to an electrolytic
capacitor placed at the output. This is important to consider when
placing capacitors at the output of the module. Even though the
capacitor may be placed at the output, the majority of the AC
current will be sourced from the lower impedance, which in most
cases will be the module. This should be studied carefully in any
system design using a module. In most cases, it should be clear that
electrolytic output capacitors are not necessary to design a stable,
well‑bypassed system.
VTM™ Current Multiplier
Rev 1.8
Page 14 of 20 11/2021
VTM48Ex240y012A00
Current Sharing
Reverse Operation
The SAC™ topology bases its performance on efficient transfer
of energy through a transformer without the need of closed‑loop
control. For this reason, the transfer characteristic can be
approximated by an ideal transformer with some resistive drop and
positive temperature coefficient.
The VTM48EF240T012A00 is capable of reverse operation. If
a voltage is present at the output which satisfies the condition
VOUT > VIN • K at the time the VC voltage is applied, or after the
unit has started, then energy will be transferred from secondary
to primary. The input-to-output ratio will be maintained. The
VTM48EF240T012A00 will continue to operate in reverse as
long as the input and output are within the specified limits. The
VTM48EF240T012A00 has not been qualified for continuous
operation (>10ms) in the reverse direction.
This type of characteristic is close to the impedance characteristic
of a DC power distribution system, both in behavior (AC dynamic)
and absolute value (DC dynamic).
When connected in an array with the same K factor, the VTM
module will inherently share the load current (typically 5%) with
parallel units according to the equivalent impedance divider that
the system implements from the power source to the point-of-load.
Some general recommendations to achieve matched
array impedances:
n
Dedicate common copper planes within the PCB to deliver and
return the current to the modules.
n
Provide the PCB layout as symmetric as possible.
n
Apply same input / output filters (if present) to each unit.
For further details see:
AN:016 Using BCM® Bus Converters in High Power Arrays.
VIN
ZIN_EQ1
–
ZOUT_EQ1
RO_1
ZIN_EQ2
+
VTM1
VTM2
VOUT
ZOUT_EQ2
RO_2
DC
Load
ZIN_EQn
VTMn
ZOUT_EQn
RO_n
Figure 20 — VTM module array
Fuse Selection
In order to provide flexibility in configuring power systems
VI Chip® products are not internally fused. Input line fusing
of VI Chip products is recommended at system level to provide
thermal protection in case of catastrophic failure.
The fuse shall be selected by closely matching system
requirements with the following characteristics:
n
Current rating
(usually greater than maximum current of VTM module)
n
Maximum voltage rating
(usually greater than the maximum possible input voltage)
n
Ambient temperature
n
Nominal melting I2t
VTM™ Current Multiplier
Rev 1.8
Page 15 of 20 11/2021
VTM48Ex240y012A00
J-Lead Package Mechanical Drawing
mm [inch]
NOTES:
NOTES:
mm
2. DIMENSIONS ARE mm
inch .
2. DIMENSIONS
ARE
.
inch
UNLESS OTHERWISE SPECIFIED,
TOLERANCES ARE:
SPECIFIED,
TOLERANCES
ARE:
3.UNLESS
.X / [.XX]OTHERWISE
= +/-0.25 / [.01];
.XX / [.XXX]
= +/-0.13 / [.005]
3.4..XPRODUCT
/ [.XX] = +/-0.25
/ [.01];ON
.XXTOP
/ [.XXX]
= +/-0.13 / [.005]
MARKING
SURFACE
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
DXF and PDF files are available on vicorpower.com
J-Lead Package Recommended Land Pattern
mm
2. DIMENSIONS ARE mm
inch .
2. DIMENSIONS
ARE inchSPECIFIED,
.
UNLESS OTHERWISE
TOLERANCES ARE:
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
3.4..XPRODUCT
/ [.XX] = +/-0.25
/ [.01];ON
.XXTOP
/ [.XXX]
= +/-0.13 / [.005]
MARKING
SURFACE
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
DXF and PDF files are available on vicorpower.com
VTM™ Current Multiplier
Rev 1.8
Page 16 of 20 11/2021
VTM48Ex240y012A00
Through-Hole Package Mechanical Drawing
mm [inch]
NOTES:
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
NOTES:
3.
.X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
mm
DXF and PDF files are available
on vicorpower.com
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
Through-Hole Package Recommended Land Pattern
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
mm
2. DIMENSIONS ARE inch .
UNLESS OTHERWISE SPECIFIED, TOLERANCES ARE:
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
3. .X / [.XX] = +/-0.25 / [.01]; .XX / [.XXX] = +/-0.13 / [.005]
4. PRODUCT MARKING ON TOP SURFACE
DXF and PDF files are available on vicorpower.com
VTM™ Current Multiplier
Rev 1.8
Page 17 of 20 11/2021
VTM48Ex240y012A00
Recommended Heat Sink Push Pin Location
(NO GROUNDING CLIPS)
(WITH GROUNDING CLIPS)
Notes:
1. Maintain 3.50 [0.138] Dia. keep-out zone
free of copper, all PCB layers.
2. (A) Minimum recommended pitch is 39.50 (1.555).
This provides 7.00 [0.275] component
edge-to-edge spacing, and 0.50 [0.020]
clearance between Vicor heat sinks.
(B) Minimum recommended pitch is 41.00 [1.614].
This provides 8.50 [0.334] component
edge-to-edge spacing, and 2.00 [0.079]
clearance between Vicor heat sinks.
3. VI Chip® module land pattern shown for reference
only; actual land pattern may differ.
Dimensions from edges of land pattern
to push–pin holes will be the same for
all full-size VI Chip® products.
5. Unless otherwise specified:
Dimensions are mm [inches]
tolerances are:
x.x (x.xx) = ±0.3 [0.01]
x.xx (x.xxx) = ±0.13 [0.005]
4. RoHS compliant per CST–0001 latest revision.
6. Plated through holes for grounding clips (33855)
shown for reference, heat sink orientation and
device pitch will dictate final grounding solution.
VTM Module Pin Configuration
4
3
2
+OUT
B
B
C
C
D
D
F
G
H
H
J
J
+OUT
–OUT
+IN
Signal Name
Pin Number
+IN
A1 – E1, A2 – E2
–IN
L1 – T1, L2 – T2
TM
H1, H2
VC
J1, J2
PC
K1, K2
+OUT
A3 – D3, A4 – D4, J3 – M3, J4 – M4
–OUT
E3 – H3, E4 – H4, N3 – T3, N4 – T4
E
E
–OUT
1
A
A
K
K
L
L
M
M
N
N
P
P
R
R
TM
VC
PC
–IN
T
T
Bottom View
VTM™ Current Multiplier
Rev 1.8
Page 18 of 20 11/2021
VTM48Ex240y012A00
Revision History
Revision
Date
1.7
01/05/21
Provided additional information to soldering guidelines
11/10/21
Revised VC IVC typical values, tON conditions/notes
Revised output resistance and output voltage ripple specifications
Revised figures 1 – 10, 12 – 14
1.8
Description
VTM™ Current Multiplier
Rev 1.8
Page 19 of 20 11/2021
Page Number(s)
10
4
7
7–9
VTM48Ex240y012A00
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accessory components, fully configurable AC-DC and DC-DC power supplies, and complete custom
power systems.
Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by Vicor for its use. Vicor
makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication. Vicor reserves
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Testing and other quality controls are used to the extent Vicor deems necessary to support Vicor’s product warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
Specifications are subject to change without notice.
Visit http://www.vicorpower.com/dc-dc-converters-board-mount/vtm for the latest product information.
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The products described on this data sheet are protected by the following U.S. Patents Numbers:
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VTM™ Current Multiplier
Rev 1.8
Page 20 of 20 11/2021
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