16TTS12SPBF

VS-16TTS..SPbF High Voltage Series Vishay Semiconductors Surface Mountable Phase Control SCR, 16 A FEATURES 2 Anode • Meets MSL level 1, per J-STD-020, LF maximum peak of 260 °C • Compliant to RoHS directive 2002/95/EC • Halogen-free according to IEC 61249-2-21 definition • Designed and qualified for industrial level D2PAK 1 Cathode 3 Gate APPLICATIONS • Input rectification (soft start) • Vishay input diodes, switches and output rectifiers which are available in identical package outlines PRODUCT SUMMARY VT at 10 A ITSM VRRM < 1.4 V 200 A 800 V/1200 V DESCRIPTION The VS-16TTS..SPbF High Voltage Series of silicon controlled rectifiers are specifically designed for medium power switching and phase control applications. The glass passivation technology used has reliable operation up to 125 °C junction temperature. OUTPUT CURRENT IN TYPICAL APPLICATIONS APPLICATIONS NEMA FR-4 or G-10 glass fabric-based epoxy with 4 oz. (140 μm) copper Aluminum IMS, RthCA = 15 °C/W Aluminum IMS with heatsink, RthCA = 5 °C/W Note • TA = 55 °C, TJ = 125 °C, footprint 300 mm2 SINGLE-PHASE BRIDGE 2.5 6.3 14.0 THREE-PHASE BRIDGE 3.5 9.5 18.5 A UNITS MAJOR RATINGS AND CHARACTERISTICS SYMBOL IT(AV) IRMS VRRM/VDRM ITSM VT dV/dt dI/dt TJ 10 A, TJ = 25 °C CHARACTERISTICS Sinusoidal waveform VALUES 10 16 800/1200 200 1.4 500 150 - 40 to 125 UNITS A V A V V/μs A/μs °C VOLTAGE RATINGS PART NUMBER VS-16TTS08SPbF VS-16TTS12SPbF VRRM, MAXIMUM PEAK REVERSE VOLTAGE V 800 1200 VDRM, MAXIMUM PEAK DIRECT VOLTAGE V 800 1200 IRRM/IDRM AT 125 °C mA 10 Document Number: 94589 Revision: 08-Jun-10 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com www.vishay.com 1 VS-16TTS..SPbF High Voltage Series Vishay Semiconductors ABSOLUTE MAXIMUM RATINGS PARAMETER Maximum average on-state current Maximum RMS on-state current Maximum peak, one-cycle, non-repetitive surge current Maximum I2t for fusing Maximum I2√t for fusing Maximum on-state voltage drop On-state slope resistance Threshold voltage Maximum reverse and direct leakage current Holding current Maximum latching current Maximum rate of rise of off-state voltage Maximum rate of rise of turned-on current SYMBOL IT(AV) IRMS ITSM I2t I2√t VTM rt VT(TO) IRM/IDM IH IL dV/dt dI/dt 10 ms sine pulse, rated VRRM applied 10 ms sine pulse, no voltage reapplied 10 ms sine pulse, rated VRRM applied 10 ms sine pulse, no voltage reapplied t = 0.1 ms to 10 ms, no voltage reapplied 10 A, TJ = 25 °C TJ = 125 °C TJ = 25 °C TJ = 125 °C VR = Rated VRRM/VDRM 200 500 150 V/μs A/μs TEST CONDITIONS TC = 98 °C, 180° conduction, half sine wave VALUES TYP. MAX. 10 16 170 200 144 200 2000 1.4 24.0 1.1 0.5 10 100 mA A2s A2√s V mΩ V A UNITS Surface Mountable Phase Control SCR, 16 A Anode supply = 6 V, resistive load, initial IT = 1 A Anode supply = 6 V, resistive load TRIGGERING PARAMETER Maximum peak gate power Maximum average gate power Maximum peak positive gate current Maximum peak negative gate voltage SYMBOL PGM PG(AV) + IGM - VGM Anode supply = 6 V, resistive load, TJ = - 10 °C Maximum required DC gate current to trigger IGT Anode supply = 6 V, resistive load, TJ = 25 °C Anode supply = 6 V, resistive load, TJ = 125 °C Anode supply = 6 V, resistive load, TJ = - 10 °C Maximum required DC gate voltage to trigger VGT VGD IGD Anode supply = 6 V, resistive load, TJ = 25 °C Anode supply = 6 V, resistive load, TJ = 125 °C Maximum DC gate voltage not to trigger Maximum DC gate current not to trigger TJ = 125 °C, VDRM = Rated value TEST CONDITIONS VALUES 8.0 2.0 1.5 10 90 60 35 3.0 2.0 1.0 0.25 2.0 mA V mA UNITS W A V SWITCHING PARAMETER Typical turn-on time Typical reverse recovery time Typical turn-off time SYMBOL tgt trr tq TJ = 25 °C TJ = 125 °C TEST CONDITIONS VALUES 0.9 4 110 μs UNITS www.vishay.com 2 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com Document Number: 94589 Revision: 08-Jun-10 VS-16TTS..SPbF High Voltage Series Surface Mountable Phase Control SCR, 16 A THERMAL - MECHANICAL SPECIFICATIONS PARAMETER Maximum junction and storage temperature range Soldering temperature Maximum thermal resistance, junction to case Typical thermal resistance, junction to ambient Approximate weight Case style D2PAK (SMD-220) SYMBOL TJ, TStg TS RthJC RthJA For 10 s (1.6 mm from case) DC operation PCB mount (1) TEST CONDITIONS VALUES - 40 to 125 240 1.3 °C/W 40 2 0.07 16TTS08S 16TTS12S g oz. UNITS °C Vishay Semiconductors Marking device Note (1) When mounted on 1" square (650 mm2) PCB of FR-4 or G-10 material 4 oz. (140 μm) copper 40 °C/W. For recommended footprint and soldering techniques refer to application note #AN-994. Maximum Allowable Case Temperature (°C) 120 115 110 105 100 95 90 0 2 16TTS.. Series R thJC (DC) = 1.3 °C/W Max imum Average On-state Power Loss (W) 125 18 16 14 12 10 8 6 4 2 0 0 1 2 3 4 5 6 7 8 9 10 11 Average On-state Current (A) Conduction Angle 180° 120° 90° 60° 30° RMS Limit Conduction Angle 30° 60° 90° 120° 180° 4 6 8 10 12 16TTS.. Series T J = 125°C Average On-state Current (A) Fig. 1 - Current Rating Characteristics Fig. 3 - On-State Power Loss Characteristics Max imum Average On-state Power Loss (W) 125 Maximum Allowable Case Temperature (°C) 120 115 Conduction Period 25 DC 180° 120° 90° 60° 30° 16TTS.. Series R thJC (DC) = 1.3 °C/W 20 110 105 100 95 90 0 2 4 6 8 10 12 14 16 Average On-state Current (A) 30° 15 RMS Limit 10 Conduction Period 60° 90° 120° 180° DC 5 16TTS.. Series TJ = 125°C 0 2 4 6 8 10 12 14 16 18 0 Average On-state Current (A) Fig. 2 - Current Rating Characteristics Fig. 4 - On-State Power Loss Characteristics Document Number: 94589 Revision: 08-Jun-10 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com www.vishay.com 3 VS-16TTS..SPbF High Voltage Series Vishay Semiconductors Surface Mountable Phase Control SCR, 16 A Peak Half Sine Wave Forward Current (A) 200 180 160 140 120 100 Peak Half Sine Wave On-state Current (A) 180 160 At Any Rated Load Condition And With Rated VRRM Applied Following Surge. Initial TJ = 125°C @ 60 Hz 0.0083 s @ 50 Hz 0.0100 s Maximum Non Repetitive Surge Current Versus Pulse Train Duration. Initial TJ = 125°C No Voltage Reapplied Rated V RRM Reapplied 140 120 100 16TTS..Series 80 1 10 100 Number Of Equal Amplitude Half C ycle Current Pulses (N) 16TTS.. Series 80 0.01 0.1 Pulse Train Duration (s) 1 Fig. 5 - Maximum Non-Repetitive Surge Current Fig. 6 - Maximum Non-Repetitive Surge Current 1000 16TTS.. Series Instantaneous On-state Current (A) 100 10 T J = 25°C TJ = 125°C 1 0 1 2 3 4 5 Instantaneous On-st ate Voltage (V) Fig. 7 - On-State Voltage Drop Characteristics Transient Thermal Impedance Z thJC (°C/W) 10 Steady State Value (DC Operation) 1 D = 0.50 D = 0.33 D = 0.25 D = 0.17 D = 0.08 Single Pulse 16TTS.. Series 0.1 0.01 0.0001 0.001 0.01 0.1 1 10 Square Wave Pulse Duration (s) Fig. 8 - Thermal Impedance ZthJC Characteristics www.vishay.com 4 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com Document Number: 94589 Revision: 08-Jun-10 VS-16TTS..SPbF High Voltage Series Surface Mountable Phase Control SCR, 16 A 100 Vishay Semiconductors Instantaneous Gate Voltage (V) Rectangular gate pulse a)Recommended load line for rated di/dt: 10 V, 20 ohms tr = 0.5 µs, tp >= 6 µs b)Recommended load line for = 6 µs (1) PGM = 40 , tp = 1 ms (2) PGM = 20 W, tp = 2 ms (3) PGM = 8 W, tp = 5 ms (4) PGM = 4 W, tp = 10 ms (a) (b) TJ = -10 °C TJ = 25 °C TJ = 125 °C 1 VGD IGD 0.1 0.001 0.01 (4) (3) (2) (1) 16TTS.. Series 0.1 1 Frequency Limited by PG(AV) 10 100 Instantaneous Gate Current (A) Fig. 9 - Gate Characteristics ORDERING INFORMATION TABLE Device code VS1 1 2 3 4 5 6 7 8 16 2 - T 3 T 4 S 5 12 6 S 7 TRL PbF 8 9 HPP product suffix Current rating Circuit configuration: T = Single thyristor Package: T = TO-220AC Type of silicon: S = Standard recovery rectifier Voltage rating: Voltage code x 100 = VRRM S = TO-220 D2PAK (SMD-220) version None = Tube TRL = Tape and reel (left oriented) TRR = Tape and reel (right oriented) 08 = 800 V 12 = 1200 V 9 - PbF = Lead (Pb)-free LINKS TO RELATED DOCUMENTS Dimensions Part marking information Packaging information www.vishay.com/doc?95046 www.vishay.com/doc?95054 www.vishay.com/doc?95032 Document Number: 94589 Revision: 08-Jun-10 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com www.vishay.com 5 Outline Dimensions Vishay Semiconductors D2PAK DIMENSIONS in millimeters and inches Conforms to JEDEC outline D2PAK (SMD-220) (2)(3) E (3) L1 4 (D1) (3) D H 1 L2 B B A 2 x b2 2xb 0.010 M A M B 2x e Gauge plane 0° to 8° Lead assignments Diodes 1. - Anode (two die)/open (one die) 2., 4. - Cathode 3. - Anode Lead tip L3 L L4 Detail “A” Rotated 90 °CW Scale: 8:1 A1 B Seating plane (b, b2) Section B - B and C - C Scale: None (c) c1 (4) ± 0.004 M B H C c E1 View A - A Plating (4) b1, b3 Base Metal (3) 2.64 (0.103) 2.41 (0.096) 2.32 MIN. (0.08) 2 3 (2) Detail A 17.90 (0.70) 15.00 (0.625) 3.81 MIN. (0.15) 9.65 MIN. (0.38) A A c2 A (E) B Pad layout 11.00 MIN. (0.43) SYMBOL A A1 b b1 b2 b3 c c1 c2 D MILLIMETERS MIN. 4.06 0.00 0.51 0.51 1.14 1.14 0.38 0.38 1.14 8.51 MAX. 4.83 0.254 0.99 0.89 1.78 1.73 0.74 0.58 1.65 9.65 INCHES MIN. 0.160 0.000 0.020 0.020 0.045 0.045 0.015 0.015 0.045 0.335 MAX. 0.190 0.010 0.039 0.035 0.070 0.068 0.029 0.023 0.065 0.380 NOTES SYMBOL D1 E E1 MILLIMETERS MIN. 6.86 9.65 7.90 14.61 1.78 1.27 4.78 MAX. 8.00 10.67 8.80 15.88 2.79 1.65 1.78 5.28 INCHES MIN. 0.270 0.380 0.311 0.575 0.070 0.050 0.188 MAX. 0.315 0.420 0.346 0.625 0.110 0.066 0.070 0.208 NOTES 3 2, 3 3 4 4 4 2 e H L L1 L2 L3 L4 2.54 BSC 0.100 BSC 3 0.25 BSC 0.010 BSC Notes (1) Dimensioning and tolerancing per ASME Y14.5 M-1994 (2) Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body (3) Thermal pad contour optional within dimension E, L1, D1 and E1 (4) Dimension b1 and c1 apply to base metal only (5) Datum A and B to be determined at datum plane H (6) Controlling dimension: inch (7) Outline conforms to JEDEC outline TO-263AB Document Number: 95046 Revision: 31-Mar-11 For technical questions within your region, please contact one of the following: www.vishay.com DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1