DG528, DG529
Vishay Siliconix
Latchable Single 8-Ch/Differential 4-Ch Analog Multiplexers
DESCRIPTION
The DG528 is an 8-channel single-ended analog multiplexer designed to connect one of eight inputs to a common output as determined by a 3-bit binary address (A0, A1, A2). DG529, a 4-channel dual analog multiplexer, is designed to connect one of four differential inputs to a common differential output as determined by its 2-bit binary address (A0, A1) logic. These analog multiplexers have on-chip address and control latches to simplify design in microprocessor based applications. Break-before-make switching action protects against momentary shorting of the input signals. The DG528/529 are built on the improved PLUS-40 CMOS process. A buried layer prevents latchup. The on chip TTL-compatible address latches simplify digital interface design and reduce board space in data acquisition systems, process controls, avionics, and ATE.
FEATURES
• Low RDS(on): 270 • 44 V Power Supply Rating • On-Board Address Latches • Break-Before-Make • Low Leakage - ID(on): 30 pA
BENEFITS
• Improved System Accuracy • Microporcessor Bus Compatible • Easily Interfaced • Reduced Crosstalk
APPLICATIONS
• Data Acquisition Systems • Automatic Test Equipment • Avionics and Military Systems • Medical Instrumentation
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG528
DG528
DG529
Dual-In-Line
A0 WR A0 EN VS1 S2 S3 S4 D 1 2 3 4 5 6 7 8 9 1 Latches Decoders/Drivers 18 17 16 15 14 13 12 11 0 RS A1 A2 GND V+ S5 S6 S7 S8 9 S4 EN V± S1 S2 S3 4 5 6 7 8
PLCC
WR A1 NC RS WR A0 EN Latches Decoders/Drivers 18 A2 17 GND 16 V+ 15 S5 14 S6 S3a 10 11 12 13 S8 NC S7 D S4a Da VS1a S2a 1 2 3 4 5 6 7 8 9
Dual-In-Line
18 17 Latches Decoders/Drivers 16 15 14 13 12 11 10 RS A1 GND V+ S1b S2b S3b S4b Db
3
2
1
20 19
Top View Top View Top View
Document Number: 70068 S11-1029–Rev. D, 23-May-11
www.vishay.com 1
This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG528, DG529
Vishay Siliconix
TRUTH TABLES AND ORDERING INFORMATION TRUTH TABLE - DG528
8-Channel Single-Ended Multiplexer A2 A1 A0 EN WR RS On Switch Maintains previous switch condition None (latches cleared) None 1 2 3 4 5 6 7 8 A0 Latching X X 1 X Reset X X 0 0 1 1 0 0 1 1 X X 0 1 0 1 0 1 0 1 X 0 1 1 1 1 1 1 1 1 X 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 X X 0 1 0 1 X 0 1 1 1 1 X 0 0 0 0 0 0 1 1 1 1 1 None (latches cleared) None 1 2 3 4 Transparent Operation X 1 Maintains previous switch condition Latching X Reset X X 0 0 0 0 1 1 1 1 Transparent Operation X
TRUTH TABLE - DG529
Differential 4-Channel Multiplexer EN WR RS On Switch
Logic "0" = VAL 0.8 V Logic "1" = VAH 2.4 V X = Don’t Care
ORDERING INFORMATION - DG528
Temp Range 0 °C to 70 °C - 25 °C to 85 °C - 55 °C to 125 °C 18-pin Cer DIP Package 18-pin Plastic DIP 20-pin PLCC Part Number DG528CJ DG528DN DG528BK DG528AK DG528AK/883 5962-8768901VA
ORDERING INFORMATION - DG529
Temp Range 0 °C to 70 °C - 25 °C to 85 °C - 55 °C to 125 °C Package 18-pin Plastic DIP 18-pin Cer DIP Part Number DG529CJ DG529BK DG529AK/883
ABSOLUTE MAXIMUM RATINGS
Parameter Voltages Referenced to VDigital Inputsa, VS, VD Current (Any Terminal Except S or D) Continuous Current, S or D Peak Current, S or D (Pulsed at 1 ms, 10 % duty cycle max) Storage Temperature (AK, BK Suffix) (CJ, DN Suffix) 18-pin Plastic DIPc Power Dissipation (Package)
b
Symbol V+ GND
Limit 44 25 (V-) - 2 to (V+) + 2 or 30 mA, whichever occurs first 30 20 40 - 65 to 150 - 65 to 125 470 900 800
Unit
V
mA
°C
18-pin CerDIP
e
d
mW
20-pin PLCC Notes: a. Signals on SX, DX or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. b. All leads soldered or welded to PC board. c. Derate 6.3 mW/°C above 75 °C. d. Derate 12 mW/°C above 75 °C. e. Derate 10 mW/°C above 75 °C.
www.vishay.com 2
Document Number: 70068 S11-1029–Rev. D, 23-May-11
This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG528, DG529
Vishay Siliconix
SPECIFICATIONSa
Test Conditions Unless Otherwise Specified V+ = 15 V, V- = - 15 V, WR = 0, RS = 2.4 V, VIN = 2.4 V, 0.8 µFf A Suffix B, C, D Suffix - 55 °C to 125 °C - 40 °C to 85 °C Temp.b Full Room Full Room Room Full DG528 DG529 DG528 DG529 Room Full Room Full Room Full Room Full Room Hot Room Hot Room Hot Room Room Room Room Room Room Room Room Room Room Full Full Full Full Room Room Typ.c Min.d - 15 270 6 ± 005 ± 0.015 ± 0.008 ± 0.03 ± 0.015 -1 - 50 - 10 - 200 - 10 - 100 - 10 - 200 - 10 - 100 - 10 - 30 10 30 - 10 - 30 1 1.5 1 µs - 10 - 30 1 50 10 200 10 100 10 200 10 100 -5 - 50 - 20 - 200 - 20 - 100 - 20 - 200 - 20 - 100 - 10 - 30 10 30 µA 5 50 20 200 20 100 20 200 20 100 Max.d 15 400 500 Min.d - 15 Max.d 15 450 550 Unit V %
Parameter Analog Switch Analog Signal Rangee Drain-Source On-Resistance Greatest Change in RDS(on) Between Channelsf Source Off Leakage Current
Symbol VANALOG RDS(on) RDS(on) IS(off)
VD = ± 10 V, IS = - 200 µA - 10 V < VS < 10 V VEN = 0 V, VD = ± 10 V V S = ± 10 V VEN = 0 V, VD = ± 10 V V S = ± 10 V VS = V D = ± 10 V VEN = 2.4 V
Drain Off Leakage Current
ID(off)
nA
Drain On Leakage Current Digital Control Logic Input Current
ID(on)
VA = 2.4 V IAH VA = 15 V IAL tTRANS tOPEN tON(EN,WR) tOFF(EN,RS) Q OIRR Cin CS(off) CD(off) VEN = 0 V, 2.4 V, VA = 0 V RS = 0 V, WR = 0 V See Figure 5 See Figure 4 See Figure 6 and 7 See Figure 6 and 8 VS = 0 V, Ry = 0 CL = 10 F VEN = 0 V, RL = 1 kCL = 15 pF VS = 7 VRMS, f = 500 kHz f = 1 MHz VEN = 0 V, VD = 0 V, f = 140 kHz DG528 VEN = 0 V, VD = 0 V f = 140 kHz DG529
- 0.002 0.006 - 0.002
Input Voltage High Logic Input Current Input Voltage Low Dynamic Characteristics Transition Time Break-Before-Make Interval EN and WR Turn-On Time EN and WR Turn-Off Time Charge Injection Off Isolation Logic Imput Capacitance Source Off Capacitance Drain Off Capacitance
0.6 0.2 1 0.4 4 68 2.5 5 25 12 300 180 30 500
pC dB
pF
Minimum Input Timing Requirements tW Write Pulse Width tS AX, EN Data Set Up time tH AX, EN Data Hold Time Reset Pulse Width tRS Power Supplies Positive Supply Current I+ Negative Supply Current I-
VS = 5 V, See Figure 3 VEN = VA = 0 V
300 180 30 500 2.5 2.5 - 1.5
ns
- 1.5
mA
Notes: a. Refer to PROCESS OPTION FLOWCHART. b. Room = 25 °C, Full = as determined by the operating temperature suffix. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. e. Guaranteed by design, not subject to production test. f. VIN = input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Document Number: 70068 S11-1029–Rev. D, 23-May-11
www.vishay.com 3
This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG528, DG529
Vishay Siliconix
TYPICAL CHARACTERISTICS (TA = 25 °C, unless noted)
500 RDS(on) – Drain-Source On-Resistance (Ω) TA = 25 °C 400 ± 7.5 V I S, I D (pA) - 20 ID(off) IS(off) ID(on)
0
300 ± 10 V
200
± 15 V
- 40 ± 15 V Supplies TA = 25
± 20 V 100 - 20 - 15 - 10 -5 0 5 10 15 20 VD – Drain Voltage (V) - 60 - 15 - 10 -5 0 5 10 15 VANALOG – Analog Voltage (V)
RDS(on) vs. VD and Power Supply
2.5 TA = 25 °C 2.0 3 I+, I- (mA) V T (V) 1.5 4
Leakage Currents vs. Analog Voltage
I+ 2
1.0
0.5
1
I-
0 0
0 ±5 ± 10 ± 15 ± 20 1k 10 k 100 k 1M V+, V- Positive and Negative Supplies (V) Toggle Frequency (Hz)
Input Switching Threshold vs. V+ and V- Supply Voltages
Supply Currents vs. Toggle Frequency
www.vishay.com 4
Document Number: 70068 S11-1029–Rev. D, 23-May-11
This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG528, DG529
Vishay Siliconix
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+ GND VREF V+ EN V+ VAX V+ VWR V+ VRS VV+ CLK RESET DO QO VV+ Dn Qn VV+ VLatches Level Shift Decode V-
S1
Sn
V+
D
Figure 1.
DETAILED DESCRIPTION
The internal structure of the DG528/DG529 includes a 5-V logic interface with input protection circuitry followed by a latch, level shifter, decoder and finally the switch constructed with parallel n- and p-channel MOSFETs (see Figure 1). The logic interface circuit compares the TTL input signal against a TTL threshold reference voltage. The output of the comparator feeds the data input of a D type latch. The level sensitive D latch continuously places the DX input signal on the QX output when the WR input is low, resulting in transparent latch operation. As soon as WR returns high, the latches hold the data last present on the DX input, subject to the minimum input timing requirements.
3V WR 0 tW tS 3V A0, A1, (A2) EN 0 tH 50 %
Following the latches the QX signals are level shifted and decoded to provide proper drive levels for the CMOS switches. This level shifting insures full on/off switch operation for any analog signal present between the V+ and V- supply rails. The EN pin is used to enable the address latches during the WR pulse. It can be hard-wired to the logic supply or to V+ if one of the channels will always be used (except during a reset) or it can be tied to address decoding circuitry for memory mapped operation. The RS pin is used as a master reset. All latches are cleared regardless of the state of any other latch or control line. The WR pin is used to transfer the state of the address control lines to their latches, except during a reset or when EN is low (see Truth Tables).
3V RS 0 tRS tOFF (RS) Switch Output VO 80 % 0 50 %
80 % 80 %
Figure 2.
Figure 3.
Document Number: 70068 S11-1029–Rev. D, 23-May-11
www.vishay.com 5
This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG528, DG529
Vishay Siliconix
TEST CIRCUITS
+ 15 V V+ All S and Da +5V tr < 20 ns tf < 20 ns 50 % 0V
+ 2.4 V
RS EN
Logic Input
3V
DG528 DG529
A0, A1, (A2) GND 50 Ω WR Db, D V300 Ω 35 pF Switch Output VO 0V tOPEN VO VS 80 %
- 15 V
Figure 4. Break-Before-Make
+ 15 V RS EN S2 - S 7 A0 A1 A2 GND 50 Ω - 15 V Switch Output + 15 V + 2.4 V RS EN A0 A1 GND 50 Ω - 15 V V+ S1b S1a - S 4a, Da S2b and S3b ± 10 V VS8 tTRANS S1 ON ± 10 V VO 35 pF tTRANS S8 ON VO 0V 10 % tr < 20 ns tf < 20 ns 50 % 0V 35 pF VS1 90 % V+ S1 ± 10 V
+ 2.4 V
DG528
WR V-
S8 D 300 Ω
± 10 V VO
Logic Input
3V
DG529
WR V-
S4b Db 300 Ω
Figure 5. Transition Time
www.vishay.com 6
Document Number: 70068 S11-1029–Rev. D, 23-May-11
This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG528, DG529
Vishay Siliconix
TEST CIRCUITS
+ 15 V V+ RS EN A0 A1 A2 GND 50 Ω WR VS1 -5V
+ 2.4 V
DG528
S2 - S 8
D 300 Ω
VO 35 pF Logic Input
3V 50 % 0V tON(EN) 0V
tr < 20 ns tf < 20 ns
- 15 V
tOFF(EN)
+ 15 V V+ RS EN A0 A1 GND 50 Ω WR V300 Ω - 15 V S1b -5V Switch Output VO VO 90 %
+ 2.4 V
DG529
S1a - S 4a, Da S2b - S 4b Db VO 35 pF
Figure 6. Enable tON/tOFF Time
+ 15 V V+
+ 2.4 V
EN A0, A1, (A2)
S1 or S1b Remaining Switches
+5V WR
3V 50 % 0V VO tON(WR) Switch Output 20 % 0V
RS
DG528
Db, D V300 W - 15 V 35 pF VO
DG529 WR GND
Figure 7. Write Turn-On Time tON(WR)
Document Number: 70068 S11-1029–Rev. D, 23-May-11
www.vishay.com 7
This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG528, DG529
Vishay Siliconix
TEST CIRCUITS
+ 15 V
+ 2.4 V
EN A0, A1, (A2)
V+
S1 or S1b Remaining Switches
+5V
3V RS 0V tOFF(RS) VO VO 35 pF Switch Output 0V 80 % 50 %
RS GND
DG528 DG529
WR
Db, D V300 W - 15 V
Figure 8. Reset Turn-Off Time tOFF(RS)
+ 15 V V+ S1 ± 15 V Analog Inputs
Data Bus
A0, A1, A2 , EN
Processor System Bus
DG528
RESET +5V WRITE Address Bus Address Decoder D V- 15 V WR S8 RS
Analog Output
Figure 9. Bus Interface
www.vishay.com 8
Document Number: 70068 S11-1029–Rev. D, 23-May-11
This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG528, DG529 Vishay General Semiconductor
APPLICATION HINTSa
V+ Positive Supply Voltage (V) 20 15b 8c VNegative Supply Voltage (V) - 20 - 15 - 8 (min) VIN Logic Input Voltage VINH(min)/VINL(max) (V) 2.4/0.8 2.4/0.8 2.4/0.8 V S or V D Analog Voltage Range (V) ± 20 ± 15 ±8
Notes: a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing. b. Electrical Parameter Chart based on V+ = 15 V, V- = - 15 V, VR = GND. c. Operation below ± 8 V is not recommended.
The DG528/DG529 minimize the amount of interface hardware between a microprocessor system bus and the analog system being controlled or measured. The internal TTL compatible latches give these multiplexers write-only memory, that is, they can be programmed to stay in a particular switch state (e.g., switch 1 on) until the microprocessor determines it is necessary to turn different switches on or turn all switches off (see Figure 9). The input latches become transparent when WR is held low; therefore, these multiplexers operate by direct command of the coded switch state on A2, A1, A0. In this mode the DG528 is identical to the popular DG508A. The same is true of the DG529 versus the popular DG509A.
During system power-up, RS would be low, maintaining all eight switches in the off state. After RS returned high the DG528 maintains all switches in the off state. When the system program performs a write operation to the address assigned to the DG528, the address decoder provides a CS active low signal which is gated with the WRITE (WR) control signal. At this time the data on the DATA BUS (that will determine which switch to close) is stabilizing. When the WR signal returns to the high state, (positive edge) the input latches of the DG528 save the data from the DATA BUS. The coded information in the A0, A1, A2 and EN latches is decoded and the appropriate switch is turned on. The EN latch allows all switches to be turned off under program control. This becomes useful when two or more DG528s are cascaded to build 16-line and larger multiplexers.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?70068.
Document Number: 70068 S11-1029–Rev. D, 23-May-11
www.vishay.com 9
This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
CERDIP: 18 LEAD
18
E1 E
1
2
3
D S Q1
A A1 L1 L
e1 B1 B
C eA
∝
MILLIMETERS Dim A A1 B B1 C D E E1 e1 eA L L1 Q1 S Min
4.06 0.51 0.38 1.14 0.20 22.35 7.62 6.60
INCHES Min
0.160 0.020 0.015 0.045 0.008 0.880 0.300 0.260
Max
5.08 1.14 0.51 1.65 0.30 22.86 8.26 7.62
Max
0.200 0.045 0.020 0.065 0.012 0.900 0.325 0.300
2.54 BSC 7.62 BSC 3.18 3.81 1.27 0.76 0° 3.81 5.08 2.16 1.52 15°
0.100 BSC 0.300 BSC 0.125 0.150 0.050 0.030 0° 0.150 0.200 0.085 0.060 15°
∝
ECN: S-03946—Rev. D, 09-Jul-01 DWG: 5313
Document Number: 71231 02-Jul-01
www.vishay.com
1
Package Information
Vishay Siliconix
PLCC: 2O LEAD
D–SQUARE D1–SQUARE B1
A2
MILLIMETERS Dim A A1 A2 B B1 D D1 D2 e1 Min
4.20 2.29 0.51 0.331 0.661 9.78 8.890 7.37
INCHES Min
0.165 0.090 0.020 0.013 0.026 0.385 0.350 0.290
Max
4.57 3.04 – 0.553 0.812 10.03 9.042 8.38
Max
0.180 0.120 – 0.021 0.032 0.395 0.356 0.330
B e1 D2
1.27 BSC
0.050 BSC
A1 A
ECN: S-03946—Rev. C, 09-Jul-01 DWG: 5306
0.101 mm 0.004″
Document Number: 71263 02-Jul-01
www.vishay.com
1
Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other disclosure relating to any product. Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special, consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular purpose, non-infringement and merchantability. Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular product with the properties described in the product specification is suitable for use in a particular application. Parameters provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All operating parameters, including typical parameters, must be validated for each customer application by the customer’s technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein. Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the Vishay product could result in personal injury or death. Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 11-Mar-11
www.vishay.com 1
