BRT23F-X007

BRT21/ 22/ 23 Vishay Semiconductors Optocoupler, Phototriac Output, Zero Crossing Features • • • • High Input Sensitivity IFT = 1.0 mA ITRMS = 300 mA High Static dv/dt 10,000 V/µs Electrically Insulated between Input and Output circuit • Microcomputer compatible • Trigger Current - (IFT < 1.2 mA) BRT22F, BRT23F, - (IFT < 2 mA) BRT21H, BRT22H, BRT23H - (IFT < 3 mA) BRT21M, BRT22M, BRT23M • • • • • Available Surface Mount and on on tape and reel Zero Voltage Crossing detector UL File E52744 System Code "J" Lead-free component Component in accordance to RoHS 2002/95/EC and WEEE 2002/96/EC A1 C2 NC 3 17223 6 MT2 5 ZCC* NC 4 MT1 *Zero Crossing Circuit Order Information Part BRT21H BRT21M BRT22F BRT22H Remarks VDRM ≤ 400 V, DIP-6, 2.0 mA IFT VDRM ≤ 400 V, DIP-6, 3.0 mA IFT VDRM ≤ 600 V, DIP-6, 1.2 mA IFT VDRM ≤ 600 V, DIP-6, 2.0 mA IFT VDRM ≤ 600 V, DIP-6, 3.0 mA IFT VDRM ≤ 800 V, DIP-6, 1.2 mA IFT VDRM ≤ 800 V, DIP-6, 2.0 mA IFT VDRM ≤ 800 V, DIP-6, 3.0 mA IFT VDRM ≤ 400 V, DIP-6 400 mil (option 6), 2.0 mA IFT VDRM ≤ 400 V, SMD-6 (option 7), 2.0 mA IFT VDRM ≤ 400 V, DIP-6 400 mil (option 6), 3.0 mA IFT VDRM ≤ 600 V, SMD-6 (option 7), 1.2 mA IFT Applications • Industrial controls • Office equipment • Consumer appliances BRT22M BRT23F BRT23H BRT23M Description The BRT21, BRT22, BRT23 product family consists of AC switch optocouplers with zero voltage detectors with two electrically insulated lateral power ICs which integrate a thyrister system, a photo detector and noise suppression at the output and an IR GaAs diode input High input sensitivity is achieved by using an emitter follower phototransistor and an SCR predriver resulting in an LED trigger current of less than 2 mA or 3 mA (DC). Inverse parallel SCRs provide commutating dv/dt greater than 10 kV/µs The zero cross line voltage detection circuit consists of two MOSFETS and a photodiode. THe BRT21/ 22/ 23 product family isolates low-voltage logic from 120, 230 and 380 VAC lines to control resistive, inductive or capacitive loads including motors, solenoids, high current thyristers or TRIAC and relays. BRT21H-X006 BRT21H-X007 BRT21M-X006 BRT22F-X006 BRT22F-X0067 VDRM ≤ 600 V, SMD-6 (option 7), 1.2 mA IFT BRT22H-X007 BRT22M-X006 BRT23F-X006 BRT23F-X007 BRT23H-X006 BRT23H-X007 BRT23M-X006 BRT23M-X007 VDRM ≤ 600 V, SMD-6 (option 7), 2.0 mA IFT VDRM ≤ 600 V, DIP-6 400 mil (option 6), 3.0 mA IFT VDRM ≤ 800 V, DIP-6 400 mil (option 6), 1.2 mA IFT VDRM ≤ 800 V, DIP-6 400 mil (option 6), 1.2 mA IFT VDRM ≤ 800 V, DIP-6 400 mil (option 6), 2.0 mA IFT VDRM ≤ 800 V, SMD-6 (option 7), 2.0 mA IFT VDRM ≤ 800 V, DIP-6 400 mil (option 6), 3.0 mA IFT VDRM ≤ 800 V, SMD-6 (option 7), 3.0 mA IFT For additional information on the available options refer to Option Information. Document Number 83690 Rev. 1.4, 10-Jan-05 www.vishay.com 1 BRT21/ 22/ 23 Vishay Semiconductors Absolute Maximum Ratings Tamb = 25 °C, unless otherwise specified Stresses in excess of the absolute Maximum Ratings can cause permanent damage to the device. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of this document. Exposure to absolute Maximum Rating for extended periods of the time can adversely affect reliability. Input Parameter Reverse voltage Forward current Surge current Power dissipation Derate from 25 °C Test condition IR = 10 µA Symbol VR IF IFSM Pdiss Value 6.0 60 2.5 100 1.33 Unit V mA A mW mW/°C Output Parameter Peak off-state voltage Test condition ID(RMS) = 70 µA Part BRT21 BRT22 BRT23 RMS on-state current Single cycle surge current Power dissipation Derate from 25 °C Pdiss Symbol VDM VDM VDM ITM Value 400 600 800 300 3.0 600 6.6 Unit V V V mA A mW mW/°C Coupler Parameter Test condition Symbol VISO Value 5300 Unit VRMS Isolation test voltage (between t = 1.0 min. emitter and detector, climate per DIN 500414, part 2, Nov. 74) Pollution degree (DIN VDE 0109) Creepage Clearance Comparative tracking index per DIN IEC 112/VDE 0303 part 1, group IIIa per DIN VDE 6110 Isolation resistance VIO = 500 V, Tamb = 25 °C VIO = 500 V, Tamb = 100 °C Storage temperature range Ambient temperature range Soldering temperature max. ≤ 10 sec. dip soldering ≥ 0.5 mm from case bottom RIO RIO Tstg Tamb Tsld 2 ≥ 7.0 ≥ 7.0 ≥ 175 mm mm ≥ 1012 ≥ 1011 - 55 to + 150 - 55 to + 100 260 Ω Ω °C °C °C www.vishay.com 2 Document Number 83690 Rev. 1.4, 10-Jan-05 BRT21/ 22/ 23 Vishay Semiconductors Electrical Characteristics Tamb = 25 °C, unless otherwise specified Minimum and maximum values are testing requirements. Typical values are characteristics of the device and are the result of engineering evaluation. Typical values are for information only and are not part of the testing requirements. Input Parameter Forward voltage Reverse current Capacitance Thermal resistance, junction to ambient Test condition IF = 10 mA VR = 6.0 V VF = 0 V, f = 1.0 MHz Symbol VF IR CO Rthja Min Typ. 1.16 0.1 25 750 Max 1.35 10 Unit V µA pF K/W Output Parameter Off-state voltage Off-state current On-state voltage On-state current Surge (non-repetitive), on-state current Trigger current temp. gradient Inhibit voltage temp. gradient Off-state current in inhibit state Holding current Latching current Zero cross inhibit voltage Turn-on time Turn-off time Critical rate of rise of off-state voltage Critical rate of rise of voltage at current commutation VT = 2.2 V IF = Rated IFT VRM = VDM = VD(RMS) PF = 1.0, IT = 300 mA VD = 0.67 VDRM, TJ = 25 °C VD = 0.67 VDRM, TJ = 80 °C VD = 0.67 VDRM, di/dtcrq ≤ 15 A/ms, Tj = 25 °C VD = 0.67 VDRM, di/dtcrq ≤ 15 A/ms, Tj = 80 °C Critical rate of rise of on-state Thermal resistance, junction to ambient IF = IFT1, VDRM Test condition ID(RMS) = 70 µA VD = VDRM, Tamb = 100 °C, IF = 0 m A IT = 300 mA PF = 1.0, VT(RMS) = 1.7 V f = 50 Hz Symbol VD(RMS) VDRM ID(RMS) VTM ITM ITSM ∆IFT1/∆Tj ∆IFT2/∆Tj ∆VDINH/∆Tj IDINH IH IL VIH ton toff dv/dtcr dv/dtcr dv/dtcrq dv/dtcrq di/dtcr Rthja 10000 5000 10000 5000 8.0 125 7.0 7.0 -20 50 65 5.0 15 35 50 25 200 500 Min 424 600 10 1.7 100 3.0 300 3.0 14 14 Typ. 460 Max Unit V V µA V mA A µA/K µA/K mV/K µA µA mA V µs µs V/µs V/µs V/µs V/µs A/µs K/W Repetitive peak off-state voltage IDRM = 100 µA Document Number 83690 Rev. 1.4, 10-Jan-05 www.vishay.com 3 BRT21/ 22/ 23 Vishay Semiconductors Coupler Parameter Critical rate of rise of coupled input/output voltage Common mode coupling capacitance Capacitance (input-output) Isolation resistance f = 1.0 MHz, VIO = 0 V VIO = 500 V, Tamb = 25 °C VIO = 500 V, Tamb = 100 °C Trigger current VD = 5.0 V, F - Versions VD = 5.0 V, H - Versions VD = 5.0 V, M - Versions Test condition IT = 0 A, VRM = VDM = VD(RMS) Symbol dvIO/dt CCM CIO Ris Ris IFT IFT IFT Min Typ. 10000 0.01 0.8 ≥ 10 12 Max Unit V/µs pF pF Ω Ω ≥ 1011 1.2 2.0 3.0 mA mA mA Power Factor Considerations A snubber isn’t needed to eliminate false operation of the TRIAC driver because of the high static and commutating dv/dt with loads between 1.0 and 0.8 power factors. When inductive loads with power factors less than 0.8 are being driven, include a RC snubber or a single capacitor directly across the device to damp the peak commutating dv/ dt spike. Normally a commutating dv/dt causes a turning-off device to stay on due to the stored energy remaining in the turning-off device. But in the case of a zero voltage crossing optotriac, the commutating dv/dt spikes can inhibit one half of the TRIAC from turning on. If the spike potential exceeds the inhibit voltage of the zero cross detection circuit, half of the TRIAC will be heldoff and not turnon. This hold-off condition can be eliminated by using a snubber or capacitor placed directly across the optotriac as shown in Figure 1. Note that the value of the capacitor increases as a function of the load current. The hold-off condition also can be eliminated by providing a higher level of LED drive current. The higher LED drive provides a larger photocurrent which causes the phototransistor to turn-on before the commutating spike has activated the zero cross network. Figure 2 shows the relationship of the LED drive for power factors of less than 1.0. The curve shows that if a device requires 1.5 mA for a resistive load, then 1.8 times 2.7 mA) that amount would be required to control an inductive load whose power factor is less than 0.3. 1 Cs(µF) = 0.0032 (µF)* 10^(0.0066IL (mA) Cs - Shunt Capacitance - µF .1 .01 Ta = 25°C, PF = 0.3 IF = 2.0 mA .001 0 iil410_01 50 100 150 200 250 300 350 400 IL - Load Current - mA(RMS) Figure 1. Shunt Capacitance vs. Load Current www.vishay.com 4 Document Number 83690 Rev. 1.4, 10-Jan-05 BRT21/ 22/ 23 Vishay Semiconductors Typical Characteristics (Tamb = 25 °C unless otherwise specified) 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.0 iil410_02 IFth Normalized to IFth @ PF = 1.0 Ta = 25°C LED - LED Power - mW 150 NIFth - Normalized LED Trigger Current 100 50 0.2 0.4 0.6 0.8 PF - Power Factor 1.0 1.2 iil410_05 0 -60 -40 -20 0 20 40 60 Ta - Ambient Temperature - °C 80 100 Figure 2. Normalized LED Trigger Current vs. Power Factor Figure 5. Maximum LED Power Dissipation 1.4 1.3 VF - Forward Voltage - V Ta = -55°C 1.2 1.1 1.0 0.9 0.8 0.7 .1 1 10 IF - Forward Current - mA 100 iil410_06 Ta = 25°C IT = f(VT), parameter: Tj Ta = 85°C iil410_03 Figure 3. Forward Voltage vs. Forward Current Figure 6. Typical Output Characteristics 10000 If(pk) - Peak LED Current - mA τ Duty Factor .005 .01 .02 .05 .1 .2 .5 1000 t DF =τ/t ITRMS=f(TA), RthJA=150 K/W Device switch soldered in pcb or base plate. 100 10 10 -6 iil410_04 10 -5 10 -4 10 -3 10 -2 10 -1 t -LED Pulse Duration -s 10 0 101 iil410_07 Figure 4. Peak LED Current vs. Duty Factor, Tau Figure 7. Current Reduction Document Number 83690 Rev. 1.4, 10-Jan-05 www.vishay.com 5 BRT21/ 22/ 23 Vishay Semiconductors 40 to 60 Hz line operation, Ptot=f(ITRMS) ITRMS=f(TPIN5), RthJ–PIN5=16.5 K/W Thermocouple measurement must be performed potentially separated to A1 and A2. Measuring junction as near as possible at the case. iil410_08 iil410_11 Figure 8. Current Reduction Figure 11. Power Dissipation 40 to 60 Hz Line Operation tgd=f (IFIFT25°C), VD=200 V, f=40 to 60 Hz, parameter: Tj VDINHmin=f(IF/IFT25°C), parameter: Tj Device zero voltage switch can be triggered only in hatched area below Tj curves. iil410_09 iil410_12 Figure 9. Typical Trigger Delay Time Figure 12. Typical Static Inhibit Voltage Limit 1 6 2 5 0.1 µF 220 V~ 3 IDINH =f (IF/IFT25°C), VD=600 V, parameter: Tj 4 iil410_10 iil410_13 Figure 10. Typical Inhibit Current Figure 13. 1- Apply a Capacitor to the Supply Pins at the Load-Side www.vishay.com 6 Document Number 83690 Rev. 1.4, 10-Jan-05 BRT21/ 22/ 23 Vishay Semiconductors 33 Ω 1 6 1 6 500 µH 2 5 22 nF 220 V~ 2 5 22 nF 220 V~ 3 4 3 4 iil410_14 iil410_15 Figure 14. 2 - Connect a Series Resistor to the Output and Bridge Both by a Capacitor Figure 15. 3 - Connect a Choke of Low Winding Cap. in Series, e.g., a Ringcore Choke, with Higher Load Currents Technical Information See Application Note for additional information. Package Dimensions in Inches (mm) 3 .248 (6.30) .256 (6.50) 2 1 pin one ID ISO Method A 4 5 6 .335 (8.50) .343 (8.70) .048 (1.22) .052 (1.32) .130 (3.30) .150 (3.81) .0040 (.102) .0098 (.249) .375 (9.53) .395 (10.03) .300 (7.62) ref. .039 (1.00) Min. .012 (.30) typ. 4° typ . .018 (0.46) .020 (0.51) .033 (0.84) typ. .033 (0.84) typ. .100 (2.54) typ .020 (.51) .040 (1.02) 15ı max. 17222 Document Number 83690 Rev. 1.4, 10-Jan-05 www.vishay.com 7 BRT21/ 22/ 23 Vishay Semiconductors Option 6 .407 (10.36) .391 (9.96) .307 (7.8) .291 (7.4) .028 (0.7) MIN. Option 7 .300 (7.62) TYP . .180 (4.6) .160 (4.1) .315 (8.0) MIN. 18487 .014 (0.35) .010 (0.25) .400 (10.16) .430 (10.92) .331 (8.4) MIN. .406 (10.3) MAX. www.vishay.com 8 Document Number 83690 Rev. 1.4, 10-Jan-05 BRT21/ 22/ 23 Vishay Semiconductors Ozone Depleting Substances Policy Statement It is the policy of Vishay Semiconductor GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operatingsystems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs). The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. Vishay Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively. Vishay Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use Vishay Semiconductors products for any unintended or unauthorized application, the buyer shall indemnify Vishay Semiconductors against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. Vishay Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423 Document Number 83690 Rev. 1.4, 10-Jan-05 www.vishay.com 9