FA38SA50LCP
Vishay Semiconductors
Power MOSFET, 38 A
FEATURES
• Fully isolated package • Easy to use and parallel • Low on-resistance • Dynamic dV/dt rating • Fully avalanche rated
SOT-227
• Simple drive requirements • Low drain to case capacitance • Low internal inductance • UL pending • Compliant to RoHS directive 2002/95/EC
PRODUCT SUMMARY
VDSS RDS(on) ID Type Package 500 V 0.13 Ω 38 A Modules - MOSFET SOT-227
• Designed for industrial level
DESCRIPTION
Third Generation Power MOSFETs from Vishay HPP provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SOT-227 package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 500 W. The low thermal resistance of the SOT-227 contribute to its wide acceptance throughout the industry.
ABSOLUTE MAXIMUM RATINGS
PARAMETER Continuous drain current at VGS 10 V Pulsed drain current Power dissipation Linear derating factor Gate to source voltage Single pulse avalanche energy Avalanche current Repetitive avalanche energy Peak diode recovery dV/dt Operating junction and storage temperature range Insulation withstand voltage (AC-RMS) Mounting torque VGS EAS (2) IAR (1) EAR
(1)
SYMBOL ID IDM (1) PD
TEST CONDITIONS TC = 25 °C TC = 100 °C TC = 25 °C
MAX. 38 24 150 500 4.0 ± 20 580 38 50 10 - 55 to + 150 2.5
UNITS A
W W/°C V mJ A mJ V/ns °C kV Nm
dV/dt (3) TJ, TStg VISO M4 screw
1.3
Notes (1) Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) (2) Starting T = 25 °C, L = 0.80 mH, R = 25 Ω, I J g AS = 38 A (see fig. 12) (3) I SD ≤ 38 A, dI/dt ≤ 410 A/μs, VDD ≤ V(BR)DSS, TJ ≤ 150 °C
Document Number: 94547 Revision: 11-May-10
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FA38SA50LCP
Vishay Semiconductors
THERMAL RESISTANCE
PARAMETER Junction to case Case to sink, flat, greased surface SYMBOL RthJC RthCS TYP. 0.05 MAX. 0.25 UNITS °C/W
Power MOSFET, 38 A
ELECTRICAL CHARACTERISTCS (TJ = 25 °C unless otherwise noted)
PARAMETER Drain to source breakdown voltage Breakdown voltage temperature coefficient Static drain to source on-resistance Gate threshold voltage Forward transconductance Drain to source leakage current Gate to source forward leakage Gate to source reverse leakage Total gate charge Gate to source charge Gate to drain ("Miller") charge Turn-on delay time Rise time Turn-off delay time Fall time Internal source inductance Input capacitance Output capacitance Reverse transfer capacitance Note (1) Pulse width ≤ 300 μs, duty cycle ≤ 2 % SYMBOL V(BR)DSS ΔV(BR)DSS/ΔTJ RDS(on) (1) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LS Ciss Coss Crss TEST CONDITIONS VGS = 0 V, ID = 1.0 mA Reference to 25 °C, ID = 1 mA VGS = 10 V, ID = 23 A VDS = VGS, ID = 250 μA VDS = 25 V, ID = 23 A VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 °C VGS = 20 V VGS = - 20 V I D = 38 A VDS = 400 V VGS = 10 V; see fig. 6 and 13 (1) VDD = 250 V I D = 38 A Rg = 10 Ω (ιντερναλ) RD = 8 Ω, see fig. 10 (1) Between lead, and center of die contact VGS = 0 V VDS = 25 V f = 1.0 MHz, see fig. 5 MIN. 500 2.0 22 TYP. 0.66 280 37 150 42 340 200 330 5.0 6900 1600 580 MAX. 0.13 4.0 50 500 200 - 200 420 55 220 pF nH ns nC UNITS V V/°C Ω V S μA
nA
SOURCE-DRAIN RATINGS AND CHARACTERISTICS
PARAMETER Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage Reverse recovery time Reverse recovery charge Forward turn-on time SYMBOL IS ISM (1) VSD trr Qrr ton
(2)
TEST CONDITIONS
D
MIN. S
TYP. 830 15
MAX. 38
UNITS
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25 °C, IS = 38 A, VGS = 0 V
A
G
150 1.3 1300 22 V ns μC
-
TJ = 25 °C, IF = 38 A; dI/dt = 100 A/μs (2)
Intrinsic turn-on time is negligible (turn-on is dominated by LS + LD)
Notes Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11) (2) Pulse width ≤ 300 μs, duty cycle ≤ 2 %
(1)
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Document Number: 94547 Revision: 11-May-10
FA38SA50LCP
Power MOSFET, 38 A
Vishay Semiconductors
1000
TOP
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V
3.0
ID = 38A
2.5
100
2.0
1.5
10
4.5V
1.0
0.5
1 1 10
20μs PULSE WIDTH TC = 25°C
A
100
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VDS , Drain-to-Source Voltage (V)
TJ , Junction Temperature ( °C)
Fig. 1 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
1000
16000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
I D , Drain-to-Source Current (A)
14000
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
C, Capacitance (pF)
12000 10000
Ciss
8000 6000 4000
100
Coss Crss
4.5V
10 1 10
20μs PULSE WIDTH TJ = 150 °C
100
2000 0 1 10 100
VDS, Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
Fig. 5 - Typical Capacitance vs. Drain to Source Voltage
20
1000
ID = 38A VDS = 400V VDS = 250V VDS = 100V
VGS , Gate-to-Source Voltage (V)
I D , Drain-to-Source Current (A)
16
100
TJ = 150 ° C
12
TJ = 25 ° C
10
8
4
1
V DS = 50V 20μs PULSE WIDTH 4 5 6 7 8
0 0 80 160
FOR TEST CIRCUIT SEE FIGURE 13
240 320 400
VGS , Gate-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig. 3 - Typical Transfer Characteristics
Fig. 6 - Typical Gate Charge vs. Gate to Source Voltage
Document Number: 94547 Revision: 11-May-10
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FA38SA50LCP
Vishay Semiconductors
1000
Power MOSFET, 38 A
ISD , Reverse Drain Current (A)
Current regulator Same type as D.U.T.
100
50 KΩ
TJ = 150 ° C
12 V
.2 µF .3 µF + V - DS
10
D.U.T.
TJ = 25 ° C
1
VGS 3 mA
0.1 0.2
V GS = 0 V
0.4 0.6 0.8 1.0 1.2 1.4 1.6
VSD ,Source-to-Drain Voltage (V)
IG ID Current sampling resistors
Fig. 7 - Typical Source Drain Diode Forward Voltage
Fig. 10 - Gate Charge Test Circuit
1000
OPERATION IN THIS AREA LIMITED BY RDS(on)
ID , Drain Current (A)
VDS
100 10us
RD
VGS RG
D.U.T. + - VDD
100us 10 1ms
10 V
TC = 25 °C TJ = 150 °C Single Pulse
1 10 100
Pulse width ≤ 1 µs Duty factor ≤ 0.1 %
10ms 1000 10000
1
VDS , Drain-to-Source Voltage (V)
Fig. 8 - Maximum Safe Operating Area
Fig. 11 - Switching Time Test Circuit
QG
VDS 90%
10V
QGS VG QGD
0%
GS td(on) tr t d(off) tf
Charge
Fig. 9 - Basic Gate Charge Waveform
Fig. 12 - Switching Time Waveforms
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Document Number: 94547 Revision: 11-May-10
FA38SA50LCP
Power MOSFET, 38 A
Vishay Semiconductors
1
Thermal Response (Z thJC )
0.50 0.1 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T = P DM x Z thJC + TC J 0.0001 0.001 0.01 0.1 1
0.01
0.001 0.00001
t1, Rectangular Pulse Duration (sec)
Fig. 13 - Maximum Effective Transient Thermal Impedance, Junction to Case
V(BR)DSS
15 V
tp
VDS RG
20 V
L
Driver
D.U.T
IAS tp 0.01 Ω
+ - VDD
A
I AS
Fig. 15 - Unclamped Inductive Waveforms
Fig. 14 - Unclamped Inductive Test Circuit
EAS , Single Pulse Avalanche Energy (mJ)
1200
TOP BOTTOM
1000
ID 17A 24A 38A
800
600
400
200
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( °C)
Fig. 16 - Maximum Avalanche Energy vs. Drain Current
Document Number: 94547 Revision: 11-May-10
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FA38SA50LCP
Vishay Semiconductors
Power MOSFET, 38 A
D.U.T.
+
3
Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer
+
2
-
-
4
+
1 RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - Device under test
+ VDD
Fig. 17 - Peak Diode Recovery dV/dt Test Circuit
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig. 18 - For N-Channel Power MOSFETs
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Document Number: 94547 Revision: 11-May-10
FA38SA50LCP
Power MOSFET, 38 A
ORDERING INFORMATION TABLE
Device code
Vishay Semiconductors
F
1 1 2 3 4 5 6 7 8 -
A
2
38
3
S
4
A
5
50
6
LC
7
P
8
Power MOSFET Generation 3, MOSFET silicon, DBC construction Current rating (38 = 38 A) Single switch (see Circuit Configuration table) SOT-227 Voltage rating (50 = 500 V) Low charge P = Lead (Pb)-free
CIRCUIT CONFIGURATION
CIRCUIT CIRCUIT CONFIGURATION CODE CIRCUIT DRAWING
Lead assignment S D 3 2 S G
D (3)
Single switch no diode
S
G (2)
4 1
S (1-4)
LINKS TO RELATED DOCUMENTS Dimensions Packaging information www.vishay.com/doc?95036 www.vishay.com/doc?95037
Document Number: 94547 Revision: 11-May-10
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Outline Dimensions
Vishay Semiconductors
SOT-227
DIMENSIONS in millimeters (inches)
38.30 (1.508) 37.80 (1.488) Ø 4.40 (0.173) Ø 4.20 (0.165) 4 4 x M4 nuts -A3 6.25 (0.246) 12.50 (0.492) 1 7.50 (0.295) 15.00 (0.590) 30.20 (1.189) 29.80 (1.173) 8.10 (0.319) 4x 7.70 (0.303) 2.10 (0.082) 1.90 (0.075) 2 R full 25.70 (1.012) 25.20 (0.992) -BChamfer 2.00 (0.079) x 45°
0.25 (0.010) M C A M B M 2.10 (0.082) 1.90 (0.075) -C0.12 (0.005)
12.30 (0.484) 11.80 (0.464)
Notes • Dimensioning and tolerancing per ANSI Y14.5M-1982 • Controlling dimension: millimeter
Document Number: 95036 Revision: 28-Aug-07
For technical questions, contact: indmodules@vishay.com
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Vishay
Disclaimer
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Document Number: 91000 Revision: 11-Mar-11
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