GA100NA60U

GA100NA60UP Vishay Semiconductors Insulated Gate Bipolar Transistor (Warp 2 Speed IGBT), 100 A FEATURES • Ultrafast: Optimized for minimum saturation voltage and speed 0 to 40 kHz in hard switching, > 200 kHz in resonant mode • Very low conduction and switching losses • Fully isolated package (2500 V AC/RMS) • Very low internal inductance ( 5 nH typical) • Industry standard outline • UL approved file E78996 • Compliant to RoHS directive 2002/95/EC • Designed and qualified for industrial market SOT-227 BENEFITS PRODUCT SUMMARY VCES IC DC VCE(on) at 100 A, 25 °C 600 V 100 A 1.8 V • Designed for increased operating efficiency in power conversion: PFC, UPS, SMPS, welding, induction heating • Lower overall losses available at frequencies  20 kHz • Easy to assemble and parallel • Direct mounting to heatsink • Lower EMI, requires less snubbing • Plug in compatible with other SOT-227 packages ABSOLUTE MAXIMUM RATINGS PARAMETER Collector to emitter breakdown voltage Continuous collector current Pulsed collector current Clamped inductive load current Gate to emitter voltage RMS isolation voltage Maximum power dissipation Operating junction and storage temperature range Mounting torque SYMBOL VCES IC ICM ILM VGE VISOL PD TJ, TStg 6 to 32 or M3 screw Any terminal to case, t = 1 minute TC = 25 °C TC = 100 °C Repetitive rating: VGE = 20 V; pulse width limited by maximum junction temperature (fig. 20) TC = 25 °C TC = 100 °C TEST CONDITIONS MAX. 600 100 50 200 200 ± 20 2500 250 100 - 55 to + 150 12 (1.3) V A UNITS V W °C Ibf · in (N · m) THERMAL AND MECHANICAL SPECIFICATIONS PARAMETER Junction to case, IGBT Thermal resistance, junction to case, diode Case to sink, flat, greased surface Weight of module SYMBOL RthJC RthJC RthCS TYP. 0.05 30 MAX. 0.50 1.0 g UNITS °C/W Document Number: 94543 Revision: 22-Jul-10 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com www.vishay.com 1 GA100NA60UP Vishay Semiconductors Insulated Gate Bipolar Transistor (Warp 2 Speed IGBT), 100 A ELECTRICAL SPECIFICATIONS (TJ = 25 °C unless otherwise specified) PARAMETER Collector to emitter breakdown voltage Temperature coeffecient of breakdown voltage Collector to emitter saturation voltage Gate threshold voltage Temperature coefficient of threshold voltage Forward transconductance Zero gate voltage collector current Diode forward voltage drop Gate to emitter leakage current SYMBOL V(BR)CES V(BR)CESTJ TEST CONDITIONS VGE = 0 V, IC = 250 μA VGE = 0 V, IC = 1.0 mA VGE = 15 V, IC = 50 A VCE(on) VGE(th) VGE(th)/ TJ gfe ICES VFM IGES VGE = 15 V, IC = 100 A VGE = 15 V, IC = 50 A, TJ = 150 °C VCE = VGE, IC = 250 μA VCE = VGE, IC = 250 μA VCE = 100 V, IC = 50 A VGE = 0 V, VCE = 600 V VGE = 0 V, VCE = 600 V, TJ = 150 °C IC = 50 A IC = 50 A, TJ = 150 °C VGE = ± 20 V See fig. 12 See fig. 1, 4 MIN. 600 3.0 34 TYP. 0.36 1.49 1.80 1.47 - 7.6 52 1.3 1.16 MAX. 2.1 6.0 250 1.3 1.6 1.3 ± 100 mV/°C S μA mA V nA V UNITS V V/°C SWITCHING CHARACTERISTICS (TJ = 25 °C unless otherwise specified) PARAMETER Total gate charge (turn-on) Gate emitter charge (turn-on) Gate collector charge (turn-on) Turn-on delay time Rise time Turn-off delay time Fall time Turn-on switching loss Turn-off switching loss Total switching loss Turn-on delay time Rise time Turn-off delay time Fall time Total switching loss Internal emitter inductance Input capacitance Output capacitance Reverse transfer capacitance Diode reverse recovery time Diode peak reverse recovery current Diode reverse recovery charge Diode peak rate of fall recovery during tb www.vishay.com 2 SYMBOL Qg Qge Qgc td(on) tr td(off) tf Eon Eoff Ets td(on) Etot tr td(off) tf Ets LE Cies Coes Cres trr Irr Qrr dI(rec)M/dt VGE = 0 V VCC = 30 V f = 1.0 MHz TJ = 25 °C TJ = 125 °C TJ = 25 °C TJ = 125 °C TJ = 25 °C TJ = 125 °C TJ = 25 °C TJ = 125 °C See fig. 13 See fig. 14 See fig. 15 See fig. 16 IF = 50 A VR = 200 V dI/dt = 200 A/μs See fig. 6 TJ = 150 °C IC = 60 A, VCC = 480 V VGE = 15 V, Rg = 5.0 energy losses include “tail” and diode reverse recovery TJ = 25 °C IC = 60 A, VCC = 480 V VGE = 15 V, Rg = 5.0 energy losses include “tail” and diode reverse recovery IC = 50 A VCC = 400 V VGE = 15 V TEST CONDITIONS See fig. 7 MIN. TYP. 430 48 130 57 80 240 120 0.41 2.51 2.92 57 80 380 170 4.78 2.0 7400 730 90 90 120 7.3 11 360 780 370 220 MAX. 640 72 190 4.4 140 180 11 16 550 1200 ns A nC A/μs pF mJ nH ns mJ ns nC UNITS For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com Document Number: 94543 Revision: 22-Jul-10 GA100NA60UP Insulated Gate Bipolar Transistor (Warp 2 Speed IGBT), 100 A 1000 100 Vishay Semiconductors I C , Collector-to-Emitter Current (A) Maximum DC Collector Current(A) T ?J = 25 °C T ?J = 150 °C 80 100 60 40 10 20 1 0.0 ?V μs = 15V WIDTH 20μs 20 PULSE GE 1.0 2.0 3.0 4.0 5.0 0 25 50 75 100 125 150 VCE , Collector-to-Emitter Voltage (V) TC , Case Temperature ( ° C) Fig. 1 - Typical Output Characteristics Fig. 3 - Maximum Collector Current vs. Case Temperature 2.5 1000 TJ = 150 °C VCE , Collector-to-Emitter Voltage(V) V 15V ? us=PULSE WIDTH 80 GE I C, Collector-to-Emitter Current (A) 100 2.0 ? = 100 A IC T ?J = 25 °C 10 1.5 ? = 50 A IC ? = 25 A IC 1 5.0 V CC = 50V 5μs PULSE WIDTH 6.0 7.0 8.0 9.0 1.0 -60 -40 -20 0 20 40 60 80 100 120 140 160 VGE , Gate-to-Emitter Voltage (V) TJ , Junction Temperature ( ° C) Fig. 2 - Typical Transfer Characteristics Fig. 4 - Typical Collector to Emitter Voltage vs. Junction Temperature 1 Thermal Response (Z thJC ) D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 P DM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = PDM x Z thJC + TC 0.0001 0.001 0.01 0.1 1 0.01 0.001 0.00001 t1 , Rectangular Pulse Duration (sec) Fig. 5 - Maximum Effective Transient Thermal Impedance, Junction to Case Document Number: 94543 Revision: 22-Jul-10 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com www.vishay.com 3 GA100NA60UP Vishay Semiconductors 14000 Insulated Gate Bipolar Transistor (Warp 2 Speed IGBT), 100 A 100 RG = 5.0 Ω VGE = 15V VCC = 480V 10 IC = 120A IC = 60A IC = 30A 1 12000 10000 C ? ies 8000 6000 4000 Coes 2000 Cres 0.1 1 10 100 0 Total Switching Losses (mJ) VGE = 0V, f = 1MHz Cies = Cge + Cgc , Cce SHORTED Cres = Cgc Coes = Cce + Cgc C, Capacitance (pF) -60 -40 -20 0 20 40 60 80 100 120 140 160 VCE , Collector-to-Emitter Voltage (V) T J, Junction Temperature (°C) Fig. 6 - Typical Capacitance vs. Collector to Emitter Voltage 20 12 Fig. 9 - Typical Switching Losses vs. Junction Temperature VGE , Gate-to-Emitter Voltage (V) VCC = 400V I C = 50A 10 Total Switching Losses (mJ) 16 RG = 5.0 Ω TJ = 150°C VGE = 15V VCC = 480V 8 12 6 8 4 4 2 0 0 0 100 200 300 400 500 20 40 60 80 100 QG , Total Gate Charge (nC) IC , Collector Current (A) Fig. 7 - Typical Gate Charge vs. Gate to Emitter Voltage 10 VCC = 480V VGE = 15V TJ = 25°C I C = 60A 1000 Fig. 10 - Typical Switching Losses vs. Collector to Emitter Current VGE = 20V T J = 125 oC 8 I C, Collector-to-Emitter Current (A) Total Switching Losses (mJ) 100 6 10 4 2 0 10 20 30 40 50 1 1 ?AFE OPERATING AREA S 10 100 1000 R G, Gate Resistance ( Ω) VCE , Collector-to-Emitter Voltage (V) Fig. 8 - Typical Switching Losses vs. Gate Resistance Fig. 11 - Turn-Off SOA www.vishay.com 4 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com Document Number: 94543 Revision: 22-Jul-10 GA100NA60UP Insulated Gate Bipolar Transistor (Warp 2 Speed IGBT), 100 A 1000 Vishay Semiconductors 100 I F = 100A I F = 50A I F = 25A 100 Instantaneous forward current - IF (A) T J = 1 5 0 °C T J = 1 2 5 °C TJ = 10 Irr- ( A) 10 25 °C 1 0.0 0.4 0.8 1.2 1.6 2.0 VR = 2 00 V T J = 1 2 5°C T J = 2 5 °C F orwa rd V oltag e D ro p - V F M (V ) 1 100 1000 di f /dt - ( A/ μ s ) Fig. 12 - Typical Forward Voltage Drop vs. Instantaneous Forward Current 150 Fig. 14 - Typical Recovery Current vs. dIF/dt 4000 I F = 100A I F = 50A I F = 25A 120 V R = 2 00 V T J = 1 2 5°C T J = 2 5 °C I F = 100A 3000 I F = 50A IF = 25A trr- (nC) 90 Qrr- (nC) 60 30 V R = 2 00 V T J = 1 2 5°C T J = 2 5 °C 0 100 1000 2000 1000 di f /dt - (A / μ s ) 0 100 di f /dt - (A / µ s ) 1000 Fig. 13 - Typical Reverse Recovery vs. dIF/dt Fig. 15 - Typical Stored Charge vs. dIF/dt Document Number: 94543 Revision: 22-Jul-10 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com www.vishay.com 5 GA100NA60UP Vishay Semiconductors 10000 VR = 2 00 V T J = 1 2 5°C T J = 2 5 °C Insulated Gate Bipolar Transistor (Warp 2 Speed IGBT), 100 A IF = 100A I F = 50A 90% di (rec) M/dt- (A /µs) Vge VC 10% 90% I F = 25A td(off) 1000 10% IC 5% t d(on) tr tf t=5μs E on E ts = (Eon +Eoff ) E off 100 100 1000 di f /dt - (A/µ s) Fig. 16 - Typical dI(rec)M/dt vs. dIF/dt Fig. 17b - Test Waveforms for Circuit of Fig. 17a, Defining Eoff, td(off), tf Gate voltage D.U.T. 10 % + VG Same type device as D.U.T. 10 % IC + VG Vce VCC D.U.T. voltage and current 90 % IC 5 % VCE Eon = Ipk IC 80 % of VCE 430 µF D.U.T. td(on) tr ∫ t2 VCE IC dt t1 t1 t2 Fig. 17a - Test Circuit for Measurement of ILM, Eon, Eoff(diode), trr, Qrr, Irr, td(on), tr, td(off), tf Fig. 17c - Test Waveforms for Circuit of Fig. 17a, Defining Eon, td(on), tr www.vishay.com 6 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com Document Number: 94543 Revision: 22-Jul-10 GA100NA60UP Insulated Gate Bipolar Transistor (Warp 2 Speed IGBT), 100 A trr Vishay Semiconductors IC Qrr = ∫ trr IC dt tx tx 10 % VCC Vpk 10 % Irr VCC Irr Diode recovery waveforms t4 Vd IC dt t3 Erec = Diode reverse recovery energy t3 t4 ∫ Fig. 17d - Test Waveforms for Circuit of Fig. 17a, Defining Erec, trr, Qrr, Irr L D.U.T. VG Gate signal device under test 50 V Current D.U.T. 6000 µF 100 V 1000 V VC* Voltage in D.U.T. Fig. 18a - Clamped Inductive Load Test Circuit Current in D1 RL = 0 - 480 V t0 t1 t2 480 V 4 x IC at 25 °C Fig. 17e - Macro Waveforms for Figure 17a's Test Circuit Fig. 18b - Pulsed Collector Current Test Circuit Document Number: 94543 Revision: 22-Jul-10 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com www.vishay.com 7 GA100NA60UP Vishay Semiconductors ORDERING INFORMATION TABLE Device code Insulated Gate Bipolar Transistor (Warp 2 Speed IGBT), 100 A G 1 1 2 3 4 5 6 7 8 - A 2 100 3 N 4 A 5 60 6 U 7 P 8 Device: G = IGBT - Silicon technology: A = Generation 4 IGBT, Generation 2 HEXFRED® Current rating (100 = 100 A) N = High side chopper SOT-227 Voltage rating (60 = 600 V) U = Ultrafast with matching diode None = Standard production P = Lead (Pb)-free CIRCUIT CONFIGURATION 3 2 1 4 LINKS TO RELATED DOCUMENTS Dimensions Packaging information www.vishay.com/doc?95036 www.vishay.com/doc?95037 www.vishay.com 8 For technical questions within your region, please contact one of the following: DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com Document Number: 94543 Revision: 22-Jul-10 Outline Dimensions Vishay Semiconductors SOT-227 DIMENSIONS in millimeters (inches) 38.30 (1.508) 37.80 (1.488) Ø 4.40 (0.173) Ø 4.20 (0.165) 4 4 x M4 nuts -A3 6.25 (0.246) 12.50 (0.492) 1 7.50 (0.295) 15.00 (0.590) 30.20 (1.189) 29.80 (1.173) 8.10 (0.319) 4x 7.70 (0.303) 2.10 (0.082) 1.90 (0.075) 2 R full 25.70 (1.012) 25.20 (0.992) -BChamfer 2.00 (0.079) x 45° 0.25 (0.010) M C A M B M 2.10 (0.082) 1.90 (0.075) -C0.12 (0.005) 12.30 (0.484) 11.80 (0.464) Notes • Dimensioning and tolerancing per ANSI Y14.5M-1982 • Controlling dimension: millimeter Document Number: 95036 Revision: 28-Aug-07 For technical questions, contact: indmodules@vishay.com www.vishay.com 1 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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