GA200SA60SP
Vishay Semiconductors
Insulated Gate Bipolar Transistor Ultralow VCE(on), 342 A
FEATURES
• Standard: Optimized for minimum saturation voltage and low speed up to 5 kHz • Lowest conduction losses available • Fully isolated package (2500 VAC) • Very low internal inductance (5 nH typical) • Industry standard outline
SOT-227
• UL approved file E78996 • Compliant to RoHS directive 2002/95/EC • Designed and qualified for industrial level
600 V 1.33 V 200 A
PRODUCT SUMMARY
VCES VCE(on) (typical) at 200 A, 25 °C IC at TC = 97 °C (1)
BENEFITS
• Designed for increased operating efficiency in power conversion: UPS, SMPS, TIG welding, induction heating • Easy to assemble and parallel • Direct mounting to heatsink • Plug-in compatible with other SOT-227 packages
Note (1) Maximum I RMS current admitted 100 A to do not exceed the maximum temperature of terminals
ABSOLUTE MAXIMUM RATINGS
PARAMETER Collector to emitter breakdown voltage Continuous collector current SYMBOL VCES IC (1) TC = 25 °C TC = 97 °C Repetitive rating; VGE = 20 V, pulse width limited by maximum junction temperature See fig. 15 VCC = 80 % (VCES), VGE = 20 V, L = 10 μH, Rg = 2.0 , See fig. 14 Repetitive rating; pulse width limited by maximum junction temperature Any terminal to case, t = 1 minute TC = 25 °C TC = 100 °C TEST CONDITIONS MAX. 600 342 200 400 A UNITS V
Pulsed collector current
ICM
Clamped Inductive load current Gate to emitter voltage Reverse voltage avalanche energy RMS isolation voltage Maximum power dissipation Operating junction and storage temperature range Mounting torque
ILM VGE EARV VISOL PD TJ, TStg
400 ± 20 155 2500 781 312 - 55 to + 150 V mJ V W °C lbf in (N m)
6-32 or M3 screw
12 (1.3)
Note (1) Maximum I RMS current admitted 100 A to do not exceed the maximum temperature of terminals
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER Junction to case Case to sink, flat, greased surface Weight of module Document Number: 94363 Revision: 22-Jul-10 SYMBOL RthJC RthCS TYP. 0.05 30 MAX. 0.16 UNITS °C/W g www.vishay.com 1
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GA200SA60SP
Vishay Semiconductors
Insulated Gate Bipolar Transistor Ultralow VCE(on), 342 A
ELECTRICAL SPECIFICATIONS (TJ = 25 °C unless otherwise noted)
PARAMETER Collector to emitter breakdown voltage Emitter to collector breakdown voltage Temperature coeff. of breakdown voltage SYMBOL V(BR)CES V(BR)ECS (1) V(BR)CES/TJ VCE(on) VGE(th) VGE(th)/TJ gfe
(2)
TEST CONDITIONS VGE = 0 V, IC = 250 μA VGE = 0 V, IC = 1.0 A VGE = 0 V, IC = 1.0 mA IC = 100 A IC = 200 A IC = 100 A, TJ = 150 °C VCE = VGE, IC = 250 μA VCE = VGE, IC = 2 mA VCE = 100 V, IC = 100 A VGE = 0 V, VCE = 600 V VGE = 0 V, VCE = 10 V, TJ = 150 °C VGE = ± 20 V VGE = 15 V See fig. 2, 5
MIN. 600 18 3.0 90 -
TYP. 0.62 1.10 1.33 1.02 - 10 150 -
MAX. 1.3 6.0 1.0 10 ± 250
UNITS V V/°C
Collector to emitter saturation voltage
V
Gate threshold voltage Temperature coeff. of threshold voltage Forward transconductance Zero gate voltage collector current Gate to emitter leakage current Notes (1) Pulse width 80 μs; duty factor 0.1 % (2) Pulse width 5.0 μs, single shot
mV/°C S mA nA
ICES IGES
SWITCHING CHARACTERISTICS (TJ = 25 °C unless otherwise specified)
PARAMETER Total gate charge (turn-on) Gate emitter charge (turn-on) Gate collector charge (turn-on) Turn-on delay time Rise time Turn-off delay time Fall time Turn-on switching loss Turn-off switching loss Total switching loss Turn-on delay time Rise time Turn-off delay time Fall time Total switching loss Internal emitter inductance Input capacitance Output capacitance Reverse transfer capacitance SYMBOL Qg Qge Qgc td(on) tr td(off) tf Eon Eoff Ets td(on) tr td(off) tf Ets LE Cies Coes Cres TEST CONDITIONS IC = 100 A VCC = 400 V VGE = 15 V; See fig. 8 TJ = 25 °C IC = 100 A VCC = 480 V VGE = 15 V Rg = 2.0 Energy losses include “tail” See fig. 9, 10, 13 TJ = 150 °C IC = 100 A, VCC = 480 V VGE = 15 V, Rg = 2.0 Energy losses include “tail” See fig. 10, 11, 13 Between lead, and center of the die contact VGE = 0 V VCC = 30 V f = 1.0 MHz; See fig. 7 MIN. TYP. 770 100 260 78 56 890 390 0.98 17.4 18.4 72 60 1500 660 35.7 5.0 16 250 1040 190 MAX. 1200 150 380 1300 580 25.5 pF mJ nH ns mJ ns nC UNITS
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Document Number: 94363 Revision: 22-Jul-10
GA200SA60SP
Insulated Gate Bipolar Transistor Ultralow VCE(on), 342 A
250
Vishay Semiconductors
200
Load Current (A)
150 Square wave: 60 % of rated voltage
I
For both: Triangular wave: Duty cycle: 50 % I TJ = 125 °C Tsink = 90 °C Clamp voltage: Gate drive as specified 80 % of rated Power dissipation = 140 W
100
50
Ideal diodes
0 0.1 1 10 100
f - Frequency (kHz)
Fig. 1 - Typical Load Current vs. Frequency (Load Current = IRMS of Fundamental)
IC - Collector to Emitter Current (A)
1000
160 TJ = 150 °C
TC - Case Temperature (°C)
140 120 100 80 60 40 20 0 0 50 100 150 200 250 300 350 DC
100 TJ = 25 °C
10 VGE = 15 V 20 µs pulse width 1 0.5 1.0 1.5 2.0 2.5
VCE - Collector to Emitter Voltage (V)
Fig. 2 - Typical Output Characteristics
Maximum DC Collector Current (A)
Fig. 4 - Maximum Collector Current vs. Case Temperature
IC - Collector to Emitter Current (A)
1000
VCE - Collector to Emitter Voltage (V)
3 VGE = 15 V 80 µs pulse width
TJ = 150 °C
TJ = 25 °C 100
2
IC = 400 A
IC = 200 A IC = 100 A 1 - 60 - 40 - 20 0 20 40 60 80 100 120 140 160
VCC = 50 V 5 µs pulse width 10 5 6 7
VGE - Gate to Emitter Voltage (V)
Fig. 3 - Typical Transfer Characteristics
TJ - Junction Temperature (°C)
Fig. 5 - Typical Collector to Emitter Voltage vs. Junction Temperature
Document Number: 94363 Revision: 22-Jul-10
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GA200SA60SP
Vishay Semiconductors
1
Insulated Gate Bipolar Transistor Ultralow VCE(on), 342 A
ZthJC - Thermal Response
0.1 D = 0.75 D = 0.50 D = 0.25 D = 0.10 D = 0.05 D = 0.02 D = 0.01 0.01 0.1 1 10 100
0.01 Single pulse (thermal resistance) 0.001 0.0001
0.001
t1 - Rectangular Pulse Duration (s)
Fig. 6 - Maximum Effective Transient Thermal Impedance, Junction to Case
30 000
25
Total Switching Losses (mJ)
C - Capacitance (pF)
24 000
VGE = 0 V, f = 1 MHz Cies = Cge + Cgc, Cce shorted Cres = Cgc Coes = Cce + Cgc Cies
24 23 22 21 20 19 18
VCC = 480 V VGE = 15 V TJ = 25 °C IC = 200 A
18 000
12 000
Coes
6000 Cres 0 1 10 100
0
10
20
30
40
50
VCE - Collector to Emitter Voltage (V)
Fig. 7 - Typical Capacitance vs. Collector to Emitter Voltage
20
Rg - Gate Resistance (Ω)
Fig. 9 - Typical Switching Losses vs. Gate Resistance
1000
VGE - Gate to Emitter Voltage (V)
16
Total Switching Losses (mJ)
VCC = 400 V IC = 100 A
RG = 2.0 Ω VGE = 15 V VCC = 480 V IC = 350 A 100 IC = 200 A IC = 100 A
12
8
4
0 0 200 400 600 800
10 - 60 - 40 - 20 0
20 40 60 80 100 120 140 160
QG - Total Gate Charge (nC)
Fig. 8 - Typical Gate Charge vs. Gate to Emitter Voltage
TJ - Junction Temperature (°C)
Fig. 10 - Typical Switching Losses vs. Junction Temperature
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Document Number: 94363 Revision: 22-Jul-10
GA200SA60SP
Insulated Gate Bipolar Transistor Ultralow VCE(on), 342 A
160 RG = 2.0 Ω TJ = 150 °C VCC = 480 V VGE = 15 V 50 V 80 1 40 * Driver same type as D.U.T.; VC = 80 % of VCE (max) 0 100 150 200 250 300 350 Note: Due to the 50 V power supply, pulse width and inductor will increase to obtain rated Id 2 1000 V
Vishay Semiconductors
Total Switching Losses (mJ)
120
L VC*
D.U.T.
IC - Collector Current (A)
Fig. 11 - Typical Switching Losses vs. Collector Current Fig. 13a - Clamped Inductive Load Test Circuit
1000
IC - Collector Current (A)
100
VGE = 20 V TJ = 125 °C RL = 0 V to 480 V 480 µF 960 V 480 V 4 x IC at 25 °C
10
Safe operating area 1 1 10 100 1000
VCE - Collector to Emitter Voltage (V)
Fig. 12 - Turn-Off SOA Fig. 13b - Pulsed Collector Current Test Circuit
IC L Driver* 50 V 1000 V 1 2 3 D.U.T. VC
* Driver same type as D.U.T., VC = 480 V
Fig. 14a - Switching Lost Test Circuit
Document Number: 94363 Revision: 22-Jul-10
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GA200SA60SP
Vishay Semiconductors
Insulated Gate Bipolar Transistor Ultralow VCE(on), 342 A
1
2 90 % 3 VC 90 % 10 %
td (off)
10 % IC 5% tr td (on) Eon Ets = (Eon + Eoff) Eoff tf t = 5 µs
Fig. 14b - Switching Loss Waveforms
ORDERING INFORMATION TABLE
Device code
G
1 1 2 3 4 5 6 7 8 -
A
2
200
3
S
4
A
5
60
6
S
7
P
8
Insulated Gate Bipolar Transistor (IGBT) Generation 4, IGBT silicon, DBC construction Current rating (200 = 200 A) Single switch, no diode SOT-227 Voltage rating (60 = 600 V) Speed/type (S = Standard speed) None = Standard production P = Lead (Pb)-free
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Document Number: 94363 Revision: 22-Jul-10
GA200SA60SP
Insulated Gate Bipolar Transistor Ultralow VCE(on), 342 A
CIRCUIT CONFIGURATION
3 (C) Lead assignment E 4 2 (G) 1 E 1, 4 (E) N-channel G C 3 2
Vishay Semiconductors
LINKS TO RELATED DOCUMENTS Dimensions Packaging information www.vishay.com/doc?95036 www.vishay.com/doc?95037
Document Number: 94363 Revision: 22-Jul-10
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Outline Dimensions
Vishay Semiconductors
SOT-227
DIMENSIONS in millimeters (inches)
38.30 (1.508) 37.80 (1.488) Ø 4.40 (0.173) Ø 4.20 (0.165) 4 4 x M4 nuts -A3 6.25 (0.246) 12.50 (0.492) 1 7.50 (0.295) 15.00 (0.590) 30.20 (1.189) 29.80 (1.173) 8.10 (0.319) 4x 7.70 (0.303) 2.10 (0.082) 1.90 (0.075) 2 R full 25.70 (1.012) 25.20 (0.992) -BChamfer 2.00 (0.079) x 45°
0.25 (0.010) M C A M B M 2.10 (0.082) 1.90 (0.075) -C0.12 (0.005)
12.30 (0.484) 11.80 (0.464)
Notes • Dimensioning and tolerancing per ANSI Y14.5M-1982 • Controlling dimension: millimeter
Document Number: 95036 Revision: 28-Aug-07
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Document Number: 91000 Revision: 11-Mar-11
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