IRFR9210PBF

IRFR9210, IRFU9210, SiHFR9210, SiHFU9210 Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration - 200 VGS = - 10 V 8.9 2.1 3.9 Single S FEATURES • Dynamic dV/dt Rating 3.0 • Repetitive Avalanche Rated • Surface Mount (IRFR9210/SiHFR9210) • Straight Lead (IRFU9210/SiHFU9210) • Available in Tape and Reel • P-Channel • Fast Switching • Lead (Pb)-free Available Available RoHS* COMPLIANT DPAK (TO-252) IPAK (TO-251) DESCRIPTION G D P-Channel MOSFET The Power MOSFETs technology is the key to Vishay’s advanced line of Power MOSFET transistors. The efficient geometry and unique processing of the Power MOSFET design achieve very low on-state resistance combined with high transconductance and extreme device ruggedness. The DPAK is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU/SiHFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 W are possible in typical surface mount applications. ORDERING INFORMATION Package Lead (Pb)-free SnPb Note a. See device orientation. DPAK (TO-252) IRFR9210PbF SiHFR9210-E3 IRFR9210 SiHFR9210 DPAK (TO-252) IRFR9210TRPbFa SiHFR9210T-E3a IRFR9210TRa SiHFR9210Ta DPAK (TO-252) IRFR9210TRLa SiHFR9210TLa IPAK (TO-251) IRFU9210PbF SiHFU9210-E3 IRFU9210 SiHFU9210 ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Currenta VGS at - 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID LIMIT - 200 ± 20 - 1.9 - 1.2 - 7.6 0.20 0.020 300 - 1.9 2.5 25 2.5 - 5.0 - 55 to + 150 260d UNIT V A IDM Pulsed Drain Linear Derating Factor Linear Derating Factor (PCB Mount)e EAS Single Pulse Avalanche Energyb IAR Repetitive Avalanche Currenta EAR Repetitive Avalanche Energya Maximum Power Dissipation TC = 25 °C PD TA = 25 °C Maximum Power Dissipation (PCB Mount)e c dV/dt Peak Diode Recovery dV/dt Operating Junction and Storage Temperature Range TJ, Tstg Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = - 50 V, starting TJ = 25 °C, L = 124 mH, RG = 25 Ω, IAS = - 1.9 A (see fig. 12). c. ISD ≤ - 1.9 A, dI/dt ≤ 70 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91281 S-Pending-Rev. A, 21-Jul-08 W/°C mJ A mJ W V/ns °C WORK-IN-PROGRESS www.vishay.com 1 IRFR9210, IRFU9210, SiHFR9210, SiHFU9210 Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Maximum Junction-to-Ambient (PCB Mount)a Maximum Junction-to-Case (Drain) SYMBOL RthJA RthJA RthJC MIN. TYP. MAX. 110 50 5.0 °C/W UNIT Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf LD LS VGS = 0 V, ID = - 250 µA Reference to 25 °C, ID = - 1 mA VDS = VGS, ID = - 250 µA VGS = ± 20 V VDS = - 200 V, VGS = 0 V VDS = - 160 V, VGS = 0 V, TJ = 125 °C VGS = - 10 V ID = - 1.1 Ab - 200 - 2.0 0.98 - 0.23 - - 4.0 ± 100 - 100 - 500 3.0 - V V/°C V nA µA Ω S VDS = - 50 V, ID = - 1.1 A VGS = 0 V, VDS = - 25 V, f = 1.0 MHz, see fig. 5 - 170 54 16 8.0 12 11 13 4.5 7.5 8.9 2.1 3.9 nH ns nC pF VGS = - 10 V ID = - 1.3 A, VDS = - 160 V, see fig. 6 and 13b - VDD = - 100 V, ID = - 2.3 A, RG = 24 Ω, RD = 41 Ω, see fig. 10b - Between lead, 6 mm (0.25") from package and center of die contact D G S - 110 0.56 - 1.9 A - 7.6 - 5.8 220 1.1 V ns µC G S TJ = 25 °C, IS = - 1.9 A, VGS = 0 Vb TJ = 25 °C, IF = - 2.3 A, dI/dt = 100 A/µsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91281 S-Pending-Rev. A, 21-Jul-08 IRFR9210, IRFU9210, SiHFR9210, SiHFU9210 Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91281 S-Pending-Rev. A, 21-Jul-08 www.vishay.com 3 IRFR9210, IRFU9210, SiHFR9210, SiHFU9210 Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area www.vishay.com 4 Document Number: 91281 S-Pending-Rev. A, 21-Jul-08 IRFR9210, IRFU9210, SiHFR9210, SiHFU9210 Vishay Siliconix RD VDS VGS RG D.U.T. + - 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % VDD Fig. 10a - Switching Time Test Circuit td(on) VGS 10 % tr td(off) tf 90 % VDS Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91281 S-Pending-Rev. A, 21-Jul-08 www.vishay.com 5 IRFR9210, IRFU9210, SiHFR9210, SiHFU9210 Vishay Siliconix L Vary tp to obtain required IAS RG VDS IAS D.U.T. IAS VDS + V DD VDD tp - 10 V tp 0.01 Ω VDS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ 12 V - 10 V QGS QG 0.2 µF 0.3 µF VG VGS - 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91281 S-Pending-Rev. A, 21-Jul-08 + D.U.T. - QGD VDS IRFR9210, IRFU9210, SiHFR9210, SiHFU9210 Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + P.W. Period Ripple ≤ 5 % D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer RG Compliment N-Channel of D.U.T. for driver Driver gate drive D= D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt Re-applied voltage Inductor current Body diode forward drop * VGS = - 5 V for logic level and - 3 V drive devices Fig. 14 - For P-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91281. Document Number: 91281 S-Pending-Rev. A, 21-Jul-08 + + • dV/dt controlled by RG • ISD controlled by duty factor "D" • D.U.T. - device under test + - VDD P.W. Period VGS = - 10 V* VDD ISD www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1