IRL540S

IRL540S, SiHL540S Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 5 V 64 9.4 27 Single D FEATURES 100 0.077 • Halogen-free According to IEC 61249-2-21 Definition • Surface Mount • Available in Tape and Reel • Dynamic dV/dt Rating • Repetitive Avalanche Rated • Logic-Level Gate Drive • RDS(on) Specified at VGS = 4 V and 5 V • 175 °C Operating Temperature • Compliant to RoHS Directive 2002/95/EC DESCRIPTION Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The D2PAK (TO-263) is a surface mount power package capable of accommodating die size up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2PAK (TO-263) is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. D2PAK (TO-263) G GD S S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free and Halogen-free Lead (Pb)-free Note a. See device orientation. D2PAK (TO-263) SiHL540S-GE3 IRL540SPbF SiHL540S-E3 D2PAK (TO-263) SiHL540STRL-GE3a IRL540STRLPbFa SiHL540STL-E3a ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Linear Derating Factor Linear Derating Factor (PCB Mount)e Single Pulse Avalanche Energyb Avalanche Currenta Repetiitive Avalanche Energya Maximum Power Dissipation Currenta VGS at 5 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM LIMIT 100 ± 10 28 20 110 1.0 0.025 440 28 15 150 3.7 5.5 - 55 to + 175 300d UNIT V A W/°C mJ A mJ W V/ns °C EAS IAR EAR TC = 25 °C PD TA = 25 °C Maximum Power Dissipation (PCB Mount)e dV/dt Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range TJ, Tstg Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 25 V, starting TJ = 25 °C, L = 841 μH, Rg = 25 , IAS = 28 A (see fig. 12). c. ISD  28 A, dI/dt  170 A/μs, VDD  VDS, TJ  175 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 90386 S11-1045-Rev. C, 30-May-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL540S, SiHL540S Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Maximum Junction-to-Ambient (PCB Mount)a Maximum Junction-to-Case (Drain) SYMBOL RthJA RthJA RthJC TYP. MAX. 62 40 1.0 °C/W UNIT Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf LD LS Between lead, 6 mm (0.25") from package and center of die contact D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VGS = 0, ID = 250 μA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 μA VGS = ± 10 V VDS = 100 V, VGS = 0 V VDS = 80 V, VGS = 0 V, TJ = 150 °C VGS = 5 V VGS = 4 V ID = 17 Ab ID = 14 Ab 100 1.0 12 0.12 - 2.0 ± 100 25 250 0.077 0.11 - V V/°C V nA μA Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time  S VDS = 50 V, ID = 17 Ab VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 2200 560 140 8.5 170 35 80 4.5 7.5 64 9.4 27 nH ns nC pF VGS = 5 V ID = 28 A, VDS = 80 V, see fig. 6 and 13b - VDD = 50 V, ID = 28 A, Rg = 9.0 , RD = 1.7 , see fig. 10b - G S IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D - 200 1.7 28 A 110 2.5 260 2.9 V ns μC G S TJ = 25 °C, IS = 28 A, VGS = 0 Vb TJ = 25 °C, IF = 28 A, dI/dt = 100 A/μsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. www.vishay.com 2 Document Number: 90386 S11-1045-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL540S, SiHL540S Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 175 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 90386 S11-1045-Rev. C, 30-May-11 www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL540S, SiHL540S Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area www.vishay.com 4 Document Number: 90386 S11-1045-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL540S, SiHL540S Vishay Siliconix VDS VGS Rg RD D.U.T. + - VDD 5V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS Rg VDS tp VDD D.U.T. I AS 5V tp 0.01 Ω IAS Fig. 12b - Unclamped Inductive Waveforms VDS + - V DD VDS Fig. 12a - Unclamped Inductive Test Circuit Document Number: 90386 S11-1045-Rev. C, 30-May-11 www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL540S, SiHL540S Vishay Siliconix Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ 12 V 0.2 µF 0.3 µF VGS QGS QG QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 90386 S11-1045-Rev. C, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL540S, SiHL540S Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer D.U.T. + - - + Rg • • • • dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % Note a. VGS = 5 V for logic level devices ISD Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?90386. Document Number: 90386 S11-1045-Rev. C, 30-May-11 www.vishay.com 7 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information Vishay Siliconix TO-263AB (HIGH VOLTAGE) A (Datum A) 3 E 4 L1 4 4 A A c2 Gauge plane 0° to 8° D 1 L2 B B 2 C 3 C 5 H L3 Detail A L4 Detail “A” Rotated 90° CW scale 8:1 L A1 H B B Seating plane 2 x b2 2xb 0.010 M A M B 2xe c A E ± 0.004 M B 5 b1, b3 Base metal Plating D1 4 (c) c1 5 (b, b2) Lead tip Section B - B and C - C Scale: none E1 View A - A 4 MILLIMETERS DIM. A A1 b b1 b2 b3 c c1 c2 D MIN. 4.06 0.00 0.51 0.51 1.14 1.14 0.38 0.38 1.14 8.38 MAX. 4.83 0.25 0.99 0.89 1.78 1.73 0.74 0.58 1.65 9.65 MIN. INCHES MAX. 0.190 0.010 0.039 0.035 0.070 0.068 0.029 0.023 0.065 0.380 DIM. D1 E E1 e H L L1 L2 L3 L4 MILLIMETERS MIN. 6.86 9.65 6.22 2.54 BSC 14.61 1.78 15.88 2.79 1.65 1.78 0.25 BSC 4.78 5.28 MAX. 10.67 MIN. INCHES MAX. 0.420 - 0.160 0.000 0.020 0.020 0.045 0.045 0.015 0.015 0.045 0.330 0.270 0.380 0.245 0.100 BSC 0.575 0.070 - 0.625 0.110 0.066 0.070 0.010 BSC 0.188 0.208 ECN: S-82110-Rev. A, 15-Sep-08 DWG: 5970 Notes 1. Dimensioning and tolerancing per ASME Y14.5M-1994. 2. Dimensions are shown in millimeters (inches). 3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the outmost extremes of the plastic body at datum A. 4. Thermal PAD contour optional within dimension E, L1, D1 and E1. 5. Dimension b1 and c1 apply to base metal only. 6. Datum A and B to be determined at datum plane H. 7. Outline conforms to JEDEC outline to TO-263AB. Document Number: 91364 Revision: 15-Sep-08 www.vishay.com 1 Legal Disclaimer Notice Vishay Disclaimer ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. 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No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 11-Mar-11 www.vishay.com 1