IRLZ34S

IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) () Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 5 V 35 7.1 25 Single D FEATURES 60 0.05 • Halogen-free According to IEC 61249-2-21 Definition • Advanced Process Technology • Surface Mount (IRLZ34S, SiHLZ34S) • Low-Profile Through-Hole (IRLZ34L, SiHLZ34L) • 175 °C Operating Temperature • Fast Switching • Fully Avalanche Rated • Compliant to RoHS Directive 2002/95/EC DESCRIPTION Third generation Power MOSFETs from Vishay utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast swichting speed and ruggedized device design that Power MOSFETs are known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The D2PAK is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The D2PAK is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. The through-hole version (IRLZ34L, SiHLZ34L) is available for low-profile applications. I2PAK (TO-262) D2PAK (TO-263) G G D S G D S S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb) free and Halogen-free Lead (Pb) free D2PAK (TO-263) SiHLZ34S-GE3 I2PAK (TO-262) IRLZ34LPbF SiHLZ34L-E3 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Linear Derating Factor Single Pulse Avalanche Energyb Maximum Power Dissipation Maximum Power Dissipation (PCB Mount)e Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Currenta VGS at 5 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM EAS TC = 25 °C TA = 25 °C PD dV/dt TJ, Tstg for 10 s LIMIT 60 ± 10 30 21 110 0.59 128 88 3.7 4.5 - 55 to + 175 300d UNIT V A W/°C mJ W V/ns °C Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 25 V, Starting TJ = 25 °C, L = 285 μH, Rg = 25 , IAS = 30 A (see fig. 12). c. ISD  30 A, dI/dt  200 A/μs, VDD  VDS, TJ  175 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 90418 S11-1044-Rev. D, 30-May-11 www.vishay.com 1 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient (PCB Mount)a Maximum Junction-to-Case (Drain) SYMBOL RthJA RthJC MIN. TYP. MAX. 40 1.7 UNIT °C/W Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current VDS VDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf LS Between lead, and center of die contact VDD = 30 V, ID = 30 A, Rg = 6 , RD = 1 , see fig. 10b VGS = 5 V ID = 30 A, VDS = 48 V, see fig. 6 and 13b VGS = 0, ID = 250 μA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 μA VGS = ± 10 V VDS = 60 V, VGS = 0 V VDS = 48 V, VGS = 0 V, TJ = 150 °C VGS = 5 V VGS = 4 V ID = 18 Ab ID = 15 Ab 60 1.0 12 0.07 2.0 ± 100 25 250 0.05 0.07 V V/°C V nA μA SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Source Inductance Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time  S VDS = 25 V, ID = 18 A VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 1600 660 170 14 170 30 56 7.5 35 7.1 25 nH ns nC pF IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D - 120 700 30 A 110 1.6 180 1300 V ns nC G S TJ = 25 °C, IS = 30 A, VGS = 0 Vb TJ = 25 °C, IF = 30 A, dI/dt = 100 A/μsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. www.vishay.com 2 Document Number: 90418 S11-1044-Rev. D, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 175 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 90418 S11-1044-Rev. D, 30-May-11 www.vishay.com 3 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area www.vishay.com 4 Document Number: 90418 S11-1044-Rev. D, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L Vishay Siliconix VDS VGS Rg RD D.U.T. + - VDD 5V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 90418 S11-1044-Rev. D, 30-May-11 www.vishay.com 5 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L Vishay Siliconix L Vary tp to obtain required IAS Rg VDS tp VDS VDD D.U.T. I AS + - V DD VDS 5V tp 0.01 W IAS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ 12 V 0.2 µF 0.3 µF 5V QGS QG QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 90418 S11-1044-Rev. D, 30-May-11 This document is subject to change without notice. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRLZ34S, IRLZ34L, SiHLZ34S, SiHLZ34L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer D.U.T. + - - + Rg • • • • dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 Va D.U.T. lSD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % Note a. VGS = 5 V for logic level devices ISD Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?90418. Document Number: 90418 S11-1044-Rev. D, 30-May-11 www.vishay.com 7 This document is subject to change without notice. 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