P400 Series
Vishay High Power Products
Passivated Assembled Circuit Elements, 40 A
FEATURES
• Glass passivated junctions for greater reliability • Electrically isolated base plate • Available up to 1200 VRRM/VDRM • High dynamic characteristics • Wide choice of circuit configurations • Simplified mechanical design and assembly • UL E78996 approved
PACE-PAK (D-19)
• Compliant to RoHS directive 2002/95/EC
DESCRIPTION PRODUCT SUMMARY
IO 40 A
The P400 series of integrated power circuits consists of power thyristors and power diodes configured in a single package. With its isolating base plate, mechanical designs are greatly simplified giving advantages of cost reduction and reduced size. Applications include power supplies, control circuits and battery chargers.
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL IO ITSM, IFSM I2t I2√t VRRM VISOL TJ TStg Range CHARACTERISTICS 80 °C 50 Hz 60 Hz 50 Hz 60 Hz VALUES 40 385 400 745 680 7450 400 to 1200 2500 - 40 to 125 UNITS A A
A2s A2√s V V °C
ELECTRICAL SPECIFICATIONS VOLTAGE RATINGS
TYPE NUMBER P401, P421, P431 P402, P422, P432 P403, P423, P433 P404, P424, P434 P405, P425, P435 VRRM/VDRM, MAXIMUM REPETITIVE PEAK REVERSE AND PEAK OFF-STATE VOLTAGE V 400 600 800 1000 1200 VRSM, MAXIMUM NON-REPETITIVE PEAK REVERSE VOLTAGE V 500 700 900 1100 1300 10 IRRM MAXIMUM AT TJ MAXIMUM mA
Document Number: 93755 Revision: 05-Nov-09
For technical questions, contact: indmodules@vishay.com
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P400 Series
Vishay High Power Products Passivated Assembled
Circuit Elements, 40 A
ON-STATE CONDUCTION
PARAMETER Maximum DC output current at case temperature SYMBOL IO TEST CONDITIONS Full bridge circuits 80 t = 10 ms Maximum peak, one-cycle non-repetitive on-state or forward current ITSM, IFSM t = 8.3 ms t = 10 ms t = 8.3 ms t = 10 ms Maximum I2t for fusing I2t t = 8.3 ms t = 10 ms t = 8.3 ms Maximum I2√t for fusing Low level value of threshold voltage High level value of threshold voltage Low level value of on-state slope resistance High level value of on-state slope resistance Maximum on-state voltage drop Maximum forward voltage drop Maximum non-repetitive rate of rise of turned-on current Maximum holding current Maximum latching current I2√t VT(TO)1 VT(TO)2 rt1 rt2 VTM VFM dI/dt IH IL No voltage reapplied 100 % VRRM reapplied No voltage reapplied 100 % VRRM reapplied 385 400 A 325 Sinusoidal half wave, initial TJ = TJ maximum 340 745 680 530 480 7450 0.83 V 1.03 9.61 7.01 1.4 200 130 TJ = 25 °C anode supply = 6 V, resistive load mA 250 mΩ A2√s A2s °C VALUES 40 UNITS A
t = 0.1 ms to 10 ms, no voltage reapplied I2t for time tx = I2√t · √tx (16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum (I > π x IT(AV)), TJ = TJ maximum (16.7 % x π x IT(AV) < I < π x IT(AV)), TJ = TJ maximum (I > π x IT(AV)), TJ = TJ maximum ITM = π x IT(AV) IFM = π x IF(AV) TJ = 25 °C
V A/μs
TJ = 125 °C from 0.67 VDRM ITM = π x IT(AV), Ig = 500 mA, tr < 0.5 μs, tp > 6 μs
BLOCKING
PARAMETER Maximum critical rate of rise of off-state voltage Maximum peak reverse and off-state leakage current at VRRM, VDRM Maximum peak reverse leakage current RMS isolation voltage SYMBOL dV/dt IRRM, IDRM IRRM VISOL TEST CONDITIONS TJ = 125 °C, exponential to 0.67 VDRM gate open TJ = 125 °C, gate open circuit TJ = 25 °C 50 Hz, circuit to base, all terminals shorted, TJ = 25 °C, t = 1 s VALUES 200 10 100 2500 UNITS V/μs mA μA V
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Document Number: 93755 Revision: 05-Nov-09
P400 Series
Passivated Assembled Circuit Elements, 40 A
TRIGGERING
PARAMETER Maximum peak gate power Maximum average gate power Maximum peak gate current Maximum peak negative gate voltage Maximum gate voltage required to trigger SYMBOL PGM PG(AV) IGM -VGM TJ = - 40 °C VGT TJ = 25 °C TJ = 125 °C TJ = - 40 °C Maximum gate current required to trigger Maximum gate voltage that will not trigger Maximum gate current that will not trigger IGT VGD IGD TJ = 25 °C TJ = 125 °C TJ = 125 °C, rated VDRM applied Anode supply = 6 V resistive load TEST CONDITIONS VALUES 8 2 2 10 3 2 1 90 60 35 0.2 2 V mA mA V UNITS W A V
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THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER Maximum junction operating and storage temperature range Maximum thermal resistance, junction to case per junction Maximum thermal resistance, case to heatsink Mounting torque, base to heatsink (1) Approximate weight SYMBOL TJ, TStg RthJC RthCS DC operation Mounting surface, smooth and greased TEST CONDITIONS VALUES - 40 to 125 1.05 K/W 0.10 4 58 2.0 Nm g oz. UNITS °C
Note (1) A mounting compund is recommended and the torque should be checked after a period of 3 hours to allow for the spread of the compound
CIRCUIT TYPE AND CODING
(1)
CIRCUIT “0”
AC1 G1 +
CIRCUIT “2”
AC1 G1 AC2 G2 +
CIRCUIT “3”
AC2 G2 G1 G4 AC1 G3 +
Terminal positions
AC2 G2
G1 AC1
G1 AC2 AC1
G2
G3 AC1 AC2 G4
G1
Schematic diagram
AC2 G2 (-) (+) (-)
G2 (+)
(+)
(-)
Single phase hybrid bridge common cathode Basic series With voltage suppression With freewheeling diode With both voltage suppression and freewheeling diode
(1)
Single phase hybrid bridge doubler P42. P42.K -
Single phase all SCR bridge P43. P43.K -
P40. P40.K P40.W P40.KW
Note To complete code refer to Voltage Ratings table, i.e.: For 600 V P40.W complete code is P402W
Document Number: 93755 Revision: 05-Nov-09
For technical questions, contact: indmodules@vishay.com
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P400 Series
Vishay High Power Products Passivated Assembled
Circuit Elements, 40 A
120 120 ~ 80 60 40 20 0 0
93755_01a
Maximum Total Power Loss (W)
Maximum Total Power Loss (W)
+ 100
100 80 60 40 20 0
R
1K
1.5
th SA
=
/W
0. 7
K/
W
180° (sine)
2K
K/W
-Δ R
/W
3 K/W
5 K/W
10 K/W
TJ = 125 °C
5
10
15
20
25
30
35
40
93755_01b
0
25
50
75
100
125
Total Output Current (A)
Maximum Allowable Ambient Temperature (°C) Fig. 1 - Current Ratings Nomogram (1 Module Per Heatsink)
30
130 Fully turned-on
Maximum Average On-State Power Loss (W)
25 20 15 10 5 0 0
Maximum Allowable Case Temperature (°C)
180° 120° 90° 60° 30°
120 110 100 90 80 Per module 70 180° (Sine) 180° (Rect.)
RMS limit
Ø
Conduction angle TJ = 125 °C Per junction 5 10 15 20
0
93755_04
5
10
15
20
25
30
35
40
45
93755_02
Average On-State Current (A)
Fig. 2 - On-State Power Loss Characteristics
Total Output Current (A)
Fig. 4 - Current Ratings Characteristics
Instantaneous On-State Current (A)
40
1000 TJ = 25 °C
Maximum Average On-State Power Loss (W)
35 30 25 20 15 10 5 0 0
DC 180° 120° 90° 60° 30°
100
TJ = 125 °C
RMS limit
Ø
10
Conduction period TJ = 125 °C Per junction 5 10 15 20 25 30 35
Per junction 1 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
93755_03
Average On-State Current (A)
Fig. 3 - On-State Power Loss Characteristics
93755_05
Instantaneous On-State Voltage (V)
Fig. 5 - On-State Voltage Drop Characteristics
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Document Number: 93755 Revision: 05-Nov-09
P400 Series
Passivated Assembled Circuit Elements, 40 A
350 325 At any rated load condition and with rated VRRM applied following surge. Initial TJ = 125 °C at 60 Hz 0.0083 s at 50 Hz 0.0100 s 400 Maximum non-repetitive surge current versus pulse train duration. Control of conduction may not be maintained. Initial TJ = 125 °C No voltage reapplied Rated VRRM reapplied
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Peak Half Sine Wave On-State Current (A)
300 275 250 225 200 175 150 1
Peak Half Sine Wave On-State Current (A)
350
300
250
200 Per junction
Per junction 10 100 150 0.01
93755_07
0.1
1
93755_06
Number of Equal Amplitude Half Cycle Current Pulses (N) Fig. 6 - Maximum Non-Repetitive Surge Current
10
Pulse Train Duration (s)
Fig. 7 - Maximum Non-Repetitive Surge Current
ZthJC - Transient Thermal Impedance (K/W)
Steady state value RthJC = 1.05 K/W (DC operation) 1
Per junction 0.1
0.01 0.0001
93755_08
0.001
0.01
0.1
1
Square Wave Pulse Duration (s)
Fig. 8 - Thermal Impedance ZthJC Characteristics
100
Instantaneous Gate Voltage (V)
10
Rectangular gate pulse (a) Recommended load line for rated dI/dt: 10 V, 20 Ω, tr ≤ 1 μs (b) Recommended load line for rated dI/dt: 10 V, 65 Ω, tr ≤ 1 μs (b)
TJ = 25 °C TJ = 125 °C
(1) PGM = 10 W, tp = 5 ms (2) PGM = 20 W, tp = 25 ms (3) PGM = 50 W, tp = 1 ms (4) PGM = 100 W, tp = 500 μs (a)
TJ = 40 °C
1 VGD IGD 0.01
(1)
(2)
(3)
(4)
Frequency limited by PG(AV) 0.1 1 10 100
0.1 0.001
93755_09
Instantaneous Gate Current (A)
Fig. 9 - Gate Characteristics
LINKS TO RELATED DOCUMENTS Dimensions Document Number: 93755 Revision: 05-Nov-09 www.vishay.com/doc?95335 For technical questions, contact: indmodules@vishay.com www.vishay.com 5
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000 Revision: 18-Jul-08
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