SI3495DV

SPICE Device Model Si3495DV Vishay Siliconix P-Channel 20-V (D-S) MOSFET CHARACTERISTICS • P-Channel Vertical DMOS • Macro Model (Subcircuit Model) • Level 3 MOS • Apply for both Linear and Switching Application • Accurate over the −55 to 125°C Temperature Range • Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics DESCRIPTION The attached spice model describes the typical electrical characteristics of the p-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0-V to 5-V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage. A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device. SUBCIRCUIT MODEL SCHEMATIC This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate data sheet of the same number for guaranteed specification limits. Document Number: 73150 S-50836Rev. B, 16-May-05 www.vishay.com 1 SPICE Device Model Si3495DV Vishay Siliconix SPECIFICATIONS (TJ = 25°C UNLESS OTHERWISE NOTED) Parameter Static Gate Threshold Voltage On-State Drain Current ba Symbol Test Conditions Simulated Data 0.66 144 0.021 0.025 0.030 0.035 25 −0.83 Measured Data Unit VGS(th) ID(on) VDS = VGS, ID = −250 µA VDS = −5 V, VGS = −4.5 V VGS = −4.5 V, ID = −7 A V A 0.020 0.024 0.030 0.036 25 −0.62 S V Ω Drain-Source On-State Resistancea rDS(on) VGS = −2.5 V, ID = −6.2 A VGS = −1.8 V, ID = −5.2 A VGS = −1.5 V, ID = −3 A Forward Transconductance Diode Forward Voltagea a gfs VSD VDS = −5 V, ID = −7 A IS = −1.7 A, VGS = 0 V Dynamic b Total Gate Charge Gate-Source Charge Gate-Drain Charge Qg Qgs Qgd VDS = −10 V, VGS = −4.5 V, ID = −7 A 22 2.5 7 25 2.5 7 nC Notes a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2%. b. Guaranteed by design, not subject to production testing. www.vishay.com 2 Document Number: 73150 S-50836Rev. B, 16-May-05 SPICE Device Model Si3495DV Vishay Siliconix COMPARISON OF MODEL WITH MEASURED DATA (TJ=25°C UNLESS OTHERWISE NOTED) Document Number: 73150 S-50836Rev. B, 16-May-05 www.vishay.com 3